S7-200

1 S7-200 Micro PLC 1-1
1.1 S7-200 Micro PLC 1-2
1.2 S7-200 Micro PLC 1-4
2 S7-200 PLC 2-1
2.1 2–2
2.2 S7–200 Micro PLC 2–6
2.3 2–9
2.4 2–16
2.5 2–18
3 S7-200 3-1
3.1 3–2
3.2 STEP 7-Micro/WIN 32 3–3
3.3 PC/PPI ? 3–5
3.4 S7–200 CPU ? 3–9
3.5 PLC 3–10
4 S7-200 CPU 4-1
4.1 PLC 4–2
4.2 S7–200 4–5
4.3 S7–200 4–6
4.4 SIMATIC IEC1131–3 4–10
4.5 4–18
4.6 CPU 4–22
4.7 CPU 4–25
4.8 CPU 4–27
4.9 4–30
4.10 S7–200CPU 4–36
vii

5 CPU 5-1
5.1 CPU 5–2
5.2 CPU SIMATIC 5–13
5.3 S7-200 CPU 5–15
5.4 5–20
5.5 5–22
6 CPU / 6-1
6.1 I/O I/O 6–2
6.2 6–4
6.3 6–5
6.4 6–8
6.5 6–9
6.6 I/O 6–10
6.7 6–13
7 7-1
7.1 ? 7- 2
7.2 7- 7
7.3 7- 9
7.4 7- 16
7.5 7- 27
7.6 7- 31
7.7 PC/PPI 7- 35
7.8 7- 41
8 S7–200 8-1
8.1 STEP 7–Micro/WIN 32 8–2
8.2 S7–200 CPU 8–7
viii

9 SIMATIC 9-1
9.1 SIMATIC 9–2
9.2 SIMATIC 9–10
9.3 SIMATIC 9–15
9.4 SIMATIC 9–23
9.5 SIMATIC 9–27
9.6 SIMATIC 9–49
9.7 SIMATIC 9–70
9.8 SIMATIC 9–72
9.9 SIMATIC 9–81
9.10 SIMATIC 9–99
9.11 SIMATIC 9–104
9.12 SIMATIC 9–110
9.13 SIMATIC 9–116
9.14 SIMATIC 9–126
9.15 SIMATIC 9–141
9.16 SIMATIC 9–165
9.17 SIMATIC 9–192
10 IEC 1131-3 10-1
10.1 IEC 10–2
10.2 IEC 10–7
10.3 IEC 10–11
10.4 IEC 10–15
10.5 IEC 10–19
10.6 IEC 10–24
10.7 IEC 10–26
10.8 IEC 10–29
10.9 IEC 10–32
ix

A S7-200 A-1
A.1 A–2
A.2 CPU 221 A–6
A.3 CPU 222 A–11
A.4 CPU 224 A–16
A.5 EM221 A–21
A.6 EM222 A–23
A.7 EM223 8 /8 A–25
A.8 A–28
A.9 I/O A–29
A.10 PC/PPI A–30
B B-1
B.1 B–2
B.2 B–3
B.3 B–4
C (SM) C-1
D S7-200 D-1
E S7-200 E-1
F STL F-1
G S7-200 G-1
x

S7-200 Micro PLC
1
S7-200 (Micro PLC)
1-1 S7-200 Micro PLC
S7-200
CPU
,
1-1 S7-200 Micro PLC
1.1 S7-200 Micro PLC 1-2
1.2 S7-200 Micro PLC 1-4
1-1

S7-200 Micro PLC
1.1 S7-200 Micro PLC
1-2 S7-200 Micro PLC S7-200 CPU
(PC) STEP 7-Micro/WIN 32 (3.0 )
(PC)
• PC/PPI
• (CP) (MPI)
• MPI MPI
S7-200 CPU
STEP 7-Micro/WIN 32
PC/PPI
1-2 S7-200 Micro PLC
S7-200 CPU
S7-200 CPU 1-1
S7-200 CPU
1-2

S7-200 Micro PLC
1-1 S7-200 CPU
CPU 221 CPU 222 CPU 224
90 x 80 x 62 mm 90 x 80 x 62 mm 120.5 x 80 x 62 mm
I/O
2048 2048 4096
1024 1024 2560
EEPROM EEPROM EEPROM
EEPROM EEPROM EEPROM
( ) 50 50 190
I/O
I/O 6 / 4 8 / 6 14 / 10
2 7
I/O 256 (128 /128 ) 256 (128 /128 ) 256 (128 /128 )
I/O 10 62 128
I/O 16 /16 16 /16
I/O 12 /10 12 /10
0.37 µs/ 0.37 µs/ 0.37 µs/
256 256 256
/ 256/256 256/256 256/256
256 256 256
For/Next
(+ - * /)
(+ - * /)
4 (20 KHz) 4 (20 KHz) 6 (20 KHz)
1 1 2
2 (20 KHz, DC) 2 (20 KHz, DC) 2 (20 KHz, DC)
1 / 2 1 / 2 1 / 2
2 (1 ms ~ 255 ms) 2 (1 ms ~ 255 ms) 2 (1 ms ~ 255 ms)
4 4 4
( ) ( ) ( )
1 (RS–485) 1 (RS-485) 1 (RS-485)
0 PPI, MPI PPI, MPI PPI, MPI
PROFIBUS (NETR/NETW) (NETR/NETW) (NETR/NETW)
1-3

S7-200 Micro PLC
1.2 S7–200 Micro PLC
1 S7–200 Micro PLC S7–200 CPU
S7–200 CPU
S7-200 CPU (CPU) I/O
CPU
CPU I/O CPU
( )
S7-200 CPU
CPU ( ) I/O
CPU
CPU
EEPROM CPU CPU
CPU
1-4

S7-200 Micro PLC
1-3 S7-200 CPU
LED
RUN/STOP
I/O
1-3 S7-200 CPU
S7-200 CPU I/O
( 1-4)
1-4 CPU
1-5

S7-200 Micro PLC
1-6

S7-200 PLC
2
S7-200 PLC
S7-200
S7-200
DIN
(DIN)
2.1 2–2
2.2 S7–200 Micro PLC 2–6
2.3 2–9
2.4 2–16
2.5 2–18
2-1

S7-200 PLC
2.1
S7-200 PLC DIN
S7-200 PLC S7–
200 PLC
I/O
PLC
2–1
I/O
S7-200 I/O I/O S7-200 I/O I/O
I/O
I/O
2-1
2-2

S7– 200 PLC
• S7-200 CPU
25 mm ( 1 ) 2-2
• 10 CPU
DIN
• 75 mm 2-2
• I/O
25 mm
(1 in.)
S7-200 I/O
S7-200
25 mm
(1 in.)
75 mm
(3 in.)
2-2 S7-200 PLC
2-3

S7-200 PLC
DIN
S7-200 CPU DIN (DIN EN 50
022) 2-3 DIN
1.0 mm
(0.04 in.)
35 mm
(1.38 in.)
7.5 mm
(0.30 in.)
2-3 DIN
S7–200 CPU 2-4 2-6
S7–200 CPU
90 mm
(3.54 in.)
4 mm
(0.16 in.)
82 mm
(3.23 in.)
4 mm
(0.16 in.)
96 mm
(3.78 in.)
88 mm
(3.46 in.)
80 mm
(3.15 in.)
CPU 221
CPU 222
(M4 No. 8)
4 mm
(0.16 in.)
2-4 CPU 221 CPU 222
2-4

4 mm
(0.16 in.)
120.5 mm
(4.74 in.)
4 mm
(0.16 in.)
112.5 mm
(4.43 in.)
88 mm
(3.46 in.)
96 mm
(3.78 in.)
80 mm
(3.15 in.)
CPU 224
(M4 No. 8)
4 mm
(0.16 in.)
2-5 CPU 224
(M4 No. 8)
4 mm
(0.16 in.)
Existing
CPU or
Expansion
Module
8-Point
Expansion
Module
16-Point
Expansion
Module
88 mm
(3.46 in.)
80 mm
(3.15 in.)
96 mm
(3.78 in.)
4 mm
(0.16 in.)
9.5 mm*
(0.37 in.)
38 mm
(1.50 in.)
46 mm
(1.81 in.)
9.5 mm*
(0.37 in.)
63.2 mm
(2.49 in.)
71.2 mm
(2.80 in.)
4 mm
(0.16 in.)
4 mm
(0.16 in.)
* M4 8
2-6
2-5

S7-200 PLC
2.2 S7–200 Micro PLC
S7-200 Micro PLC
!
S7-200
S7-200
S7-200 CPU
1. DIN M4 8 2-1
2. DIN M4 8 S7-200
1. DIN M4 8 2-1
2. I/O PLC
3. CPU
2-6

DIN
S7–200 Micro PLC
!
S7-200
S7-200
S7-200 CPU
1. DIN 75 mm (3.0 )
2. DIN DIN
3. DIN DIN DIN
1. DIN CPU
2. DIN DIN
DIN
3. CPU
4.
DIN
2-7

S7-200 PLC
S7–200 Micro PLC
!
S7-200
S7-200
S7-200
1. 2–7 CPU
2.
3. DIN
!
Micro PLC
2-7
2-8

2.3
!
S7-200
S7-200
S7-200 Micro PLC
• S7 200 PLC
• S7-200 1.50 mm 2 ~ 0.50 mm 2 (14
22 AWG)
• 0.36N (5 )
• ( 500 300 )
•
• S7-200
A
•
• DC
2-9

S7-200 PLC
!
• (0V)
• CPU PPI
RS-485
• S7-200
•
•
CPU
• M
2-10

A
S7-200
1500 VAC
• CPU DC M
• CPU DC CPU M
• CPU CPU (DP )
• CPU
• 500 VAC
• DC CPU 500 VAC
• DC I/O 500 VAC
• AC CPU 1500 VAC
• 1500 VAC
• AC CPU I/O 1500
VAC
( 2-8) S7-200
E S7-200
2-8
2-11

S7-200 PLC
( 2–9) S7-200 CPU
I/O
CPU
1. CPU
2. 2-9
3.
CPU
1. CPU
2. CPU
3. CPU
2-9 CPU 224 I/O
2-12

AC 2-10
[a] CPU ( )
[b]
CPU
[c]
Micro PLC 24V DC
[d] S7-200
( )
14 AWG 1.5 mm 2
[e]
[f] DC [g]
[h]
M
L1
N
PE
[a]
[b]
[d]
[f]
[g]
DO
DI
M L+
PST
S7-200
AC/DC/Rly
DI
EM 221 DC
DO
EM 222 Rly
[h]
[e]
[c]
2-10 120 / 230VAC CPU
2-13

S7-200 PLC
DC 2-11
[a] (a) CPU ( )
[b] CPU [c] , [d]
Micro 24 VDC
[e]
DC
[f]
DC
DC
(g)
1M 4700pf
[h] S7-200 (h)
14 AWG 1.5 mm 2
( )
24 VDC 120/230 VAC
• PELV ( ) EN 60204 -1
• 2 / UL 508
2-14

L1
N
PE
[a]
[f]
[g]
[e]
AC
DC
[b]
[g]
[f]
[h]
[c]
DO
DI
PS
S7-200
DC/DC/DC M
DO
EM 222
DC
DI
EM 221
DC
[d]
24 VDC
L+ M
2-11 DC
2-15

S7-200 PLC
2.4
S7-200
13
2-12 2-
+VDC
[a]
[a] IN4001
2-12
+VDC
[a]
[b]
[a] IN4001
[b] 8.2 V
, 5W
2-13
2-16

2-14 / (30V) /
R
C
R = 12 Ω
I L
+VDC
C=I L K
K = 0.5 mF/A ~ 1 mF/A
2-14 DC
36 V
2-12 2-13
AC
115 VAC/230 VAC
AC 2-15
MOV ( ) MOV
20%
R
C
MOV
R > 0.5 x Vrms
C = 0.002 mF ~ 0.005 mF
10 VA
2-15 AC AC
I= 2x 3.14x f x C x Vrms
NEMA 2 183 VA 17VA
115 VAC I 183VA/115V 1.59 A
2A
R= 0.5 x 115 = 57.5 Ω 68Ω
C = (17 VA/10) x 0.005 = 0.0085 µF 0.01 µF
I= 2 x 3.14 x 60 x 0.01 x 10 -6 x 115 = 0.43 mA rms
2-17

S7-200 PLC
2.5
S7-200 24V DC
)
(
S7-200 CPU 5 VDC 24 VDC
• CPU 24 VDC
24 VDC CPU 24 VDC
24 VDC 24 VDC
• CPU 5V 5V
CPU
A
CPU
!
S7-200 DC 24 VDC
PLC
S7-200 DC
2-18

2-1 S7-200 Micro PLC
• CPU 224 AC/DC /
• 3 EM 223 8 / 8
• 1 EM 221 8
46 34
CPU
5V
24 VDC I/O 400 mA 24
VDC CPU 280 mA 120 mA
2-1
CPU 5 VDC 24 VDC
CPU 224 AC/DC/ 660 mA 280 mA
5 VDC 24 VDC
CPU 224, 14 14 * 4 mA = 56 mA
3 EM 223, 5 V 3 * 80 mA = 240 mA
1 EM 221, 5V 1 * 30 mA = 30 mA
3 EM 223, 8 3 * 8 * 4 mA = 96 mA
3 EM 223, 8 3 * 8 * 9 mA = 216 mA
1 EM 221, 8 8 * 4 mA = 32 mA
270 mA 400 mA
5 VDC 24 VDC
390 mA 120 mA
2-19

S7-200 PLC
CPU
CPU ( ) A
5 VDC 24 VDC
5 VDC 24 VDC
5 VDC 24 VDC
2-20

S7-200
3
S7-200
• S7–200 CPU
• STEP 7–Micro/WIN 32 PC
•
3.1 3–2
3.2 STEP 7-Micro/WIN 32 3–3
3.3 PC/PPI ? 3–5
3.4 S7–200 CPU ? 3–9
3.5 PLC 3–10
3-1

S7–200
3.1
• (Windows 95, Windows 98, Windows NT 4.0)
•
•
- PC/PPI PC
- (CP) PC SIMATIC
- CPU 221, CPU 222, CPU 224
- (Modem)
STEP 7-Micro/WIN 32 3.0 Windows 32
Windows 95 Windows 98 WindowsNT STEP 7-
Micro/WIN 32
• PC CPU 80586 16M
STEP 7-Micro / WIN 32 ( PG 740) CPU
80486 8M
•
- PC/PPI
- (CP)
• VGA Microsoft Windows
• 50 M
• Windows 95, Windows 98, Windows NT 4.0
• Microsoft Windows
STEP 7-Micro/WIN 32
F1
3-2

S7–200
3.2 STEP 7-Micro/WIN 32
• STEP 7-Micro/WIN 32 STEP 7-Micro/WIN
• Microsoft Office
• PC CPU 3.3
STEP 7-Micro/WIN 32
STEP 7-Micro/WIN 32
1. CD
2. Start Windows
3. Run
4. Run a:\setup OK ENTER
Run e:\setup OK ENTER
5.
6. PG/PC Cancel
STEP 7-Micro/WIN 32 3–1
STEP 7-Micro/WIN 32 CD READMEX.TXT
( x A = B = C = D =
E = )
3-3

✂
S7–200
Project Edit View PLC Debug Tools Windows Help
View
Program Block
Symbol Table
Status Chart
Data Block
System Block
Cross Reference
Communications
3-1 STEP 7–Micro/WIN 32
•
•
• PC/PPI PC/PPI DIP
•
• CPU ( ) CPU STOP
• CPU
3-4

S7–200
3.3 PC/PPI ?
PC/PPI
S7-200 CPU
( )
S7-200 CPU ?
3–2 PC/PPI CPU
1. PC/PPI DIP
PC/PPI 11 DCE
2. PC/PPI RS–232 ( PC)
COM1 COM2
3. PC/PPI RS–485 ( PPI ) CPU
E
PC/PPI
A
DIP ( = 0, = 1):
1
RS-232
S7-200 CPU
0
PC/PPI
RS-485
PC/PPI
PPI
1
0
1 2 3 4 5
PC
123 4 1 = 10 BIT
38.4K 000 0 = 11 BIT
19.2K 001
9.6K 010 5 1 = DTE
2.4K 100 0 = DCE
1.2K 101
3-2 PPI CPU
3-5

S7–200
?
1. STEP 7-Micro/WIN 32 View >
Communications
2. PC/PPI PG/PC
3–3
3. Properties ( 3–4)
9,600
4. 7 7.3
PG/PC
7.2
3-6

✂
S7–200
Communications Links
Communications Setup
Double click the icon representing the PLC
Setting the PG/PC Interface
you
wish to communicate with.
Double click Access the Path module icon to change to
communication parameters.
Double click Access the modem Point of Application: icon to setup the
modem parameters Micro/WIN or -->PC/PPI dial to start cable modem (PPI)
communications.
(Standard for Micro/WIN)
Interface Parameter set used:
PC/PPI cable (PPI)
Communication Parameters
Remote Address: MPI-ISA on 2 board (MPI)
MPI-ISA on board (PPI)
Local Address: MPI-ISA 0 Card (PROFIBUS)
PC Adapter (MPI)
Module:
PC
PC/PPI
Adapter
cable
(PROFIBUS)PC/
(COM 1)
Protocol:
PPI
PPI
cable (PPI)
Transmission Rate: 9.6 bps
(Assigning Parameters to a PC/PPI Cable
Mode PC/PPI for a PPI cable Network) (COM 1)
Interfaces
Properties...
Copy...
Delete
PC/PPI
cable
Address: 0
Install...
OK
Cancel
Help
3-3 PG/PC
3-7

✂
S7–200
Setting the PG/PC Interface
Access Path
Properties - PC/PPI cable (PPI)
PPI
Local Connection
Station Parameters
Address:
Timeout:
0
1s
Network Parameters
Multiple Master Network
Transmission Rate:
Highest Station Address:
9.6 kbps
31
OK
Default
Cancel
Help
OK
Cancel
Help
3-4 PG/PC
3-8

S7–200
3.4 S7-200 CPU ?
STEP 7-Micro/WIN 32
PC/PPI
S7-200 CPU (
STEP 7-Micro/WIN 32 S7-200 CPU
1. STEP 7-Micro/WIN 32 View >
Communications CPU
2. STEP 7-Micro/WIN 32
S7–200 CPU ( ) CPU
3–5
3.
4. S7–200 CPU
Communications Links
Communications Setup
Double click the icon representing the PLC
you wish to communicate with.
Double click the interface icon to change to
communication parameters.
Double click the modem icon to setup the
modem parameters or dial to start modem
communications.
PC/PPI
Address: 0
CPU224
Double-Click
to Refresh
Communication Parameters
Remote Address
Local Address 0
Module PC/PPI cable (COM 1)
Protocol
PPI
Transmission Rate 9.6 kbps
Mode
11-bit
3-5
3-9

S7–200
3.5 PLC ?
S7–200 CPU PLC
1. View > System Block
2. Port(s) ( 3–6)
2 9.6 k
3. OK
Apply OK
4. PLC
5.
System Block
Analog Input Filters
Pulse Catch Bits
Background Time
Port(s)
Retentive Ranges
Password
Output Table
Input Filters
Port 0 Port 1
Defaults
PLC Address:
2
2
(range 1...126)
Highest Address:
31
31
(range 1...126)
Baud Rate:
9.6 kbps
9.6 kbps
Retry Count:
3
3
(range 0...8)
Gap Update Factor: 10 10
(range 1...100)
Configuration parameters must be downloaded before they take effect.
Not all PLC types support every System Block option. Press F1 to see
which options are supported by each PLC.
OK
Cancel
Apply
3-6
3-10

S7-200 CPU
4
S7–200 CPU CPU
4.1 PLC 4–2
4.2 S7–200 4–5
4.3 S7–200 4–6
4.4 SIMATIC IEC1131–3 4–10
4.5 4–18
4.6 CPU 4–22
4.7 CPU 4–25
4.8 CPU 4–27
4.9 4–30
4.10 S7–200CPU 4–36
4-1

S7-200 CPU
4.1 PLC
PLC
4–1
Partition your process or machine.
Create the functional specifications of the units.
Design the hard-wired safety circuits.
Specify the operator stations.
Create the PLC configuration drawings.
Create a list of symbolic signal-naming conventions (optional).
4-1 PLC
4-2

S7-200 CPU
:
• / (I/O)
•
• ( ) ( )
•
•
CPU
•
• CPU
• CPU I/O
• CPU
• CPU
•
4-3

S7-200 CPU
•
• ( )
• CPU
PLC
• CPU
• CPU I/O ( )
• CPU ( I/O )
/
4-4

S7-200 CPU
4.2 S7–200
S7–200 CPU
• CPU
• CPU CPU
• CPU
4–2 S7–200 CPU
CPU
Opn_Drn_PB
Cls_Drn_PB A_Mtr_Fbk E_Stop_On
Drain_Sol
Drain_Sol
S7-200 CPU
Output
Area
Output
S
Input
Area
Input
Drain Solenoid
Areas of Memory
in the CPU
Operator Station
4-2
4-5

S7-200 CPU
4.3 S7–200
S7–200 CPU S7–200
CPU SIMATIC IEC 1131–3
STEP 7-Micro/WIN 32
• (SIMATIC IEC 1131–3)
• ( STL LAD FBD)
4-1 S7–200
4-1SIMATIC
IEC1131–3
SIMATIC IEC 1131–3
(STL)
(LAD)
(FBD)
(LAD)
(FBD)
STEP 7-Micro/WIN 32
STL
STL
CPU
4–3
(STL)
PLC
STL
NETWORK
LD I0.0
LD I0.1
LD I2.0
A I2.1
OLD
ALD
= Q5.0
4-3
4-6

S7-200 CPU
4-3 CPU
STL
( 4-4) LAD FBD
STL
S7–200 CPU
S0 Stack 0 -
S1 Stack 1 -
S2 Stack 2 -
S3 Stack 3 -
S4 Stack 4 -
S5 Stack 5 -
S6 Stack 6 -
S7 Stack 7 -
S8 Stack 8 -
Load (LD)
(nv)
And (A)
(nv)
Or (O)
(nv)
iv0
iv1
iv2
iv3
iv4
iv5
iv6
iv7
iv8
nv
iv0
iv1
iv2
iv3
iv4
iv5
iv6
iv7
iv8
S0 = iv0 * nv
iv0
iv1
iv2
iv3
iv4
iv5
iv6
iv7
S0
iv1
iv2
iv3
iv4
iv5
iv6
iv7
S0 = iv0 + nv
iv0
iv1
iv2
iv3
iv4
iv5
iv6
iv7
S0
iv1
iv2
iv3
iv4
iv5
iv6
iv7
iv8 iv8 iv8 iv8
iv0 ~ iv7 nv S0
4-4 S7-200 CPU
STL
• STL
• STL LAD FBD
• SIMATIC STL
• STL SIMATICLAD FBD
SIMATICLAD FBD
STL
4-7

S7-200 CPU
STEP 7-Micro/WIN 32
CPU
(LAD)
PLC
CPU
4–5
Network 1
I0.0
I0.1
Q5.0
I2.0 I2.1
Network 2
I2.1
EN
MOV_B
ENO
SWAP
EN ENO
VB50
IN
OUT
AC0
AC0
IN
4-5 LAD
4-5
• –
• –
• –
LAD
•
•
• LAD SIMATIC IEC 1131–3
• STL SIMATIC LAD
4-8

S7-200 CPU
STEP 7-Micro/WIN 32
(FBD)
)
( AND ) (
4–6 FBD
I2.1
V50.0
AND
AC0
T33
IN TON
PT
4-6 FBD
•
FBD
• FBD SIMATIC IEC 1131-3
• STL SIMATIC FBD
4-9

S7-200 CPU
4.4 SIMATIC IEC 1131-3
SIMATIC
PLC
PLC
SIMATIC
• SIMATIC
SIMATIC
PLC
S7-200 PLC
• (LAD, STL, FBD) SIMATIC
IEC 1131-3
SIMATIC
PLC
(IEC)
IEC1131-3
IEC
PLC
• IEC 1131–3 PLC SIMATIC
IEC1131-3 (
IEC 1131–3 ) .
•
ADD-I ( ) ADD_R ( ) IEC1131-3
CPU
• IEC1131-3
( / )
4-10

S7-200 CPU
IEC 1131-3
• PLC
• SIMATIC ( )
• SIMATIC ( )
•
• LAD FBD
• IEC 1131–3
SIMATIC IEC 1131-3
SIMATIC
IEC1131-3
STEP 7-Micro/WIN 32 SIMATIC IEC
1131-3
STEP 7-Micro/WIN 32 4–
2 4–3 STEP 7-Micro/WIN 32
4-2 IEC 1131–3
BOOL 0 to 1
BYTE 0 to 255
WORD 0 to 65,535
INT -32768 to +32767
DWORD 0 to 2 32 - 1
DINT -2 31 to +2 31 - 1
REAL IEEE 32 -10 38 to +10 38
4-11

S7-200 CPU
4-3 IEC 1131–3
TON1 1 ms T32, T96
10 ms T33 ~ T36, T97 ~ T100
100 ms T37 ~ T63, T101 ~ T255
TOF 1 ms T32, T96
10 ms T33 ~ T36, T97 ~ T100
100 ms T37 ~ T63, T101 ~ T255
TP ( 1) 1 ms T32, T96
10 ms T33 ~ T36, T97 ~ T100
100 ms T37 ~ T63, T101 ~ T255
CTU 0 to 255
CTD 0 to 255
CTUD / 0 to 255
SR --
RS --
1 TON
TON
( ) SRW ( )
(IN) WORD WORD
WORD
(INT)
4-12

S7-200 CPU
IEC 1131-3 4–4
4-4
BOOL
BYTE
WORD
INT
DWORD
DINT
REAL
BOOL
BYTE
WORD
INT
DWORD
DINT
REAL
DINT
DWORD 32
REAL 32
REAL
SIAMTIC 4–5
4-5
BOOL
BYTE
WORD
INT
DWORD
DINT
REAL
BOOL
BYTE
WORD, INT
WORD, INT
DWORD, DINT
DWORD, DINT
REAL
4-13

S7-200 CPU
SIMATIC
VD100 4-6 STEP 7-Micro/WIN 32
4-6 SIMATIC
V0.0 BOOL
VB0
BYTE
VW0
WORD, INT
VD0
DWORD, DINT, REAL
7-Micro/WIN 32
I 40,000 0
-1 0 < I
< I
STEP
<
!
IEC 1131-3
SIMATIC
4-14

S7-200 CPU
SIMATIC IEC 1131-3
IEC 1131-3
STEP 7-Micro/WIN 32
SIMATIC
4–7 IEC
4-7 IEC
( ) ( )
ADD INT WORD, INT ADD_I ( )
ADD DINT DWORD, DINT ADD_D ( )
ADD REAL REAL ADD_R ( )
DINT
ADD IN1 = INT, IN2 = WORD, IN3 = INT
ADD_I ( )
40,001
ADD 40000, 1
IEC
IEC 1131-3
IEC
4-15

S7-200 CPU
4-8 4–9
4-8
Var1
Var2
Var3
REAL
DINT
INT
4-9
Var1 VD100 VD200
Var2 VD300 VD400
Var3 VW500 VW600
Var1 AC0 AC1
4-10
STEP 7-Micro/WIN 32
4-16

S7-200 CPU
4-10
BYTE INT IN: BYTE
OUT: INT
INT BYTE IN: INT
OUT: BYTE
INT DINT IN: DINT
OUT DINT
DINT INT IN: DINT
OUT: INT
DINT REAL IN: DINT
OUT: REAL
REAL DINT
(ROUND)
IN:
OUT:
REAL
DINT
IN:
OUT:
IN:
OUT:
IN:
OUT:
IN:
OUT:
IN:
OUT:
IN:
OUT:
BYTE
WORD, INT
WORD, INT
BYTE
WORD, INT
DWORD, DINT
DWORD, DINT
WORD, INT
DWORD, DINT
REAL
REAL
DWORD, DINT
IEC 1131-3 Move INT
WORD, DINT DWORD Move
, 4-11
4-11 MOVE
IEC 1131-3 Move IN OUT
MOVE (INT WORD) INT WORD
MOVE (WORD INT) WORD INT
MOVE (DINT DWORD) DINT DWORD
MOVE (DWORD DINT) DWORD DINT
4-17

S7-200 CPU
4.5
S7-200 CPU STEP 7-Micro/
WIN 32
CPU
S7-200 CPU ( ) (
) S7-200
• CPU
•
•
100 ms
4-7 4-11 S7-200
4-18

S7-200 CPU
MAIN PROGRAM OB1
Network 1
SM0.1
SBR0
EN
SIMATIC LAD
SUBROUTINE 0
Network 1
SM0.0
MOV_
EN ENO
100 IN OUT SMB34
0
ATCH
EN ENO
INT
ENI
10
EVNT
INTERRUPT ROUTINE 0
Network 1
SM0.0
MOV_W
EN ENO
AIW4
IN
OUT
VW100
4-7 SIMATIC
Main Program OB1
Statement List
Network 1
LD SM0.1 //When first scan cycle
//bit comes on
CALL 0 //Call subroutine 0.
Subroutine 0
Network 1
LD SM0.0 //Always on memory bit.
MOVB 100, SMB34 //Set timed interrupt 0
//interval to 100 ms.
AENO //If move is successful,
ATCH 0, 10 //attach timed interrupt 0
//to interrupt routine 0.
AENO //If attach is successful,
ENI //then enable Global Interrupt.
Interrupt Routine 0
//Begin interrupt routine 0.
Network 1
LD SM0.0 //Always on memory bit.
MOVW AIW4,VW100 //Sample Analog Input 4.
4-8 SIMATIC STL
4-19

S7-200 CPU
MAIN PROGRAM OB1
Network 1
SM0.1
SBR0
EN
SIMATIC FBD
SUBROUTINE 0
Network 1
MOV_B
SM0.0 EN ENO
ATCH
EN ENO
ENI
100
IN OUT
SMB34
10
0
INT
EVENT
INTERRUPT ROUTINE 0
Network 1
SM0.0
AIW4
MOV_
EN ENO
IN OUT
VW100
4-9 SIMATIC FBD
MAIN PROGRAM
Network 1
%SM0.1
SBR0
EN
IEC LAD
SUBROUTINE 0
Network 1
%SM0.0
MOVE
EN ENO
ATCH
EN ENO
ENI
100
IN OUT
%SMB34
10
0
INT
EVNT
INTERRUPT ROUTINE 0
Network 1
%SM0.0
%AIW4
MOVE
EN ENO
IN OUT
%VW100
4-10 IEC
4-20

S7-200 CPU
MAIN PROGRAM OB1
Network 1
IEC FBD
%SM0.1
SBR0
EN
SUBROUTINE 0
Network 1
MOVE
%SM0.0 EN ENO
100 IN OUT %SMB34 0
10
ATCH
EN ENO
INT
EVENT
ENI
EN
INTERRUPT ROUTINE 0
Network 1
%SM0.0
MOVE
EN ENO
%AIW4
IN
OUT
&VW100
4-11 IEC FBD
4-21

S7-200 CPU
4.6 CPU
S7–200 CPU 4-12
CPU
•
•
•
• CPU
•
CPU
4-12 S7-200 CPU
CPU
S7-200 CPU
STOP RUN STOP RUN
RUN STOP
CPU 8 (1 ) CPU
CPU
I/O
I/O ( )
CPU
4-22

S7-200 CPU
CPU
CPU
CPU
CPU
I/O
( 4.5 )
( )
CPU
CPU
) I/O
CPU ( RUN
CPU
4-23

S7-200 CPU
CPU 1 (8 ) CPU
I/O
CPU RUN STOP
( 6.4 )
( ) CPU
•
/ (I/O)
• I/O
• I/O
I/O
I/O
I/O
I/O
I/O
CPU I/O 6.5
4-24

S7-200 CPU
4.7 CPU
S7–200 CPU
• STOP CPU STOP ( ) CPU
CPU
CPU
• RUN: CPU
CPU
CPU
LED
STOP
• PLC
• STEP 7-Micro/WIN 32 CPU TERM
RUN
• STOP
( CPU ) CPU
• STOP
• RUN
• TERM (terminal) (STEP 7 Micro/Win)
CPU
TERM STOP CPU
STOP RUN CPU
RUN
4-25

S7-200 CPU
STEP 7-Micro/WIN 32
4–13 STEP 7 Micro/Win CPU
TERM RUN
Project Edit View PLC Debug Tools Windows
✂
RUN
STOP
4-13 STEP 7 Micro/Win CPU
1131-3 9 10
Stop CPU RUN STOP
Stop SIMATIC IEC
4-26

S7-200 CPU
4.8 CPU
S7–200 CPU CPU
CPU
CPU
CPU
CPU
4-12 S7–200 CPU CPU
CPU S7 200 CPU 1 ( )
CPU
CPU
CPU
4-12 S7–200 CPU
1 2 3
CPU
CPU
CPU
/
STOP
4-27

S7-200 CPU
CPU
STEP 7-Micro/WIN 32 CPU View > System
Block Password 4-14 CPU
CPU
System Block
Analog Input Filters
Ports(s)
Retentive Ranges
Pulse Catch Bits
Password
Output Table
Background Time
Input Filters
Full Privileges (Level 1)
Partial Privileges (Level 2)
Minimum Privileges (Level 3)
Password:
Verify:
Configuration parameters must be downloaded before they take effect.
Not all PLC types support every System Block option. Press F1 to see which
options are supported by each PLC.
OK
Cancel
Apply
4-14 CPU
4-28

S7-200 CPU
CPU
CPU CPU STOP CPU
( )
CPU
All
(Clear All)
(Clear)
OK
PLC > Clear...
(Clear All)
!
CPU (Off) ( )
CPU S7-200
CPU
/
4-29

S7-200 CPU
4.9
STEP 7-Micro/WIN 32
CPU
CPU ( 1 65,535)
Debug > Multiple Scans 4-15 CPU
Execute Scans
Program Scan(s)
Execute 1
OK
Cancel
4-15
4-30

S7-200 CPU
4-16 View > Status Chart
• STEP 7-Micro/WIN 32
(
•
• ( 4-16)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Status Chart
Address Format Current Value New Value
•Start_1"
•Start_2"
•Stop_1"
•Stop_2"
•High_Level"
•Low_Level"
•Reset"
•Pump_1"
•Pump_2"
•Mixer_Motor"
•Steam_Valve"
•Drain_Valve"
•Drain_Pump"
•Hi_Lev_Reached"
•Mix_Timer"
•Cycle_Counter"
CHT1
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Signed
Signed
2#0
2#0
2#0
2#0
2#0
2#0
2#0
2#0
2#0
2#0
2#0
2#0
2#0
2#0
+0
+0
1
Cut Ctrl+X
Copy Ctrl+C
Paste Ctrl+V
Force
Unforce
Insert
Delete
Define Symbol...
4-16
4-31

S7-200 CPU
STEP 7-Micro/WIN (
) 4–17
PLC STEP 7-Micro/WIN 32 PLC
LAD ( 4-17 )
LAD ( )
Tools
Windows
SIMATIC LAD
Name Var Type Data Type Comment
Start
Stop
High Level
TEMP
TEMP
TEMP
BOOL
BOOL
BOOL
Network 1
Fill the tank with Paint Ingredient 1 and monitor the tank
On On On On
Off
OB1
4-17
4-32

S7-200 CPU
(FBD)
STEP 7-Micro/WIN 32 STEP 7-Micro/WIN 32
FBD FBD
PLC STEP 7-Micro/WIN 32 PLC
FBD
FBD
FBD
FBD ( 4-18 )
FBD ( )
Tools
Windows
SIMATIC FBD
Name Var Type Data Type Comment
Start
Stop
High Level
TEMP
TEMP
TEMP
BOOL
BOOL
BOOL
Network 1
ON
OFF
AND
OFF
=
OB1
4-18 (FBD)
4-33

S7-200 CPU
S7-200 CPU I/O ( )
16 ( V M) I/O (AI
AQ) V M
( AIW6 AQW14 ) CPU
EEPROM
( I/O )
CPU 4-
19 CPU
CPU
STOP
STOP
4–20
I/O
16
/ .
4-19 S7-200 CPU
4-34

S7-200 CPU
CPU
CPU
Tools
Windows
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Status Chart
Address Format Current Value New Value
•Start Bit
2#0
•Start
Bit
2#0
1
•Stop
Bit
2#0
•Stop
2#0
VB100
VW100
VD100
VD100.1
VD0
VD4
VB8
CHT1
Bit
Signed
Hexadecimal
Hexadecimal
Hexadecimal
Bit
Signed
Signed
Floating
String
16#01
16#0100
16#0100000
2#0
+17789
3.214000
2#1
4-20
4-35

S7-200 CPU
4.10 S7–200 CPU
PLC > Information
STEP7-Micro/WIN 32 4-21
B
4–21 (Last Fatal) CPU
RAM
CPU
RAM
(Total Fatal)
CPU
RAM
CPU
RAM
PLCInformation
Operating Mode: STOP
Versions
PLC CPU224 REL 1.00
Firmware 01.00
ASIC 01.00
Scan Rates (ms)
Last
Minimum
Maximum
0
0
0
Errors
Fatal
Non-Fatal
Last Fatal
Total Fatal
0
0
0
0
No fatal errors
No non-fatal errors
No non-fatal errors
1
2
3
4
5
Module Type Points
Discrete
I/O16 In/16 Out
Address
10.0 / ...
Status
Not present
Not present
Not present
Not present
Not present
DP Status...
Reset Scan Rates
Close
4-21 CPU
4-36

S7-200 CPU
CPU
CPU
CPU
CPU
CPU
CPU
STOP LED STOP ( ) LED (off)
CPU
CPU
CPU
•
• RUN TERM STOP
• STEP 7-Micro/WIN CPU STEP 7-Micro/WIN 32
PLC > Powerup Reset PLC
CPU
CPU
CPU
LED
CPU
CPU
CPU
CPU
4-37

S7-200 CPU
CPU
CPU
I/O 4-21 STEP 7 Micro/WIN 32
• RUN
(SM) C SM
I/O
CPU I/O SM
I/O SM CPU
CPU
I/O CPU I/O
I/O
• CPU CPU
EEPROM )
( CPU
•
4-21
CPU STOP SM
CPU STOP 4-22 SM
I/O CPU STOP
Network 5 I/O (SM5.0) STOP
SM5.0
(STOP)
4-22
4-38

CPU
5
S7-200 CPU
5.1 CPU 5–2
5.2 CPU SIMATIC 5–13
5.3 S7-200 CPU 5–15
5.4 5–20
5.5 5–22
5-1

CPU
5.1 CPU
S7-200
5-1 ( . )
(I= 3= 3) ( 4 )
I 3 . 4
MSB =
LSB =
MSB
LSB
7 6 5 4 3 2 1 0
I 0
I 1
I 2
I 3
I 4
I 5
I 6
I 7
I 8
I 9
I 10
I 11
I 12
I 13
I 14
I 15
5-1 CPU ( . )
5-2

CPU
I Q M SM) CPU
(V
T C HC )
5-2 CPU (
MSB
LSB
7 0
VB100 VB100
V B 100
V W 100
(V= )
MSB
15 8
VW100 VB100 VB101
LSB
7 0
(V= )
MSB
LSB
31 24 23
16 15
8 7 0
VD100 VB100 VB101
VB102
VB103
V D 100
MSB =
LSB =
(V= )
5-2
5-3

CPU
5-1
( ) 32 +1.175495E-38
+3.402823E+38 -1.175495E-38 -3.402823E+38
ANSI/IEEE 754 1985
5-1
B ( ) :
8
0 to 255 0 to FF -128 to 127 80 to 7F
W ( ) :
16
0 to 65,535 0 to FFFF -32,768 to
32,767
8000 to 7FFF
D ( ) :
32
0 to
4,294,967,295
0 to
FFFF FFFF
-2,147,483,648
to
2,147,483,647
8000 0000 to
7FFF FFFF
(I)
4.6 CPU
:
I[ ].[ ] I0.1
I[ ][ ] IB4
(Q)
CPU
Q [ ].[ ] Q1.1
Q [ ][ ] QB5
5-4

CPU
(V)
V
V
V [ ].[ ] V10.2
V [ ][ ] VW100
(M)
(M)
M [ ].[ ] M26.7
M [ ][ ] MD20
(S)
(S)
S
SCR
S [ ].[ ] S3.1
S [ ][ ] SB4
(SM)
SM
S7-200 CPU
CPU
• ON
•
•
SM C SM
.
SM [ ].[ ] SM0.1
SM [ ][ ] SMB86
5-5

CPU
(L)
S7–200 PLC 64 60
, STEP 7-Micro /WIN 32
64
4
(
) S7–200 PLC
64 64
64
S7–200 PLC
PLC
CPU
L [ ].[ ] L0.0
L [ ] [ ] LB33
5-6

CPU
( )
S7-200 CPU S7-200 ( )
1ms 10ms 100ms
• 16
• 1 (
)
(T )
SIMATIC
5-3 (T3) MOV_W
S7-200 9
IEC1131-3
: T [ ] T24
T3
/
T0
T0
T1
T2
T3
T1
T2
T3
I2
.1
T3
MOV_W
EN
IN
OUT
VW2
00
MSB
15
T0
T1
T2
T3
/
LSB
0
T0
T1
T2
T3
( )
5-3 SIMATIC
5-7

CPU
(C)
S7-200 CPU CPU
• 16
• 1 (
)
(C )
SIMATIC
5-4 (C3) MOV-W
S7-200 9
IEC1131-3
C[ ] C20
C3
/
C0
C1
C2
C3
C0
C1
C2
C3
I2.1 MOV_W
C3
EN
IN
ENO
OUT
VW200
MSB
15
/
C0
C1
C2
C3
LSB
0
C0
C1
C2
C3
5-4
5-8

CPU
(AI)
S7-200 ( ) 1 (16 )
(AI)
(W)
5-5 1 ( 0.2 4)
( AIW0 AIW2 AIW4)
AIW [ ] AIW4
MSB
15 8
LSB
7 0
AIW8 8 9
AI W 8
5-5
(AQ)
S7-200 1 (16 )
(AQ) (W) 5-6
( 0.2 4)
( AQW0 AQW2 AQW4)
AQW [ ] AQW4
MSB
15 8
LSB
7 0
AQW10 10 11
AQ W 10
5-6
5-9

CPU
(AC)
CPU 4 32
(AC0 AC1 AC2 AC3)
5-7 8
16 32
AC [ ] AC0
9.16,SIMATIC
MOV_B
7 0
EN
ENO
AC2
IN
OUT
VB200
AC2( )
( )
DEC_W
EN
ENO
MSB
LSB
15 8 7
0
AC1
IN
OUT
VW100
1
AC1 ( )
0
( )
INV_D
MSB
31
24 23
16
15
8
7
LSB
0
EN
ENO
AC3
IN
OUT
VD250
3
2
AC3( )
1
0
( )
5-7
5-10

CPU
(HC)
CPU 32
( )
(HC) ( HC0) 5-8
(32 )
: HC [ ] HC1
MSB
31
HC2
LSB
0
HC 2
3
2
1
0
5-8
5-11

CPU
S7-200 CPU
ASCII
[ ]
16#[ ]
ASCII . [ASCII ]
ANSI/IEEE 754-1985
2#1010_0101_1010_0101
S7-200 CPU (
) Add
VW100
VW100
ASCII
• 20047
• 16#4E4F
• ASCII Text goes between single
quotes.
• +1.175495E-38 ( )
-1.175495E-38 ( )
• 2#1010_0101_1010_0101
5-12

CPU
5.2 CPU SIMATIC
S7-200 CPU
I Q V M S T ( ) C ( )
(BIT)
(V)
(L)
(AC1 AC2 AC3)
(MOVD)
&
: MOVD &VB100, VD204
MOVD &MB4, AC2
MOVD &C4, L6
* 5-9 AC1
AC1 MOVW V200
V201
AC0
V199
V200
1 2
AC1
VW200
MOVD &VW200, AC1
VB200
AC1
V201
V202
V203
V204
3 4
5 6
7 8
AC0
1 2 3 4
MOVW *AC1, AC0
AC0
5-9
5-13

CPU
32
• 1
• 2
• 4
5–10
V199
V200
V201
V202
V203
V204
1 2
3 4
5 6
7 8
AC1
VW200
AC0
1 2 3 4
MOVD &VW200, AC1
MOVW *AC1, AC0
VB200
VW200
AC1
AC1
AC0
AC1
INCD AC1
V199
VW202
INCD AC1
V200
1 2
V201
3 4
V202
5 6
V203
V204
7 8
AC0
5 6 7 8
MOVW *AC1, AC0
AC1
VW202
AC0
5-10
5-14

CPU
5.3 S7-200 CPU
S7–200 CPU CPU
5-11
• CPU EEPROM CPU
• CPU CPU RAM
CPU
RAM
• CPU CPU RAM
RAM
RAM
EEPROM
CPU
V
CPU
V
M
M
5-11 S7-200 CPU
( ) CPU ( ) 5-12
CPU RAM CPU
(DB1) CPU EEPROM
5-15

CPU
CPU
V
(DB1):
S7-200 CPU
CPU
V
CPU
DB1
CPU
V
M
M
RAM
EEPROM
5-12
CPU 5-13 CPU RAM
(PC) EEPROM
RAM ( )
(PC)
CPU
S7-200 CPU
CPU
V
M
DB1
CPU
V
M
RAM
EEPROM
5-13
5-16

CPU
CPU
(M)
CPU M 14 (MB0
MB13) EEPROM 5-14 CPU
M
EEPROM
` RAM EEPROM ( )
CPU
V
M
M 14
MB0 MB13
EEPROM
CPU
V
M
5-14 (M) EEPROM
15
CPU EEPROM RAM CPU 5-
RAM
EEPROM ( )
CPU
V
CPU
CPU
V
M
M
5-15 CPU
5-17

CPU
CPU RAM RAM
RAM
5-16 V EEPROM V
RAM
EEPROM
CPU
V
RAM
V
V
CPU
V
M
M
5-16 ( RAM )
RAM ( ) CPU RAM
( ) (SM0.2)
1 5-17 EEPROM
RAM
RAM
EEPROM
CPU
V
V
CPU
V
M
M ( )
M .
memory
5-17 ( RAM )
5-18

CPU
5-18
V M C T
TONR STEP 7-Micro/WIN 32 M
CPU
View > System Block,
Retentive Ranges 5-18 CPU
Defaults
System Block
Analog Input Filters Pulse Catch Bits Background Time
Port(s) Retentive Ranges Password Output Table Input Filters
Data Area
Offset
Number of
Elements
Defaults
Range 0:
VB
0
5120
Clear
Range 1:
VB
0
0
Clear
Range 2: T
0
32
Clear
Range 3: T
64
32
Clear
Range 4:
C
0
256
Clear
Range 5:
MB
14
18
Clear
Configuration parameters must be downloaded before they take effect.
Not all PLC types support every System Block option. Press F1 to see which options
are supported by each PLC.
OK
Cancel
Apply
5-18 CPU
5-19

CPU
5.4
( ) EEPROM
V
EEPROM 15 20ms
EEPROM V
EEPROM
V EEPROM
31 (SMB31) 32 (SMB32) CPU V
EEPROM V 5-19 SMB31
SMB32
V
1. V SMW32
2. SM31.0 SM31.1 ( 5–19)
3. SM31.7 = 1
CPU SM31.7 SM31.7 1
EEPROM CPU SM31.7 0
V
SMB31
MSB
LSB
7 0
sv 0 0 0 0 0 s1 s0
00 -
01 -
10 -
11 -
:
CPU
SM31.7
0 =
1 =
EEPROM
SMW32
MSB
15
V
LSB
0
V0 V
5-19 SMB31 SMB32
5-20

CPU
EEPROM
CPU
EEPROM ( 10 100 )
EEPROM
S7-200 50ms EEPROM
5,000
EEPROM 11
5-21

CPU
5.5
CPU
•
• EEPROM V
• CPU
CPU
A
EEPROM
CPU
RAM
!
CPU
5-22

CPU
CPU
)
CPU (
1. CPU
2. CPU Program MEMORY Cartridge
5-20 CPU
3. ( )
RAM
EEPROM
CPU
V
CPU
CPU
V
M
M
V ( )
5-20 CPU
5-23

CPU
CPU
CPU
5-21 CPU ( )
• RAM
• RAM
• CPU EEPROM
CPU
CPU 224 CPU 221 CPU 222
CPU
RAM
EEPROM
CPU
V
CPU
V ( )
CPU
V
M
Ṃ
CPU
V ( )
5-21 ( ) CPU
5-24

CPU /
6
( )
I/O ( CPU
) I/O ( I/O ) S7-200 CPU I/O
6.1 I/O I/O 6–2
6.2 6–4
6.3 6–5
6.4 6–8
6.5 6–9
6.6 I/O 6–10
6.7 6–13
6-1

CPU /
6.1 I/O I/O
I/O ( I/O )
( )
I/O ( CPU )
• S7-200 CPU I/O CPU I/O
A
• S7-200 CPU 222 CPU 224 I/O
I/O
A
I/O
I/O
CPU I/O I/O I/O
CPU I/O I/O I/O
( )
CPU 8 (1 )
I/O
I/O
2
I/O
6-2

CPU /
I/O
I/O
6-1 6-2 I/O
I/O
(M)
CPU 221
I/O
I/O
I0.0 Q0.0
I0.1 Q0.1
I0.2 Q0.2
I0.3 Q0.3
I0.4
I0.5
6-1 CPU 221 I/O
0 1 2
CPU 224
4 In /
4 Out
8
In
8
Out
I/O
I/O
I0.0 Q0.0
I0.1 Q0.1
I0.2 Q0.2
I0.3 Q0.3
I0.4 Q0.4
I0.5 Q0.5
I0.6 Q0.6
I0.7 Q0.7
I1.0 Q1.0
I1.1 Q1.1
I1.2
I1.3
I1.4
I1.5
I2.0 Q2.0
I2.1 Q2.1
I2.2 Q2.2
I2.3 Q2.3
I3.0
I3.1
I3.2
I3.3
I3.4
I3.5
I3.6
I3.7
Q3.0
Q3.1
Q3.2
Q3.3
Q3.4
Q3.5
Q3.6
Q3.7
6-2 CPU 224 I/O
6-3

CPU /
6.2
S7-200 CPU
( 0.2ms 12.8ms ) CPU A
6-3
CPU
CPU
View > System Block
System Block
Analog Input Filters
Pulse Catch Bits
Background Time
Port(s)
Retentive Ranges
Password
Output Table
Input Filters
I0.0 - I0.3
4.40
ms
Defaults
I0.4 - I0.7
4.40
ms
I1.0 - I1.3
4.40
ms
I1.4 - I1.5
4.40
ms
Configuration parameters must be downloaded before they take effect.
Not all PLC types support every System Block option. Press F1 to see
which options are supported by each PLC.
OK
Cancel
Apply
6-3
6-4

CPU /
6.3
S7–200 CPU
PLC
CPU
CPU
PLC 6-4
CPU
n
CPU n+1
6-4 PLC
( )
6-5

CPU /
6-5
CPU
6-5
6-6
CPU
n
CPU n+1
6-6
6-6

CPU /
Micro/ WIN 32
View > System Block
Pulse Catch Bits
6–7 Pulse Catch CPU STEP 7-
System Block
Por(ts) Retentive Ranges Password
Output Table Input Filters
Analog Input Filters Pulse Catch Bits Background Time
Select desired inputs
Defaults
I0.x
7 6 5 4 3 2 1 0
I1.x
Configuration parameters must be downloaded before they take effect.
Not all PLC types support every System Block option. Press F1 to see
which options are supported by each PLC.
OK
Cancel
Apply
6-7
6-7

CPU /
6.4
S7–200 CPU CPU
STOP CPU STOP
CPU
CPU
CPU
CPU
CPU
View > System Block Output Table
6–8
STOP
• Freeze Output OK
•
RUN STOP 1 (On) OK
STEP 7-Micro/WIN 32
0 (Off)
CPU
System Block
Port(s)
Analog Input Filters
Retentive Ranges
Pulse Catch Bits
Password
Output Table
Background Time
Input Filters
Freeze Outputs
7 6 5 4 3 2 1 0
Defaults
7 6 5 4 3 2 1 0
Q0.x
Q8.x
Q1.x
Q9. x
Q2.x
Q10.x
Q3.x
Q11.x
CPU
Q4.x
Q12.x
Q5.x
Q13.x
Q6.x
Q14.x
Q7.x
Q15.x
Configuration parameters must be downloaded before they take effect.
Not all PLC types support every System Block option. Press F1 to
see which options are supported by each PLC.
OK Cancel Apply
6-8
6-8

CPU /
6.5
CPU 222 CPU 224
( )
Micro/WIN 32 6-9
STEP 7-
View > System Block
6–9 STEP 7-Micro/WIN 32
Analog Input Filters
OK
System Block
Port(s) Retentive Ranges Password Output Table Input Filters
Analog Input Filters Pulse Catch Bits Background Time
Defaults
Select which Analog Inputs to filter
AIW 14- 0
14
12
10
8
6
4
2
0
AIW 30 - 16
30
28
26
24
22
20
18
16
Number of samples Deadband (16 - 4080)
64 320
0 = No Deadband
Configuration parameters must be downloaded before they take effect.
Not all PLC types support every System Block option. Press F1 to see
which options are supported by each PLC.
OK
Cancel
Apply
6-9
6-9

CPU /
6.6 I/O
S7–200 CPU I/O CPU I/O
A
S7–200 CPU 20 kHz
CPU
• HSC0 HSC4
• HSC1 HSC2
• HSC3 HSC5 ( )
6–1 HSC0 HSC3 HSC4 HSC5
S7–200 CPU
6-1 HSC0, HSC3, HSC4, HSC5
HSC0 HSC3 HSC4 HSC5
I0.0 I0.1 I0.2 I0.1 I0.3 I0.4 I0.5 I0.4
0 - - - -
1 - - - -
2 - - - - - - - -
3 - - - -
4 - -
5 - - - - - - - -
6 - - - -
7 - -
8 - - - - - - - -
9 A B - - A B - -
10 A B - A B -
11 - - - - - - - -
6-10

CPU /
3 10 ( )
HSC0 HSC3 HSC0 HSC3 I0.1
HSC4 HSC5 I0.4
I0.0 I0.3
HSC0 2 I0.0 I0.2 I0.1
HSC3
6–2 HSC1 HSC2 CPU 224
6-2 HSC1 HSC2
HSC1
HSC2
I0.6 I0.7 I1.0 I1.1 I1.2 I1.3 I1.4 I1.5
0 - - - - - -
1 - - - -
2 - -
3 - - - -
4 - -
5
6 - - - -
7 - -
8
9 A B - - A B - -
10 A B - A B -
11 A B A B
1X 4X HSC 1 HSC 2
9 SIMATIC 9.5
6-11

CPU /
S7–200 CPU Q0.0 Q0.1
(PTO)
(PWM)
• PTO ( 50%)
1 4,294,967,295 (s)
(ms) 50 65,535 2 65,535
( 75ms) (PTO)
PTO
255
• PWM
50 65,535 2
65,535 0 65,535 0 65,535
100% 0 0
9 SIMATIC 9.5
6-12

CPU /
6.7
( )
(SMB28 SMB29 )
SMB28 0 SMB29
1 0 255 ±2
( )
( ) 6-10
I0.0 B _I
Q0.0
/
EN
OUT
SMB28 IN VW100
IN
T33
ENO
TON
LAD
0
VW100
STL
LD I0.0
BTI SMB28, VW100
LDN Q0.0
TON T33, VW100
LD T33
= Q0.0
T33
VW100
PT
Q0.0
T33
Q0.0
6-10
6-13

7
STEP 7-Micro/WIN 32 3.0
S7–200
7.1 ? 7- 2
7.2 7- 7
7.3 7- 9
7.4 7- 16
7.5 7- 27
7.6 7- 31
7.7 PC/PPI 7- 35
7.8 7- 41
7-1

7.1
S7–200 CPU Windows
95 Windows 98 Windows NT STEP 7-
Micro/WIN 32 SIMATIC ( PG740)
PC
• 7-1
• 7-2
• 11– 11–
S7-200 CPU S7-200 CPU
• 10– 10–
S7-200 CPU
7–1 7–2 S7-200 CPU STEP 7-
Micro/WIN 32
S7-200 CPU
CPU CPU TD 200
7.5
0
PC/PPI
S7-200 CPU
2
RS-485
S7-200 CPU
3
RS-232
S7-200 CPU
4
7-1 PC/PPI S7-200 CPU
7-2

TD 200
OP15
CPU 224
CP
MPI
(RS-485)
CPU 221 CPU 224 CPU 221 CPU 224
7-2 CP
7-1 STEP 7-Micro/WIN 32
7-1 STEP 7-Micro/WIN 32
PC/PPI PC 9.6 k
19.2 k
PPI
CP 5511 II PCMCIA– PC PPI MPI
9.6 k
PROFIBUS
CP 5611 PCI– ( 19.2 k
3 ) 187.5 k
PC PPI MPI
MPI PG
PC ISA–
PROFIBUS
7-3

CP
MPI
SIMATIC
SIMATIC
7–1
STEP 7-Micro/WIN 32 PG/PC
7.3 Windows 95 Windows 98 Windows NT
(PPI MPI PROFIBUS)
PROFIBUS RS–485 CP 5511 PCMCIA
9 D MPI CP
RS–485 7–2
ST 70 SIMATIC
Windows 95 Windows 98 Windows NT 4.0
• STEP 7-Micro/WIN 32
• STEP 7-Micro/WIN 32
7-4

✂
STEP 7-Micro/WIN 32 ?
STEP 7-Micro/WIN 32
• View > Communications
• STEP 7-Micro/WIN 32 ( 7–3)
Project Edit View PLC Debug Tools Windows Help
View
Program Block
Symbol Table
Status Chart
Data Block
System Block
Cross Reference
Communications
7-3 STEP 7–Micro/WIN 32
7-5

✂
7-4
PG/PC
Communications Links
Communications Setup
Double
Setting
click the
the
icon
PG/PC
representing
Interface
the PLC
you
wish to communicate with.
Double click Access the Path module icon to change to
communication parameters.
Double click Access the modem Point of Application: icon to setup the
modem parameters Micro/WIN -->PC/PPI or dial to cable start (PPI) modem
communications.
(Standard for Micro/WIN)
Interface Parameter set used:
PC/PPI cable (PPI)
Communication Parameters
Remote Address: MPI-ISA on 2 board (MPI)
MPI-ISA on board (PPI)
Local Address: MPI-ISA 0 Card (PROFIBUS)
Protocol:
PC
PPI
Adapter (MPI)
PC Adapter (PROFIBUS)PC/
Transmission
PPI
Rate:
cable (PPI)
9.6 bps
Module: PC/PPI cable (COM 1)
(Assigning Parameters to a PC/PPI Cable
Mode PC/PPI for a PPI cable Network) (COM 1)
Interfaces
Properties...
Copy...
Delete
PC/PPI
cable
Address: 0
Install...
OK
Cancel
Help
7-4 PG/PC
7-6

7.2
7-5 /
Resources
Windows NT 4.0
1. PG/PC ( 7–4) Install
2.
7-5 /
3. Install - ->
4. Close PG/PC
( 7-4)
steps:
1.
2. < - - Remove
3. Close PG/PC
( 7-4)
Install/Remove
Interfaces
Selection:
CPU5412
CPU5511 (Plug & Play)
CPU5611 (Plug & Play)
MPI-ISA on board
PC Adapter (PC/MPI-Cable)
PC/PPI cable
Install -->

Windows NT
Windows NT Windows 95
Windows NT
Windows 95
Windows NT Windows NT
( 7–5 ) (Resources) ( 7-6 )
( )
Resources
Resources - MPI-ISA Card
Memory Range:
#000CC000-000CC7FF
Input/Output Range:
Interrupt Request: #15
Direct Memory Access:
# - Current hardware setting
* - Possible conflict with other hardware
OK
Cancel
Help
7-6 Windows NT
Windows NT
PC/PPI
7-8

7.3
PG/PC Micro/WIN
( 7-4) ( STEP 7
WinCC ) PG/PC
Micro/WIN
CPU
PPI
PG/PC
PC/PPI
(PPI)
PC/PPI CPU 222
7 )
PG/PC
Properties... ( 7-
1. PG/PC ( 7-4 )
Micro/WIN
2. 7.2
3. S CPU PPI
4. PG/PC
5. PG/PC Properties...
7-9

PC/PPI
(PPI)
PC/ PPI
Windows 95 Windows 98 Windows NT 4.0
PPI
PC/PPI PG/PC Properties...
PC/PPI 7–7
S7-200 CPU STEP 7-Micro/WIN 32 PPI
STEP 7-Micro/WIN 32 ( TD 200
) PG/PC PC/PPI
Multiple Master Network Windows NT 4.0
STEP 7-Micro/WIN 32 PPI STEP
7-Micro/WIN 32
PG/PC
PC/PPI Multiple Master Network
7-10

PPI
1. PPI
STEP 7-Micro/WIN 32 0 STEP 7-
Micro/WIN 32
PLC
2 ( PC PLC )
2.
3. STEP 7-Micro/WIN 32
( Multiple Master Network ) Windows
NT 4.0 STEP 7-Micro/WIN 32
( Multiple Master Network )
4. STEP 7-Micro/WIN 32 PPI
9.6 k 19.2 k
5. STEP 7-Micro/WIN 32
Setting the PG/PC Interface
Access Path
Access Properties Point - PC/PPI of Application: cable (PPI)
PPI
Local Connection
Station Parameters
Address:
Timeout:
0
1s
Properties...
Network Parameters
✔ Multiple Master Network
Transmission Rate:
Highest Station Address:
Copy...
Delete
9.6 kbps
31
OK
Default
Cancel
Help
OK
Cancel
Help
7-7 --PC/PPI PPI
7-11

✂
6. 7–8
7. PC/PPI
8. OK PG/PC (Setting the PG/PC Interface)
Setting the PG/PC Interface
Access Path
Access Properties Point - PC/PPI of Application: cable (PPI)
Micro/WIN -->PC/PPI cable (I
PPI Local Connection
(Standard for Micro/WIN)
Interface Parameter set used:
COM port:
PC/PPI cable (PPI)
MPI-ISA on board (MPI)
MPI-ISA on board Use (PPI) Modem
MPI-ISA Card (PROFIBUS)
PC Adapter (MPI)
PC Adapter (PROFIBUS)PC/
PPI cable (PPI)
(Assigning Parameters to a PC/PPI Cable
for a PPI Network)
1
Properties...
Copy...
Delete
Interfaces
OK
Default
Cancel
Help
Install...
OK
Cancel
Help
7-8 --PC/PPI
MPI
CP
MPI
RS-485
STEP 7-Micro/WIN 32 ( MPI CP
SIMATIC ) ( PC/PPI )
(TD 200) 7–9 TD 200
7-12

PPI STEP 7-Micro/WIN 32
MPI CP MPI CP STEP 7-Micro/WIN 32
• STEP 7-Micro/WIN 32 ( 0 ) 2 TD 200
( 5 1 ) CPU 224 ( 3 4 )
• (NETR NETW) CPU224
• 3 2 (CPU 222) 4 (CPU 224)
• 4 2 (CPU 222) 3 (CPU 224)
0 CPU 222
2
CPU 224
3
CPU 224
4
TD 200
1
TD 200
5
MPI
(RS-485)
2 4
2 3 4
7-9 MPI CP S7-200 CPU
7-13

CP MPI (PPI)
PPI
Windows 95 Windows 98 Windows NT 4.0
• CP 5511
• CP 5611
• MPI
PG/PC (Setting the PG/PC Interface)
MPI CP PPI Properties... XXX
(PPI) XXX MPI–ISA
7-10
S7-200 CPU215 1 MPI CPU 215
MPI S7-200 (
6ES7-298-8FA01-8BH0)
PPI
1. PPI
STEP 7-Micro/WIN 32
2.
3. STEP 7-Micro/WIN 32
4. STEP 7-Micro/WIN 32
5. OK PG/PC (Setting the PG/PC Interface)
7-14

Properties - MPI-ISA Card (PPI)
PPI
Station Parameters
Address:
Timeout:
0
1s
Network Parameters
✔
Multiple Master Network
Transmission Rate:
Highest Station Address:
9.6 kbps
31
OK
Default
Cancel
Help
7-10 MPI-ISA (PPI)
7-15

7.4
PC/PPI
(Configure Modems)
CPU
STEP 7-Micro/WIN 32
settimgs displayed
STEP 7-Micro/WIN 32 at the
1. "View > Communications" ( )
the PG/PC Interface)
PC/PPI
PC/PPI PG/PC (Setting
PC
2. PG/PC (Setting the PG/PC Interface) PC/PPI
(PPI) 7.2
3. Properties CPU PC/PPI (PPI)
7–8
4. PC/PPI (PPI)
5. (COM) Use Modem
7–8
6. OK PG/PC (Setting the PG/PC Interface)
7. OK Communications Setup)
( 7-11)
7-16

Communications Links
Communications Setup
Double click the icon representing the PLC
you wish to communicate with.
Double click the interface icon to change to
communication parameters.
Double click the modem icon to setup the
modem parameters or dial to start modem
communications.
PC/PPI cable
Address: 0
Bausch Induline IL 4K4
(11-bit, 9600 Baud, Predefined)
Connect Modem
Communication Parameters
Remote Address 2
Local Address 0
Module PC/PPI cable (COM 1)
(None Selected)
Double-Click
to Refresh
Protocol
PPI
Transmission Rate 9.6 kbps
Mode
11-bit
7-11
7-17

8.
(Modem Setup) ( 7–12)
9.
Add
AT
10. (10– 11– )
(10– 11– )
Configure
Communications Links
Communications Setup
Double click the icon representing the PLC
you
wish to communicate with.
Double click the interface icon to change to
communication parameters.
Double click the modem icon to setup the
modem parameters or dial to start modem
communications.
Modem Setup
Communication Local Modem Parameters
Remote Address: Bausch 2 Induline IL 14K4 (11-bit)
Local Address: Remote 0Modem
Module: PC/PPI cable (COM 1)
PC/PPI cable
Address: 1
Bausch Induline IL 4K4
(11-bit, 9600 Baud, Predefined)
Connect Modem
(None Selected)
Double-Click
to Refresh
Protocol: PPI
Add
Remove...
Configure...
Transmission Rate: 9.6 bps
Communications Mode
Mode
Note: Both Local and Remote Modems must communicate using
the same communications mode.
10-Bit Communications
11-Bit Communications
OK
Cancel
7-12
7-18

11. (Configure) ( 7–13)
AT
12. (
PC) Program/Test
OK
13. (
)
Configure
Bausch Induline IL 14K4 (11-bit)
Initialization String
AT&F0&K0X3&D0
Communication String
*W=9600,8,E,1
Prefix
ATDT
Hangup String
Suffix
^M
Timeout
ATH0 30
Status
Program/Test
Advanced...
OK
Cancel
7-13
7-19

1. ( 7–11)
Modem Setup ( 7-14)
2.
Add
AT
3. (10– 11– )
(10– 11– )
Configure
4. (Configure) ( 7–15)
AT
5. ( PC)
Program/Test
6. OK
Modem Setup
Local Modem
Remote Modem
Bausch Induline IL 14K4 (11-bit)
Add
Remove...
Configure...
Communications Mode
Note: Both Local and Remote Modems must communicate using
the same communications mode.
10-Bit Communications
11-Bit Communications
OK
Cancel
7-14
7-20

Configure
Bausch Induline IL 14K4 (11-bit)
Initialization String
AT&F08K0X3&D0
Communication String
*W=9600,8,E,1
Suffix
&Y0&W0^M
Status
Program/Test
Advanced...
OK
Cancel
7-15
7-21

7. ( PC)
8. S7–200
9. PC
1. Communications Setup Connect Modem
7–16
2. Dial Phone Number
3. Connect
4.
Communications Links
Communications Setup
Double click the icon representing the PLC
you wish to communicate with.
Double click the interface icon to change to
communication parameters.
Double click the modem icon to setup the
modem parameters or dial to start modem
communications.
PC/PPI cable
Address: 0
Bausch Induline IL 4K4
(11-bit, 9600 Baud, Predefined)
Connect Modem
Dial
Communication Parameters
Remote Address: 2 Phone Number:
Local Address: 0
Module: PC/PPI cable (COM 1)
Protocol: PPI
Transmission Rate: 9.6 bps
Mode
11-bit
Connect
(None Selected)
Cancel
Double-Click
to Refresh
7-16
7-22

10- S7–200 CPU STEP 7-Micro/WIN 32
Windows 95 Windows 98 Windows NT
SIMATIC ( PG 740) STEP 7-Micro/WIN 32
S7-200 CPU (Hayes) 10
S7–200 CPU
• S7–200 CPU CPU 221 CPU 222 CPU 224 10
S7–200 CPU 10–
• PC SIMATIC 10 RS–
232
• 5– PC/PPI ( 10
DTE ) CPU
• 9– 25– ( )
4– PC/PPI 10-
RS-232
COMx
25- 9-
5-
PC/PPI
PG/
PC
10-
10-
CPU 224
Note: x =
RS-232
RS-232
RS-485
7-17 5- PC/PPI 10 S7-200
7-23

S7–200 1
8 9600
7-2 7–18 25 9
7-2 10– MODERM
8 DTR
1
10– 9600 9600
1
25- 9-
PC/PPI
25- 9-
2
2
3
3
4
7
7 5
7-18 25 9
7-24

10- S7–200 CPU STEP 7-Micro/WIN 32
Windows 95 Windows 98 Windows NT
SIMATIC STEP 7-Micro/WIN 32
S7-200 CPU 11-
S7-200 CPU ( 7-19)
• PC SIMATIC 11-
RS–232
• PC/PPI
- CPU 5- PC/PPI (
11- DTE )
- 4- PC/PPI ( )
CPU
• CPU PROFIBUS
( 7-23 )
RS-232
COMx
25- 9-
4-
PC/PPI
PG/
PC
11-
11-
CPU 224
x =
RS-232
RS-232
7-19 4- PC/PPI 11- S7-200
7-25

PPI
PPI
S7–200 PLC 11– S7–200
1 8 1 ( ) 1
9600
7-3
7-20 25 - 9-
7-3 11-
11-
8 DTR
1
9600 9600
1
1 ( )
25- 9-
Modem
PC/PPI
25- 25- 25- 9-
2
3
4
5
6
7
8
20
2
3
4
5
6
7
8
20
2
3
7
5
2
3
7
5
7-20 25- 9-
7-26

7-21 S7–200 CPU STEP 7-Micro/WIN
32 S7–200 CPU
CPU 7-21 CPU TD 200
0
PC/PPI
S7-200 CPU
2
RS-485
S7-200 CPU
3
RS-232
S7-200 CPU
4
TD 200
5
7-21 PC/PPI S7-200 CPU
7-27

S7–200 CPU S7–200 CPU
• (Point-to-Pioint) (PPI)
• (Multi-Point) (MPI)
• PROFIBUS
(OSI) 7 PPI MPI
EN 50170
(PROFIBUS)
8 1
PROFIBUS
RS–485
32 1,200 (3,936 )
7-6
9,600 (31,488 )
127 ( 0 126) 32
STEP 7-
Micro/WIN 32 SIMATIC 0 (
TD200 OP3 OP7) 1 2
7-28

PPI
PPI / ( CPU SIMATIC
TD 200)
S7–200 CPU
PPI S7–200 CPU RUN
( C SMB30 ) PPI
(NETR) (NETW) CPU
9.16 -SIMATIC Communications Instructions
S7-200 CPU PPI
32
PPI
MPI
MPI / /
S7–300 CPU / S7–300 CPU
S7–200 CPU / S7–200 CPU
MPI
SIMATIC
CPU CPU
( CPU)
CPU
CPU
SIMATIC
CPU
CPU
SIMATIC
S7-200 CPU S7-300 S7-400 CPU
S7-200 CPU XGET XPUT S7-300 S7-400
S7-200 ( S7-300 S7-400 )
7-29

PROFIBUS
PROFIBUS I/O ( I/O)
PROFIBUS
PROFIBUS
I/O
I/O
DP
S7-200 CPU
(XMT)
(RCV)
SMB30 ( 0) CPU RUN
CPU STOP PPI
9 9.16 SIMATIC
Communications Instructions
7-30

7.6
S7–200
S7–200 CPU EN 50170 PROFIBUS RS–
485 9- D 7-22 7-4
5
1
9
6
7-22 S7-200 CPU
7-4 S7–200
PROFIBUS 0
1
2 24 V
3 RS–485 B RS–485 B
4 RTS (TTL)
5 5 V
6 +5 V +5 V, 100
7 +24 V +24 V
8 RS–485 A RS–485 A
9 10– ( )
7-31

CPU
( 7-23) E
SIMATIC
CPU
CPU ( TD 200 OP3)
!
2.3
7-32

= On = Off = On
On
Off
On
A B A B
A B A B
A B A B
12 mm 1/2
TxD/RxD +
B
390 Ù
6
3
#
TxD/RxD +
TxD/RxD -
TxD/RxD +
B
A
B
6
3
#
TxD/RxD -
A
220 Ù
8
TxD/RxD -
A
8
390 Ù
= On
5
1
= Off
5
1
7-23
PROFIBUS
7-5 PROFIBUS
PROFIBUS
E
7-5 PROFIBUS
General Features
24 AWG (0.22 mm 2 )
< 60 pF/m
100 ~ 120
PROFIBUS 7-6
7-5
7-6 PROFIBUS
9.6 k ~ 19.2 k 1,200 (3,936 )
187.5 k 1,000 (3,280 )
7-33

PROFIBUS 7-24
9,600 PROFIBUS 32
1,200 m (3,936 ) 32
1,200 m (3,936 ) 9
E
CPU CPU CPU CPU
7-24
32 /1,200 (3,936 .) 32 /1,200 (3,936 .)
7-34

7.7 PC/PPI
PC/PPI S7–200 CPU RS-232
PC/PPI
• RS-232 PC/PPI 5 DIP
A
( 7–26) PC/PPI
• RS-232 PC/PPI 4 DIP
PC/PPI S7–200
( 6ES7-298-8FA01-8BH0)
PC/PPI 600 ~ 38,400 PC/PPI
DIP 7-7
7-7 PC/PPI
(1 = )
38400 000
19200 001
9600 010
4800 011
2400 100
1200 101
600 110
RS-232 RS-485 PC/PPI
RS-485 RS-232 PC/PPI RS-232
RS-232
DIP ( 7-8)
7-35

S7–200 CPU
PC/PPI
• S7–200 CPU RS-232
RS-232
S7-200 CPU
• RS–232 S7-200 CPU
RS-232
S7-200 CPU
RS-485
PC/PPI
RS-232
7-8 PC/PPI ( )
(ms)
38400 0.5
19200 1
9600 2
4800 4
2400 7
1200 14
600 28
7-36

PC/PPI
5– PC/PPI S7 200 CPU RS–232
PC/PPI
RS–232 ( RTS CTS DTR)
RTS 5- PC/PPI
(DTE)
DTR
5– PC/PPI RS-232 (DCE)
(DTE)
5– PC/PPI (CTS) 7–9
7–10 PC/PPI
(DCE)
PC/PPI
DPI 5 PC/PPI RS232
(DTE) PC/PPI
9- 25- 7-
25 9- 25-
PC/PPI
RS-232
S7-200
25- 9-
9
2
3
7
5
25
2 TD
3 RD
4 RTS
7 GND
7-25 5- PC/PPI
7-37

(DCE) 5 0 (
7-26) (DTE) 5 1
7–9 DTE PC/PPI RS–485 RS–232
7-10 DCE PC/PPI RS–485 RS–232
DTE PC/PPI RTS
DIP ( = 0, = 1):
1
RS-232
S7-200 CPU
0
PC/PPI
RS-485
PPI
1
0
1 2 3 4 5
PC/PPI
PC
123 SWITCH 4 1 = 10 BIT
38.4K 000 0 = 11 BIT
19.2K 001
9.6K 010 SWITCH 5 1 = DTE
2.4K 100 0 = DCE
1.2K 101
7-26 PPI CPU
7-38

PC/PPI 4 S7–200 CPU 10– 11–
PPI CPU STEP 7-Micro/WIN 32
11-
7-9 RS–485 RS-232 DTE
RS–485 RS–232 DTE 1
1 (RS–485 ) 1 (DCD) ( )
2 24 V (RS–485 ) 2 (RD)
( PC/PPI )
3 B (RxD/TxD+) 3 (TD)
( PC/PPI )
4 RTS (TTL ) 4 (DTR)
( )
5 (RS–485 ) 5 (RS–232 )
6 +5 V ( 100 ) 6 (DSR) ( )
7 24 V y 7 (RTS)
( PC/PPI )
8 A (RxD/TxD-) 8 (CTS) ( )
9 9 (RI) ( )
1 9 25
7-10 RS–485 RS–232 DCE
RS–485
RS–232 DCE
1 (RS–485 ) 1 (DCD) ( )
2 24 V (RS–485 ) 2 (RD)
( PC/PPI )
3 B (RxD/TxD+) 3 (TD)
( PC/PPI )
4 RTS (TTL ) 4 (DTR)
( )
5 (RS–485 ) 5 (RS–232 )
6 +5 V ( 100 ) 6 (DSR) ( )
7 24 V 7 (RTS) ( )
8 A (RxD/TxD-) 8 (CTS) ( )
9 9 (RI) ( )
7-39

4- PC/PPI
4– PC/PPI S7 200 CPU RS–232
RS–232 ( RTS CTS DTR)
PC/PPI 4- PC/PPI
RTS
DTR
(DCE) 4- PC/PPI RS–232
(DCE) ( DCE)
7-27
PC/PPI
RS-232
S7-200
9- 25-
9
2
3
5
25
2 TD
3 RD
4 RTS
5 CTS
6 DSR
8 DCD
20 DTR
7 GND
7-27 9- 25- 11
7-40

7.8
•
• (GUF)
•
S7–200 CPU STEP 7-
Micro/WIN32 CPU (GUF)
GUF CPU GUF1
CPU GUF 2 CPU
GUF
GUF
GUF
CPU PPI GUF
(HSA)
( )
HSA
HAS HSA CPU PPI
HAS STEP 7-Micro/WIN 32 CPU CPU
HSA
7-41

S7–200 CPU 31
PPI
( ) PPI 7-28
7-28 4 S7 200 CPU TD200
CPU214
CPU
7-28 TD 200 CPU 224 NETR
NETW 7-29
COM PROFIBUS
CPU 222
2
CPU 222
4
CPU 224
6
CPU 224
8
TD 200
9
TD 200
7
TD 200
5
TD 200
3
7-28
7-42

TD 200 ( 3) CPU 222 ( 2) TD 200 ( 5)
CPU 222 ( 4) CPU 224 ( 6) 2 4 8
CPU 224 ( 8) 2 4 6 6 (4
TD 200 CPU 224 ) ( CPU 222 )
3 2
5 5 4
6 6 2 4 8
7 3 5
6 7 8 9 3
6
(4 ) 9600
900ms
7-43

S7 200
PPI ( PPI
) CPU (NETR) (NETW) CPU
9.16 SIMATIC
7-29
•
•
• CPU
• CPU 10ms
(T hold ) = (128 n ) * 11 / * 1/
(T rot ) = 1 T hold + 2 T hold + . . . + m T hold
n ( )
m
, 6
T ( ) = (128 + 4) < 11 / < 1/9600 / = 151.25 ms/
T ( ) = 151.25 ms/ * 6 =907.5ms
( )
7-29 NETR NETW
7-44

7-11 7-12 7-13 9.6 k 19.2 k 187.5 k
(NETW)
CPU
(NETR)
7-11 9.6 k
9.6 k
2 3 4 5 6 7 8 9 10
1 0.30 0.44 0.59 0.74 0.89 1.03 1.18 1.33 1.48
2 0.30 0.45 0.60 0.74 0.89 1.04 1.19 1.34 1.49
3 0.30 0.45 0.60 0.75 0.90 1.05 1.20 1.35 1.50
4 0.30 0.45 0.61 0.76 0.91 1.06 1.21 1.36 1.51
5 0.30 0.46 0.61 0.76 0.91 1.07 1.22 1.37 1.52
6 0.31 0.46 0.61 0.77 0.92 1.07 1.23 1.38 1.54
7 0.31 0.46 0.62 0.77 0.93 1.08 1.24 1.39 1.55
8 0.31 0.47 0.62 0.78 0.94 1.09 1.25 1.40 1.56
9 0.31 0.47 0.63 0.78 0.94 1.10 1.26 1.41 1.57
10 0.32 0.47 0.63 0.79 0.95 1.11 1.27 1.42 1.58
11 0.32 0.48 0.64 0.80 0.96 1.11 1.27 1.43 1.59
12 0.32 0.48 0.64 0.80 0.96 1.12 1.28 1.44 1.60
13 0.32 0.48 0.65 0.81 0.97 1.13 1.29 1.45 1.62
14 0.33 0.49 0.65 0.81 0.98 1.14 1.30 1.46 1.63
15 0.33 0.49 0.66 0.82 0.98 1.15 1.31 1.47 1.64
16 0.33 0.50 0.66 0.83 0.99 1.16 1.32 1.49 1.65
7-45

7-12 19.2 k
19.2 k
2 3 4 5 6 7 8 9 10
1 0.15 0.22 0.30 0.37 0.44 0.52 0.59 0.67 0.74
2 0.15 0.22 0.30 0.37 0.45 0.52 0.60 0.67 0.74
3 0.15 0.23 0.30 0.38 0.45 0.53 0.60 0.68 0.75
4 0.15 0.23 0.30 0.38 0.45 0.53 0.61 0.68 0.76
5 0.15 0.23 0.30 0.38 0.46 0.53 0.61 0.69 0.76
6 0.15 0.23 0.31 0.38 0.46 0.54 0.61 0.69 0.77
7 0.15 0.23 0.31 0.39 0.46 0.54 0.62 0.70 0.77
8 0.16 0.23 0.31 0.39 0.47 0.55 0.62 0.70 0.78
9 0.16 0.24 0.31 0.39 0.47 0.55 0.63 0.71 0.78
10 0.16 0.24 0.32 0.40 0.47 0.55 0.63 0.71 0.79
11 0.16 0.24 0.32 0.40 0.48 0.56 0.64 0.72 0.80
12 0.16 0.24 0.32 0.40 0.48 0.56 0.64 0.72 0.80
13 0.16 0.24 0.32 0.40 0.48 0.57 0.65 0.73 0.81
14 0.16 0.24 0.33 0.41 0.49 0.57 0.65 0.73 0.81
15 0.16 0.25 0.33 0.41 0.49 0.57 0.66 0.74 0.82
16 0.17 0.25 0.33 0.41 0.50 0.58 0.66 0.74 0.83
7-13 19.2 k
187.5 k
2 3 4 5 6 7 8 9 10
1 8.68 13.02 17.37 21.71 26.05 30.39 34.73 39.07 43.41
2 8.80 13.20 17.60 22.00 26.40 30.80 35.20 39.60 44.00
3 8.92 13.38 17.83 22.29 26.75 31.21 35.67 40.13 44.59
4 9.03 13.55 18.07 22.59 27.10 31.62 36.14 40.66 45.17
5 9.15 13.73 18.30 22.88 27.46 32.03 36.61 41.18 45.76
6 9.27 13.90 18.54 23.17 27.81 32.44 37.08 41.71 46.35
7 9.39 14.08 18.77 23.47 28.16 32.85 37.55 42.24 46.93
8 9.50 14.26 19.01 23.76 28.51 33.26 38.02 42.77 47.52
9 9.62 14.43 19.24 24.05 28.86 33.67 38.49 43.30 48.11
10 9.74 14.61 19.48 24.35 29.22 34.09 38.95 43.82 48.69
11 9.86 14.78 19.71 24.64 29.57 34.50 39.42 44.35 49.28
12 9.97 14.96 19.95 24.93 29.92 34.91 39.89 44.88 49.87
13 10.09 15.14 20.18 25.23 30.27 35.32 40.36 45.41 50.45
14 10.21 15.31 20.42 25.52 30.62 35.73 40.83 45.84 51.04
15 10.33 15.49 20.65 25.81 30.98 36.14 41.30 46.46 51.63
7-46

S7–200
8
CPU
8.1 STEP 7–Micro/WIN 32 8–2
8.2 S7–200 CPU 8–7
8-1

S7–200
8.1 STEP 7-Micro/WIN 32
Micro/WIN 32
L
A
D
ADD_I
EN ENO
16
16 (OUT)
F
B
D
IN1
IN2
OUT
T
IN1 + IN2 = OUT
IN1 - IN2= OUT
S
T
L
✓
221
SUB_I
EN ENO
IN1
IN2
+I IN1, OUT
-I IN1, OUT
OUT
T
✓ ✓
222 224
IN1 + OUT = OU T
OUT-IN1=OUT
ENO = 0
SM1.1 ( ) SM4.3 ( ) 0006 ( )
SM1.0 ( ) SM1.1 ( ) SM1.2 ( )
IN1, IN2
VW, IW, QW, MW, SW, SMW, LW, AIW, T, C, AC, Constant, *VD,
*AC, *LD
OUT VW, IW, QW, MW, SW, SMW, LW, T, C, AC, *VD, *AC, *LD INT
INT
8-2

S7–200
:
Micro/WIN 32 : (LAD)
(FBD) SIMATIC (STL)
( ) SIMATIC
( )
/
/ ( )
/ /
SIMATIC /
1
( ) /
LAD/FBD/STL /
CPU : CPU CPU
221 CPU 222 CPU 224.
: 8-2
IEC
SIMATIC
SIMATIC (CTU) IEC CTU
ENO = 0 : LAD/FBD ENO
ENO 0
SM : SM
8-3

S7–200
: LAD/FBD/STL
8-3 CPU
LAD FBD
EN/ENO 8–1 LAD FBD
LAD FBD
8-1 LAD FBD EN/ENO
/
LAD EN BOOL
ENO
BOOL
FBD EN I, Q, M, S, SM, T, C, V, L, Power Flow BOOL
ENO I, Q, M, S, SM, T, C, V, L, Power Flow BOOL
:
( ) STEP 7-Micro/WIN 32
LAD
FBD
NETWORK
FBD
: LAD FBD STL
STL
LAD
STEP 7-Micro/WIN 32
EN/ENO : EN ( ) LAD FBD
STL
STL 1
ENO ( ) LAD FBD EN
ENO
EN
8-4

S7–200
SIMATIC STL ENO ENO LAD
FBD STL ENO STL
AENO (AND ENO)
ENO
/ : LAD FBD
8–1
LAD
JMP
NEXT
FBD
JMP
NEXT
8-1 LAD
:
JMP CRET LBL
NEXT SCR SCRE FBD
: SIMATIC FBD IEC IEC FBD
0
8-5

S7–200
STEP 7-Micro/WIN 32 : STEP 7-Micro/WIN 32
• --->
• --->>
• var1
• #var1
• ? ????
• >
• >| ENO
• IEC %
FBD : FBD
8–2 Q0.0 I0.0 I0.1
I0.0
AND
Q0.0
I0.1
8-2 FBD
FBD : FBD
( 8–3) .
I0.0
AND
Q0.0
I0.1
8-3 FBD
FBD Tab : Tab
8-6

S7–200
8.2 S7–200 CPU
8-2 S7–200 CPU
CPU 221 CPU 222 CPU 224
2 K 2 K 4 K
1 K 1 K 2.5
I0.0 - I15.7 I0.0 - I15.7 I0.0 - I15.7
Q0.0 - Q15.7 Q0.0 - Q15.7 Q0.0 - Q15.7
( ) -- AIW0 - AIW30 AIW0 - AIW30
( ) -- AQW0 - AQW30 AQW0 - AQW30
(V) 1 VB0.0 - VB2047.7 VB0.0 - VB2047.7 VB0.0 - VB5119.7
(L) 2 LB0.0 - LB63.7 LB0.0 - LB63.7 LB0.0 - LB63.7
(M) M0.0 - M31.7 M0.0 - M31.7 M0.0 - M31.7
(SM)
1 ms
10 ms
100 ms
/ 1 ms
/ 10 ms
/ 100 ms
SM0.0 - SM179.7
SM0.0 - SM29.7
256 (T0 - T255)
T0, T64
T1 - T4, T65 - T68
T5 - T31, T69 - T95
T32, T96
T33 - T36, T97 - T100
T37 - T63, T101 - T255
SM0.0 - SM179.7
SM0.0 - SM29.7
256 (T0 - T255)
T0, T64
T1 - T4, T65 - T68
T5 - T31, T69 - T95
T32, T96
T33 - T36, T97 - T100
T37 - T63, T101 - T255
SM0.0 - SM179.7
SM0.0 - SM29.7
C0 - C255 C0 - C255 C0 - C255
HC0, HC3, HC4, HC5 HC0, HC3, HC4, HC5 HC0 - HC5
256 (T0 - T255)
T0, T64
T1 - T4, T65 - T68
T5 - T31, T69 - T95
T32, T96
T33 - T36, T97 - T100
T37 - T63, T101 - T255
(S) S0.0 - S31.7 S0.0 - S31.7 S0.0 - S31.7
AC0 - AC3 AC0 - AC3 AC0 - AC3
/ 0 - 255 0 - 255 0 - 255
/ 0 - 63 0 - 63 0 - 63
0 - 127 0 - 127 0 - 127
PID 0 - 7 0 - 7 0 - 7
1 V
2 LB60 ~ LB63 STEP 7-Micro/WIN 32 3.0
0 0 0
8-7

S7–200
8-3 S7–200 CPU
CPU 221 CPU 222 CPU 224
( . ) V 0.0 - 2047.7
I 0.0 - 15.7
Q 0.0 - 15.7
M 0.0 - 31.7
SM 0.0 - 179.7
S 0.0 - 31.7
T 0 - 255
C 0 - 255
L 0.0 - 63.7
VB 0 - 2047
IB 0 - 15
QB 0 - 15
MB 0 - 31
SMB 0 - 179
SB 0 - 31
LB 0 - 63
AC 0 - 3
V 0.0 - 2047.7
I 0.0 - 15.7
Q 0.0 - 15.7
M 0.0 - 31.7
SM 0.0 - 179.7
S 0.0 - 31.7
T 0 - 255
C 0 - 255
L 0.0 - 63.7
VB 0 - 2047
IB 0 - 15
QB 0 - 15
MB 0 - 31
SMB 0 - 179
SB 0 - 31
LB 0 - 63
AC 0 - 3
V 0.0 - 5119.7
I 0.0 - 15.7
Q 0.0 - 15.7
M 0.0 - 31.7
SM 0.0 - 179.7
S 0.0 - 31.7
T 0 - 255
C 0 - 255
L 0.0 - 63.7
VB 0 - 5119
IB 0 - 15
QB 0 - 15
MB 0 - 31
SMB 0 - 179
SB 0 - 31
LB 0 - 63
AC 0 - 3
VW 0 - 2046
IW 0 - 14
QW 0 - 14
MW 0 - 30
SMW 0 - 178
SW 0 - 30
T 0 - 255
C 0 - 255
LW 0 - 62
AC 0 - 3
AIW 0 - 30
AQW 0 - 30
VW 0 - 2046
IW 0 - 14
QW 0 - 14
MW 0 - 30
SMW 0 - 178
SW 0 - 30
T 0 - 255
C 0 - 255
LW 0 - 62
AC 0 - 3
AIW 0 - 30
AQW 0 - 30
VW 0 - 5118
IW 0 -14
QW 0 - 14
MW 0 - 30
SMW 0 - 178
SW 0 - 30
T 0 - 255
C 0 - 255
LW 0 - 62
AC 0 - 3
AIW 0 - 30
AQW 0 - 30
VD 0 - 2044
ID 0 - 12
QD 0 - 12
MD 0 - 28
SMD 0 - 176
SD 0 - 28
LD 0 - 60
AC 0 - 3
HC 0, 3, 4, 5
VD 0 - 2044
ID 0 - 12
QD 0 - 12
MD 0 - 28
SMD 0 - 176
SD 0 - 28
LD 0 - 60
AC 0 - 3
HC 0, 3, 4, 5
VD 0 - 5116
ID 0 - 12
QD 0 - 12
MD 0 - 28
SMD 0 - 176
SD 0 - 28
LD 0 - 60
AC 0 - 3
HC 0 - 5
8-8

SIMATIC
9
S7-200 SIMATIC
9.1 SIMATIC 9–2
9.2 SIMATIC 9–10
9.3 SIMATIC 9–15
9.4 SIMATIC 9–23
9.5 SIMATIC 9–27
9.6 SIMATIC 9–49
9.7 SIMATIC 9–70
9.8 SIMATIC 9–72
9.9 SIMATIC 9–81
9.10 SIMATIC 9–99
9.11 SIMATIC 9–104
9.12 SIMATIC 9–110
9.13 SIMATIC 9–116
9.14 SIMATIC 9–126
9.15 SIMATIC 9–141
9.16 SIMATIC 9–165
9.17 SIMATIC 9–192
9-1

SIMATIC
9.1 SIMATIC
L
A
D
bit
7
I
Q
AND
OR
bit
/
(NO) (bit) 1 ,
(NC) (bit) 0
F
B
D
AND
(LAD)
(FBD)
AND/OR
OR
S
T
L
LD bit
A bit
O bit
O
(STL) LD ( ) A ( )
O ( ) LD bit A
bit
LDN bit
AN bit
ON bit
LDN ( ) AN ( )
ON ( ) LDN bit
AN ON bit
✓
221
✓ ✓
222 224
(LAD, STL) I, Q, M, SM, T, C, V, S, L BOOL
(FBD) I, Q, M, SM, T, C, V, S, L, BOOL
(FBD) I, Q, M, SM, T, C, V, S, L, BOOL
9-2

SIMATIC
L
A
D
bit
I
bit
/I
bit 1
bit 0
F
B
D
(LAD)
(FBD)
S
T
L
LDI bit
AI bit
OI bit
(FBD)
LDNI bit
ANI bit
ONI bit
✓
221
✓ ✓
222 224
LDI ( ) AI ( ) OI ( ) LDI
bit AI OI bit
LDNI ( ) ANI ( ) ONI ( )
LDNI bit ANI ONI bit
(LAD, STL) I BOOL
(FBD) I BOOL
9-3

SIMATIC
L
A
D
NOT
(LAD)
(FBD)
F
B
D
L
A
D
(STL) 0
1 1 0
S
T
L
NOT
✓
221
✓ ✓
222 224
L
A
D
P
N
( off on)
(LAD)
(FBD) P N
( on off)
F
B
D
S
TL
EU
IN
IN
P
OUT
N
OUT
(STL)
1 0
(STL)
1 0
EU
( 0 1)
ED
( 1 0)
ED
✓
221
✓ ✓
222 224
IN (FBD) I, Q, M, SM, T, C, V, S, L, BOOL
OUT (FBD) I, Q, M, SM, T, C, V, S, L, BOOL
9-4

SIMATIC
LAD
STL
Network 1
I0.0 I0.1
Network 2
I0.0
NOT
Network 3
I0.1
N
Q0.0
Q0.1
Q0.2
NETWO
RK LD 1
I0.0 A
I0.1 =
Q0.0 NETWO
RK LD 2
I0.0 NO
T=
Q0.1 NETWO
RK LD 3
I0.1 E
D=
Q0.2
FBD
Network 1
I0.0
I0.1
AND
Q0.0
Network 2
I0.0
Q0.1
=
Network 3
I0.1
N
IN OUT
Q0.2
I0.0
I0.1
Q0.0
Q0.1
Q0.2
9-1 SIMATIC LAD STL FBD
9-5

SIMATIC
L
A
D
bit
(LAD)
(FBD)
(bit)
S
TL
F
B
D
= bit
bit
=
(STL)
(bit)
✓
221
✓ ✓
222 224
I, Q, M, SM, T, C, V, S, L BOOL
(LAD)
BOOL
(FBD) I, Q, M, SM, T, C, V, S, L, BOOL
L
A
D
bit
I
I
(bit OUT)
F
B
D
bit
=I
S
T
L
=I bit
(bit)
✓
221
✓ ✓
222 224
Q
BOOL
(LAD)
BOOL
(FBD) I, Q, M, SM, T, C, V, S, L, BOOL
9-6

SIMATIC
L
A
D
bit
S
N
bit
R
N
OUT
( 1) ( 0) bit
N
N 1 - 255
bit OUT T C
F
B
D
S
T
L
bit
EN
N
bit
EN
N
S bit, N
S
R
ENO = 0
SM4.3 ( ) 0006 ( ) 0091 (
)
R bit, N
✓
221
✓ ✓
222 224
/
I, Q, M, SM, T, C, V, S, L BOOL
N VB, IB, QB, MB, SMB, SB, LB, AC, ,*VD, *AC, *LD BYTE
9-7

SIMATIC
L
A
D
bit
SI
N
bit
RI
N
N
I
N 1 - 128
bit
OUT
F
B
D
EN
N
EN
bit
bit
SI
RI
ENO = 0
SM4.3 ( ) 0006 ( ) 0091 (
)
N
S
TL
SI bit, N
RI bit, N
✓
221
✓ ✓
222 224
/
Q
BOOL
N VB, IB, QB, MB, SMB, SB, LB, AC, , *VD, *AC, *LD BYTE
L
A
D
N
NOP
255
N (0 - 255)
N 0
BYTE
S
T
L
NOP N
✓
221
✓ ✓
222 224
9-8

SIMATIC
LAD
STL
Network 1
I0.0
Q0.0
Q0.1
S
1
NETWORK 1
LD I0.0
= Q0.0
S Q0.1, 1
R Q0.2, 2
Q0.2
R
2
FBD
Network 1
I0.0
SM0.0
AND
Q0.0
=
Q0.1
EN
S
1
N
Q0.2
EN
R
2
N
I0.0
Q0.0
Q0.1
Q0.2
Q0.3
9-2 SIMATIC LAD STL FBD
9-9

SIMATIC
9.2 SIMATIC
L
A
D
IN1
==B
IN2
IN1 IN2
IN1=IN2 IN1 >= IN2 IN1 IN2 IN1 < IN2, IN1 IN2
F
B
D
==B
LAD
FBD
1
LD A O
S
TL
LDB= IN1, IN2
AB= IN1, IN2
OB= IN1, IN2
LDB IN1, IN2
AB IN1, IN2
OB IN1, IN2
LDB< IN1, IN2
AB< IN1, IN2
OB< IN1, IN2
LDB IN1, IN2
LDB>= IN1, IN2
AB>= IN1, IN2
OB>= IN1, IN2
✓
221
✓ ✓
222 224
/
IB, QB, MB, SMB, VB, SB, LB, AC, , *VD, *AC,*LD BYTE
(FBD) I, Q, M, SM, T, C, V, S, L, BOOL
9-10

SIMATIC
L
A
D
F
B
D
IN1
==I
IN2
==I
IN1 IN2
IN1 = IN2 IN1 >= IN2 IN1 IN2 IN1 < IN2 IN1 IN2
(16#7FFF > 16#8000)
LAD
FBD
STL LD A O
1
S
T
L
LDW= IN1, IN2
AW= IN1, IN2
OW= IN1, IN2
LDW IN1, IN2
AW IN1, IN2
OW IN1, IN2
LDW< IN1, IN2
AW< IN1, IN2
OW< IN1, IN2
LDW IN1, IN2
LDW>= IN1, IN2
AW>= IN1, IN2
OW>= IN1, IN2
✓
221
✓ ✓
222 224
IW, QW, MW, SW, SMW, T, C, VW, LW, AIW, AC, , *VD, INT
*AC,*LD
(FBD) I, Q, M, SM, T, C, V, S, L, BOOL
9-11

SIMATIC
L
A
D
F
B
D
S
TL
IN1
==D
IN2
==D
LDD= IN1, IN2
AD= IN1, IN2
OD= IN1, IN2
LDD IN1, IN2
AD IN1, IN2
OD IN1, IN2
LDD< IN1, IN2
AD< IN1, IN2
OD< IN1, IN2
LDD IN1, IN2
LDD>= IN1, IN2
AD>= IN1, IN2
OD>= IN1, IN2
IN1
IN2 IN1 = IN2 IN1
>= IN2 IN1 IN2 IN1 < IN2
IN1 IN2
Double word comparisons are signed
(16#7FFFFFFF > 16#80000000) .
LAD
FBD
STL LD A O
1
✓
221
✓ ✓
222 224
ID, QD, MD, SD, SMD, VD, LD, HC, AC, , *VD, *AC, *LD DINT
(FBD) I, Q, M, SM, T, C, V, S, L, BOOL
9-12

SIMATIC
L
A
D
IN1
==R
IN2
IN1 IN2
IN1 = IN2 IN1 >= IN2 IN1 IN2 IN1 < IN2 IN1 IN2
F
B
D
==R
LAD
FBD
STL LD A O
1
S
T
L
LDR= IN1, IN2
AR= IN1, IN2
OR= IN1, IN2
LDR IN1, IN2
AR IN1, IN2
OR IN1, IN2
LDR< IN1, IN2
AR< IN1, IN2
OR< IN1, IN2
LDR IN1, IN2
LDR>= IN1, IN2
AR>= IN1, IN2
OR>= IN1, IN2
✓
221
✓ ✓
222 224
ID, QD, MD,SD, SMD, VD, LD, AC, , *VD, *AC, *LD REAL
(FBD) I, Q, M, SM, T, C, V, S, L, BOOL
9-13

SIMATIC
LAD
STL
Network 4
VW4
>=I
VW8
Q0.3
NETWORK 4
LDW>= VW4, VW8
= Q0.3
FBD
Network 4
VW4
VW8
>=I
Q0.3
Q0.3
VW4 >= VW8
VW4 < VW8
9-3 LAD STL
9-14

SIMATIC
9.3 SIMATIC
L
A
D
F
B
D
IN
PT
Txxx
TON
(Txxx)
Txxx
IN
TONR
(R)
PT
IN
Txxx
TOF
(TOF)
32767
PT
0
S
TL
✓
221
TON Txxx, PT
TONR Txxx, PT
TOF Txxx, PT
✓ ✓
222 224
TOF
(SCR)
TOF 0
TOF
IN (LAD)
BOOL
IN (FBD) I, Q, M, SM, T, C, V, S, L, BOOL
PT VW, IW, QW, MW, SW, SMW, LW, AIW, T, C, AC, , *VD,
*AC, *LD
INT
9-15

SIMATIC
TON TONR TOF 9-1
10 ms 50
500ms
9-1
TONR
TON, TOF
1 ms 32.767 s T0, T64
10 ms 327.67 s T1 - T4, T65 - T68
100 ms 3276.7 s T5 - T31, T69 - T95
1 ms 32.767 s T32, T96
10 ms 327.67 s T33 - T36, T97 - T100
100 ms 3276.7 s T37 - T63, T101 - T255
TOFT32
TOF TON TONT32
9-16

SIMATIC
S7-200
9–2
• (TON)
• (TONR)
S7-200 3
• (TOF) (
)
9-2
TON ON,
32,767
= 0
OFF,
OFF,
=0
TONR ON,
32,767
OFF,
1
TOF OFF,
=
ON
= 0
ON OFF OFF,
= 0
1 S7-200 CPU
5.3
(R)
TONR
=OFF
=0
TOF ON OFF
9-17

SIMATIC
1ms
1ms
1ms
1ms 1ms ( )
1 ms
TONR
1ms
1ms
56ms
57
10 ms
10ms
10ms
10ms (
) 10ms
15
10ms
10ms
140ms
100 ms
100ms
100ms
100ms (
) 100ms
100ms
100ms
100ms
100ms
100ms
22
2100ms
9-18

SIMATIC
9-4
• 1ms
T32 T32 Q0.0
• 10ms Q0.0 (ON)
T33
( T 0) T33 T33
off Q0.0 off Q0.0 (ON)
• 100ms
Q0.0
Q0.0 T32
Q0.0 (ON)
1ms
9
-
4
T32 T32
/
IN TON
300 PT
T32 Q0.0
Q0.0
/
300
T32
T32
IN TON
PT
Q0.0
10ms
T33
/
T33
IN TON
Q0.0
/
T33
IN TON
30
PT
30
PT
T33
Q0.0
T33
Q0.0
100ms
T37
/
T37
IN TON
Q0.0
/
T37
IN TON
3
PT
3
PT
T37
Q0.0
T37
Q0.0
9-19

SIMATIC
LAD
FBD
I2.0
T33
IN
TON
I2.0
T33
TON
IN
3
PT
3
PT
STL
LD I2.0
TON T33, 3
I2.0
=32767
T33
( )
PT = 3 PT = 3
T33( )
9-5 LAD FBD STL
9-20

SIMATIC
LAD
FBD
I2.1
IN
T2
TON
R
I2.1
IN
T2
TON
R
10
PT
10
PT
STL
LD I2.1
TONR T2, 10
I2.1
=32767
PT = 10
T2
( )
T2( )
9-6 LAD FBD STL
9-21

SIMATIC
LAD
FBD
I0.0
IN
T33
TOF
I0.0
T33
TOF
IN
3
PT
3
PT
STL
LD I0.0
TOF T33, 3
I0.0
T33
( )
PT = 3
PT = 3
T33
( )
9-7 LAD FBD STL
9-22

SIMATIC
9.4 SIMATIC
/
L
A
D
F
B
D
Cxxx
CU CTU
R
PV
Cxxx
CU CTUD
CD
R
PV
Cxxx
CD CTD
LD
PV
(PV)
(CTU) CU
( off on)
(C xxx)
(R)
/ (CTUD) CU
CD
(C xxx)
(PV)
(R)
(CTD) CD
( off on)
(C xxx) 0
(R)
(PV)
(CV) 0
Cxxx=C0 C255
(STL)
CTU
CU
S
TL
CTU Cxxx, PV
CTUD Cxxx, PV
CTD Cxxx, PV
CD
(STL)
CD
CU
CTD
✓
221
✓ ✓
222 224
CU, CD (FBD) I, Q, M, SM, T, C, V, S, L, BOOL
R, LD (FBD) I, Q, M, SM, T, C, V, S, L, BOOL
PV VW, IW, QW, MW, SMW, LW, AIW, AC, T, C, , *VD,
*AC, *LD, SW
INT
9-23

SIMATIC
S7-200
(CTU) CU ( off on)
(R)
(32767)
/ (CTUD) CU
CD
(R)
32767 CU
(-32768) (-32768)
CD (32767)
/
(on) (off)
0
( / )
9-24

SIMATIC
LAD
FBD
I3.0
C50
CD CTD
I3.0
C50
CD CTD
I1.0
LD
I1.0
LD
3
PV
3
PV
STL
LD I3.0 //
LD I1.0 //
CTD C50, 3
I3.0
I1.0
3 3
2
2
C50
( )
C50
( )
0
1
0
9-8 (CTD) LAD FBD STL
9-25

SIMATIC
LAD
FBD
I4.0 C48
CU CTUD
I4.0
CU
C48
CTUD
I3.0
I2.0
CD
R
I3.0
I2.0
CD
R
4
PV
4
PV
STL
LD I4.0 //
LD I3.0 //
LD I2.0 //
CTUD C48, 4
I4.0
I3.0
I2.0
C48
( )
C48
( )
0
1
2
3
4
5
4
3
4
5
0
9-9 / (CTUD) LAD FBD STL
9-26

SIMATIC
9.5 SIMATIC
L
A
D
S
TL
✓
221
HDEF
EN ENO
HSC
MODE
HSC
EN ENO
N
HDEF HSC, MODE
HSC N
✓ ✓
222 224
N
(HDEF)
9-5
(HSC)
HSC
CPU 221 CPU 222 HSC1 HSC2
ENO=0
HDEF
1 HDEF
SM4.3 ( ) 0003 ( ) 0004 (
) 000A (HSC )
ENO=0
HSC
SM4.3 ( ) 0001 ( HDEF
HSCHDEF) 0005 ( HSC/PLS)
HSC
MODE
N
BYTE
BYTE
WORD
CPU 12
9-5
CPU CPU A
(1X) 4 (4X) HSC1 HSC2
9-27

SIMATIC
PLC
9.16
( 9-10 9-16)
1
0
+2,147,483,647
0
-2,147,483,648
9-10
9-28

SIMATIC
1
0
1
0
+2,147,483,647
0
-2,147,483,648
9-11
0 4
PV=CV
1
0
(1 = )
1
0
0
1
2
3
4
3
2
1
0
-1
9-12 0 1 2
9-29

SIMATIC
0 4
PV=CV
PV=CV
1
0
1
(1= )
0
1
2
3
4
5
4
3
2
1
0
9-13 3 4 5
0.3 ms
6 7 8
9-15 9-16
(0.3 ms)
9-14,
0 4
1
0
PV=CV
PV=CV
1
0
1
2
3
4
5
4
3
2
1
0
9-14 7 8 9
9-30

SIMATIC
0 4
PV=CV
PV=CV
A
1
0
B
1
0
1
2
3
4
3
2
0
9-15 9 10 11 ( 1X )
0 4
PV=CV
PV=CV
A
B
1
0
1
0
2
1
5
4
3
7
6
10
9
8
11
12
11
10
9
8
7
6
0
9-16 9 10 11 ( 4X )
9-31

SIMATIC
9-3
9-5 9-10
9-3
HSC0 I0.0, I0.1, 0.2
HSC1 I0.6, I0.7, I1.0, I1.1
HSC2 I1.2, I1.3, I1.4, I1.5
HSC3 I0.1
HSC4 I0.3, I0.4, I0.5
HSC5 I0.4
HSC3
9-4
HSC0 2 I0.0 I0.2 I0.1
HSC0 I0.1 HSC3
HSC0 I0.2
HSC4 I0.4 HSC5
HSC0 I0.0 HSC4 I0.3
9-32

SIMATIC
9-4
HSC0 x x x
(I)
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 1.0 1.1 1.2 1.3 1.4 1.5
HSC1 x x x x
HSC2 x x x x
HSC3
x
HSC4 x x x
HSC5
x x x x
x
9-5 HSC0
0
1
3
4
6
SM37.3 = 0
SM37.3 = 1
I0.1 = 0
I0.1 = 1
/
/
HSC0
I0.0 I0.1 I0.2
7 ( ) ( )
9
10
A/B
A B 90
B A 90 A B
9-33

SIMATIC
9-6 HSC1
0
1
2
3
4
5
6
7
8
9
10
11
SM47.3 = 0
SM47.3 = 1
I0.7 = 0
I0.7 = 1
/
/
HSC1
I0.6 I0.7 I1.0 I1.1
( ) ( )
A/B
A B 90
B A 90 A B
9-7 HSC2
0
1
2
3
4
5
6
7
8
9
10
11
SM57.3 = 0
SM57.3 = 1
I1.3 = 0
I1.3 = 1
/
/
HSC2
I1.2 I1.3 I1.4 I1.5
( ) ( )
A/B
A B 90
B A 90 A B
9-34

SIMATIC
9-8 HSC3
HSC3
I0.1
0 /
SM137.3 = 0
SM137.3 = 1
9-9 HSC4
0
1
3
4
6
SM147.3 = 0
SM147.3 = 1
I0.4 = 0
I0.4 = 1
/
/
HSC4
I0.3 I0.4 I0.5
7 (Up) (Dn)
9
10
A/B
A B 90
B A 90
A
B
9-10 HSC5
HSC5
I0.4
0 /
SM157.3 = 0
SM157.3 = 1
9-35

SIMATIC
(HC)
HC
( HCS0) (32 )
9–17
HC [ ] HC2
MSB
31
HC2
LSB
0
HC 2
3
2
1
0
( )
9-17
(HSC0 HSC1 HSC2)
HSC1 HSC2 9-5 4
HDEF (
) HDEF (HSCx)
HDEF
SM0.1 ( ) HDEF
9-36

SIMATIC
1x /4x
3
1x 4x ( )
HDEF 9-11
HDEF
4x (4 ) HDEF
STOP
9-11 1x /4x
HSC0 HSC1 HSC2 HSC4
SM37.0 SM47.0 SM57.0 SM147.0
-- SM47.1 SM57.1 --
SM37.2 SM47.2 SM57.2 SM147.2
( HDEF )
0 = 1 =
0 = 1 =
0 = 4X 1 = 1X
9-37

SIMATIC
9-12
0,1,2)
HSC
(
9-12 HSC0 HSC1 HSC2
HSC0 HSC1 HSC2 HSC3 HSC4 HSC5
SM37.0 SM47.0 SM57.0 SM137.0 SM147.0 SM157.0 HDEF (
SM37.1 SM47.1 SM57.1 SM137.1 SM147.1 SM157.1 HDEF (
)
SM37.2 SM47.2 SM57.2 SM137.2 SM147.2 SM157.2 HDEF (
)
SM37.3 SM47.3 SM57.3 SM137.3 SM147.3 SM157.3
0 = 1 =
SM37.4 SM47.4 SM57.4 SM137.4 SM147.4 SM157.4 HSC
0 = 1 =
SM37.5 SM47.5 SM57.5 SM137.5 SM147.5 SM157.5 HSC
0 = 1 =
SM37.6 SM47.6 SM57.6 SM137.6 SM147.6 SM157.6 HSC
0 = 1 =
SM37.7 SM47.7 SM57.7 SM137.7 SM147.7 SM157.7 HSC 0 = HSC 1 =
HSC
)
32 32
9-13
HSC
HC ( ) (0 1 2 3 4 5)
HSC
9-38

SIMATIC
9-13 HSC0 HSC1 HSC2 HSC3 HSC4 HSC5
HSC0 HSC1 HSC2 HSC3 HSC4 HSC5
SMD38 SMD48 SMD58 SMD138 SMD148 SMD158
SMD42 SMD52 SMD62 SMD142 SMD152 SMD162
9-14
9-14 HSC0 HSC1 HSC2 HSC3 HSC4 HSC5
HSC0 HSC1 HSC2 HSC3 HSC4 HSC5
SM36.0 SM46.0 SM56.0 SM136.0 SM146.0 SM156.0
SM36.1 SM46.1 SM56.1 SM136.1 SM146.1 SM156.1
SM36.2 SM46.2 SM56.2 SM136.2 SM146.2 SM156.2
SM36.3 SM46.3 SM56.3 SM136.3 SM146.3 SM156.3
SM36.4 SM46.4 SM56.4 SM136.4 SM146.4 SM156.4
SM36.5 SM46.5 SM56.5 SM136.5 SM146.5 SM156.5
SM36.6 SM46.6 SM56.6 SM136.6 SM146.6 SM156.6
SM36.7 SM46.7 SM56.7 SM136.7 SM146.7 SM156.7
0 =
1 =
0 =
1 =
0 =
1 =
9-39

SIMATIC
HSC
0 1 2
9.16
HSC1 HSC1 S7-200
RUN
(SM0.1=1)
RUN
HDEF
HDEF
HDEF
9-40

SIMATIC
0, 1, 2
HSC1 ( 0 1 2)
1. (SM0.1=1)
2. SMB47
SMB47 = 16#F8
3. HDEF HSC 1 MODE 0 ( )
1 ( ) 2 ( )
4. SMD48 ( ) 0 SMD48
5. SMD52 ( )
6. (CV) (PV)
CV=PV ( 13) 9.16
7. (
15)
8. (ENI) HSC
9. HSC S7-200 HSC1
10.
9-41

SIMATIC
3, 4, 5
HSC1 ( 3 4 5)
1. (SM0.1=1)
2. SMB47
SMB47 = 16#F8
HSC
3. HDEF HSC 1 MODE 3 (
) 4 ( ) 5 ( )
4. SMD48 ( ) 0 SMD48
5. SMD52 ( )
6. (CV) (PV)
CV PV ( 13) 9.16
7.
( 14)
8.
( 15)
9. (ENI) HSC
10. HSC S7-200 HSC1
11.
9-42

SIMATIC
6, 7, 8
HSC1 ( 6 7 8 )
1. (SM0.1=1)
2. SMB47
SMB47 = 16#F8
HSC
3. HDEF HSC 1 MODE 6 ( )
7 ( ) 8 ( )
4. SMD48 ( ) 0 SMD48
5. SMD52 ( )
6. (CV) (PV)
CV PV ( 13) 9.16
7.
( 14)
8.
( 15)
9. (ENI) HSC1
10. HSC S7-200 HSC1
11.
9-43

SIMATIC
9, 10, 11
HSC1 A/B ( 9 10 11)
1. (SM0.1=1)
2. SMB47
(1X )
SMB47 = 16#FC
HSC
( 4X )
SMB47 = 16#F8
HSC
3. HDEF HSC 1 MODE 9 ( )
10 ( ) 11 ( )
4. SMD48 ( ) SMD48
5. SMD52 ( )
6. (CV) (PV)
CV PV ( 13) 9.16
7.
( 14)
8.
( 15)
9. (ENI) HSC1
10. HSC S7–200 HSC1
11.
9-44

SIMATIC
0, 1, 2
( 0,1 2 ) HSC1
1. SMB47 :
SMB47 = 16#90
HSC
SMB47 = 16#98
HSC
2. HSC S7-200 HSC1
HSC1 ( )
1. SMB47
SMB47 = 16#C0
2. SMD48 ( ) ( 0 )
3. HSC S7-200 HSC1
9-45

SIMATIC
( )
1. SMB47
SMB47 = 16#A0
HSC1 ( )
2. SMD52 ( )
3. HSC S7-200 HSC1
HSC ( )
1. SMB47
SMB47 = 16#00
2. HSC
HSC1 ( )
HSC
SMB47
9-46

SIMATIC
MAIN OB1
Network 1
SM0.1
EN SBR0
LAD
0
STL
Network 1
LD SM0.1
CALL 0
SUBROUTINE 0
Network 1
SM0.0
16#F8
1
11
0
MOV_B
EN ENO
IN OUT
HDEF
EN ENO
HSC
MODE
MOV_DW
EN ENO
IN
OUT
SMB47
SMD48
HSC1
HSC1
4X
Network 1
LD SM0.0
MOVB 16#F8, SMB47
HDEF 1, 11
MOVD 0, SMD48
MOVD 50, SMD52
ATCH 0, 13
ENI
HSC 1
50
MOV_DW
EN ENO
IN
OUT
SMD52
HSC1 50
0
13
ATCH
EN ENO
INT
EVEN
HSC 1 =
13 0
ENI
1
HSC
EN ENO
N
HSC1.
INTERRUPT 0
Network 1
SM0.0
0
16#C0
MOV_DW
EN ENO
IN OUT
MOV_B
EN ENO
IN OUT
SMD48
SMB47
HSC1
Network 1
LD SM 0.0
MOVD 0, SMD48
MOVB
HSC 1
16#C0, SMB47
1
EN
N
HSC
ENO
HSC1.
9-18 HSC1 (LAD STL)
9-47

SIMATIC
MAIN OB1
Network 1
SM0.1 EN SBR0
FBD
0
SUBROUTINE 0
Network 1
SM0.0
16#F8
MOV_B
HDEF MOV_DW
EN ENO EN ENO EN ENO
IN OUT SMB47 1 HSC
IN
11 MODE
0
OUT
SMD48
50
MOV_DW
EN ENO
IN OUT
SMD52
0
13
ATCH
EN ENO
INT
EVENT
HSC
EN ENO
1 N
ENI
INTERRUPT 0
Network 1
SM0.0
0
MOV_DW MOV_B HSC
EN ENO EN ENO EN ENO
IN OUT SMD48 16#C0 IN OUT SMB47 1 N
9-19 HSC1 (FBD)
9-48

SIMATIC
9.6 SIMATIC
L
A
D
EN
PLS
ENO
(PLS) (Q0.0 Q0.1)
F
B
D
Q
Q (0 1)
S
T
L
PLS Q
Q0.0 Q0.1
✓
221
✓ ✓
222 224
S7-200
CPU
PTO/PWM
Q0.0 Q0.1
PTO/PWM Q0.0 Q0.1 Q0.0 Q0.1
PTO PWM PTO/PWM
PTO/PWM
PTO PWM Q0.0 Q0.1 0
(PTO) (50% )
(PWM)
PTO/PWM (8 ) 16
32
(PLS) S7-200
PTO/PWM
9-49

SIMATIC
PTO
PWM
(SM) ( ) PLS
PTO/PWM (SM66.7 SM77.7) 0 PLS
PTO PWM
0
PTOT PWM off on on off
PTO/PWM
10%
PWM
PWM ( s)
(ms) 50 65,535 2 65,535
0 65,535 0 65,535
100% 0 0%
2 2
•
PWM
• PWM
PWM
PWM
PTO/PWM
PTO/PWM
9-50

SIMATIC
PLS
PWM (SM67.4 SM77.4)
PTO
PTO (50% )
50 65,535 2 65,535
1
4,294,967,295
2 2
0 1
9.16 )
PTO (SM66.7 SM76.7)
(
PTO
9-51

SIMATIC
PLS
PTO
•
• PLS
PTO (SM66.6
SM76.6) PLC RUN 0
CPU
V
SMW178)
V
(SMW168
PLS
8 16 16 32
9-52

SIMATIC
9–15 PTO
0
PTO
PLC
(SM66.4 SM76.4) 1
(SM66.5 SM76.5) 1
PTO
PTO SMB166 ( SMB176)
9-15 PTO
0 (1 255) 0
PTO
1 #1
(2 65535 )
3 ( ) (-32768
32767 )
5
(1 4294967295)
9 #2
(2 65535 )
11 ( ) (-32768
32767 )
13
:
:
:
:
:
:
(1 4294967295)
9-53

SIMATIC
PTO/PWM
9-20
10 kHz
2 kHz
1
(200 )
2 3
(400 )
4,000
9-20 -
4,000 2
kHz 10 kHz
500us 100us
400
200
PTO/PWM
delta cycle time = I ending cycle time – initial cycle time| / quantily of
pulses
( 1 ) –2 ( 3
) 1 2 0
9-54

SIMATIC
VB500 V 9-16
9-16
V
VB500 3 ( )
VW501 500 ( - #1)
VW503 -2 ( - #1)
VW505 200 ( - #1)
VW509 100 ( - #2)
VW511 0 ( - #2)
VW513 3400 ( - #2)
VW517 100 ( - #3)
VW519 1 ( - #3)
VD521 400 ( - #3)
0)
V
9-23 PTO
(
cycle time of last pulse=initial cycle time+(delta cycle time*(number of
pulses – 1))
1
2
9-55

SIMATIC
Duration = no.of pulses*(initial cycle time +((delta cycle time /2)*(no.of
pulses-1)))
PTO/PWM
9–17 PTO/PWM 9-18
PTO/PWM PTO/PWM 0
SMB67 PTO/PWM 1 SMB77
(SMD72 SMD82) (SMW70 SMW80) (SMW68
SMW78) PLS
PLS
(SMW168
SMW178)
9-56

SIMATIC
9-17 PTO /PWM
Q0.0 Q0.1
SM66.4 SM76.4 PTO
SM66.5 SM76.5 PTO
0 = 1 =
0 = 1 =
SM66.6 SM76.6 PTO / 0 = 1 = /
SM66.7 SM76.7 PTO 0 = 1 = PTO
Q0.0 Q0.1
SM67.0 SM77.0 PTO/PWM 0 = 1 =
SM67.1 SM77.1 PWM 0 = 1 =
SM67.2 SM77.2 PTO 0 = 1 =
SM67.3 SM77.3 PTO/PWM 0 = 1 / ; 1 = 1ms/
SM67.4 SM77.4 PWM 0 = 1 =
SM67.5 SM77.5 PTO 0 = 1 =
SM67.6 SM77.6 PTO/PWM 0 = PTO 1 = PWM
SM67.7 SM77.7 PTO/PWM 0 = PTO/PWM;
1 = PTO/PWM
Q0.0 Q0.1 PTO/PWM
SMW68 SMW78 PTO/PWM ( 2 65535)
SMW70 SMW80 PWM ( 0 65535)
SMD72 SMD82 PTO ( 1 4294967295)
SMB166 SMB176 ( PTO )
SMW168 SMW178 V0 ( PTO )
9-57

SIMATIC
9-18 PTO/PWM
(16 )
PTO
PLS
PWM
16#81 Yes PTO 1us/
16#84 Yes PTO 1us/
16#85 Yes PTO 1us/
16#89 Yes PTO 1 ms/
16#8C Yes PTO 1 ms/
16#8D Yes PTO 1 ms/
16#A0 Yes PTO 1us/
16#A8 Yes PTO 1 ms/
16#D1 Yes PWM 1us/
16#D2 Yes PWM 1us/
16#D3 Yes PWM 1us/
16#D9 Yes PWM 1 ms/
16#DA Yes PWM 1 ms/
16#DB Yes PWM 1 ms/
PTO/PWM
PTO/PWM
PTO
PWM Q0.0 S7-
200 RUN (SM0.1=1)
PTO/PWM (
)
9-58

SIMATIC
PWM
Q0.0 PWM
1. (SM0.1)
2. 16# D3 SMB67 PWM
( 16#DB PWM )
PTO/PWM
PWM
3. SMW68 ( )
4. SMW70 ( )
5. PLS S7-200 PTO/PWM
6. SMB67 16#D2 ( 16#DA
)
PLS
7.
PWM
PWM ( SMB67
16#D2 16#DA.)
1. SMW70 ( )
2. PLS S7-200 PTO/PWM
3.
9-59

SIMATIC
PTO -
PTO
1. (SM0.1) 0
2. 16#85 SMB67 PTO (
16#8D PTO )
PTO/PWM
PTO
3. SMW68 ( )
4. SMD72 ( )
5. (PTO)
( 19)
9.16
6. PLS S7-200 PTO/PWM
7.
PTO -
PTO
PTO
1. 16#81 SMB67 PTO ( 16#89 PTO
) PTO/PWM
PTO
2. SMW68 ( )
3. PLS S7-200 PTO/PWM
PTO CPU PTO
4.
9-60

SIMATIC
PTO -
PTO
PTO
1. 16#84 SMB67 PTO ( 16#8C PTO
) PTO/PWM
PTO
2. SMD72 ( )
3. PLS S7-200 PTO/PWM
PTO CPU PTO
4.
PTO -
PTO
PTO
1. 16#85 SMB67 PTO ( 16#8D PTO
) PTO/PWM
PTO
2. SMW68 ( )
3. SMD72 ( )
4. PLS S7-200 PTO/PWM
PTO CPU PTO
5.
9-61

SIMATIC
PTO -
PTO
1. (SM0.1) 0
2. 16#A0 SMB67 PTO (
16#A8 PTO )
PTO/PWM
PTO
3. SMW168 ( ) V
4. ( )
5. (PTO)
( 19)
9.16
6. PLS S7–200 PTO/PWM
7.
9-62

SIMATIC
PWM
9–21 (PWM)
MAIN OB1
LAD
STL
Network 1
SM0.1
Network 2
M0.0
.
.
P
SUBROUTINE 0
Q0.1
R
1
SBR0
SBR1
M0.0
0
50%
Network 1
LD SM0.1
R Q0.1, 1
CALL 0
Network 2
LD M0.0
EU
CALL 1
.
.
MOVW 10000,
Network 1
SM0.0
16#DB
10000
1000
MOV_B
EN ENO
IN OUT
MOV_W
EN ENO
IN OUT
MOV_W
EN ENO
OUT
I
SMB77
SMW78
SMW80
0
- PWM
- ms
-
- PWM
10,000ms
1000ms
Network 1
LD SM0.0
MOVB
16#DB, SMB77
MOVW 10000, SMW80
MOVW 1000, SMW80
PLS 1
MOVB
.
.
.
16#DA, SMB77
.
.
1
16#DA
PLS
EN ENO
Q0.x
MOV_B
EN ENO
IN OUT
SMB77
PWM
PLS 1 => Q0.1
SUBROUTINE 1
SM0.0
MOV_W
EN ENO
5000 IN OUT SMW80
1
5000 ms
Network 1
LD SM0.0
MOVW 5000, SMW80
PLS 1
1
PLS
EN ENO
Q0.X
9-21 PWM
9-63

SIMATIC
FBD
MAIN OB1
Network 1
SM0.1
SM0.0
AND
1
Q0.1
R
EN
N
SBR0
EN
Network 2
M0.0
SM0.0
AND
P
IN
OUT
SBR1
EN
SUBROUTINE 0
Network 1
MOV_B MOV_W MOV_W PLS MOV_B
SM0.0 EN ENO EN ENO EN ENO EN ENO EN ENO
16#DB IN OUT
SMB77 SMW78 SMW80
IN OUT IN OUT Q0.x
IN OUT
1000
1
16#DA
SMB77
10000
SUBROUTINE 1
Network 61
MOV_W
PLS
SM0.0 EN ENO EN ENO
5000 IN OUT SMW80
1 Q0.X
Q0.1
10% 10%
50% 50%
1
( = 10,000 ms)
9-21 PWM ( )
9-64

SIMATIC
LAD
STL
MAIN OB1 OB1
Network 1
SM0.1
Q0.0
R
1
SBR0
EN
0
Network 1
LD
R
SM0.1
Q0.0,
1CALL 0
SUBROUTINE 0
Network 1
SM0.0
16#8D
500
MOV_B
EN ENO
IN OUT
MOV_W
EN ENO
IN OUT
SMB67
SMW68
- PTO
- ms
-
- PTO
500 ms
Network 1
LD SM0.0
MOVB 16#8D, SMB67
MOVW 500, SMW68
MOVD 4, SMD72
ATCH 3, 19
ENI
PLS 0
MOVB 16#89, SMB67
MOV_DW
EN ENO
4
4
IN OUT
SMD72
3
19
ATCH
EN ENO
INT
EVN
T
3 PTO
ENI
0
PLS
EN ENO
PTO
PLS 0 => Q0.0
Q0.X
MOV_B
EN ENO
16#89
IN
OUT
SMB67
9-22 SM
9-65

SIMATIC
INTERRUPT 3
LAD
STL
Network 1
SMW68
==
500 I
1000
0
MOV_W
EN ENO
I OU
N T
PLS
EN ENO
Q0.X
SMW68
ms
1000 ms
4
500
Network 1
LDW= SMW68, 500
MOVW 1000, SMW68
PLS 0
CRETI
Network 2
LDW= SMW68, 1000
MOVW 500, SMW68
PLS 0
Network 2
SMW68
==
1000 I
500
EN
IN
RET
I
MOV_W
ENO
OUT
SMW68
1000
ms
500 ms 4
PLS
EN ENO
0
Q0.X
1
500 ms
1
1000 ms
Q0.0
4 4
4 4
3 3
9-22 SM ( )
9-66

SIMATIC
MAIN OB1
Network 1 Q0.0
R
SM0.1
1
EN
IN
ENO
SBR0
EN
FBD
SUBROUTINE 0
Network 1
MOV_B
SM0.0 EN ENO
16#8D IN OUT
SMB67
500
MOV_W
EN ENO
IN OUT
SMW68
4
MOV_DW
EN ENO
IN OUT
SMD72
3
1
9
ATCH
EN ENO
INT
EVN
T
ENI
PLS
EN ENO
MOV_B
EN ENO
0
Q0.X
16#89
IN
OUT
SMB67
INTERRUPT 3
Network 1
SMW
68
50
0
==I
1000
MOV_W
EN ENO
IN OUT
SMW68
0
PLS
EN ENO
Q0.x
RETI
Network 2
==I MOV_W
SMW68
1000 500
EN
IN
ENO
OUT
SMW68
0
PLS
EN ENO
Q0.X
9-22 SM ( )
9-67

SIMATIC
LAD
STL
MAIN OB1 OB1
Network 1
SM0.1
Q0.0
R
1
SBR0
EN
0
Network 1
LD SM0.1
R Q0.0, 1
CALL 0
SUBROUTINE 0
Network 1
SM0.0
16#AO
MOV_B
EN ENO
IN OUT
MOV_W
EN ENO
SMB67
- PTO
-
- ms
- PTO
V500
Network 1
LD
MOVB
SM0.0
16#A0, SMB67
MOVW 500, SMW168
MOVB
MOVW
3, VB500
500, VW501
MOVW -2, VD503
MOVD 200, VD505
500
IN OUT
SMW168
MOV_B
EN ENO
3
3
IN OUT
VB500
MOV_W
EN ENO
500ms
1
500
IN OUT
VW501
MOV_W
EN ENO
-2ms
1
-2
IN OUT
VW503
MOV_D
EN ENO
1 200
200
IN OUT
VD505
9-23
9-68

SIMATIC
LAD
STL
Network 1
100
0
MOV_W
EN ENO
IN OUT
MOV_W
EN ENO
IN OUT
VW509
VW511
2 100ms
2 0ms
MOVW 100, VW509
MOVW 0, VW511
MOVD 3400, VD513
MOVW 100, VW517
MOVW 1, VW519
MOVD 400, VD521
ATCH 2, 19
ENI
PLS 0
MOV_D
EN ENO
2 3400
3400
IN OUT
VD513
100
MOV_W
EN ENO
IN OUT
VW517
100ms
3
MOV_W
EN ENO
1ms
3
1
IN OUT
VW519
MOV_D
EN ENO
3 400
400
IN OUT
VD521
2
ATCH
EN ENO
INT
2 PTO
19
EVNT
ENI
0
PLS
EN ENO
QO.X
PTO
PLS 0 => Q0.0.
INTERRUPT 2
Network 1
SM0.0
Q0.5
PTO
Q0.5
Network 1
LD SM0.0
= Q0.5
9-23 ( )
9-69

SIMATIC
9.7 SIMATIC
L
A
D
F
B
D
S
T
L
✓
221
READ_RTC
EN ENO
T
SET_RTC
EN ENO
T
TODR T
TODW T
✓ ✓
222 224
( T)
(TODR)
( T)
TODR TODW
(TODW)
TODR: ENO = 0
SM4.3 ( ) 0006 ( )
000C ( )
TODW: ENO = 0
SM 4.3 ( ) 0006 ( )
0007 (TOD ) 000C ( )
8
8
T VB, IB, QB, MB, SMB, SB, LB, *VD, *AC, *LD BYTE
9–24
T T+1 T+2 T+3 T+4 T+5 T+6 T+7
0
9-24
9-70

SIMATIC
01-Jan-90 (90 1 1 )
00:00:00
Sunday ( )
S7-200 2000
00 ( 99 00)
BCD ( 16#97 1997 )
/ yymm yy - 0 to 99 mm - 1 to 12
/ ddhh dd - 1 to 31 hh - 0 to 23
/ mmss mm - 0 to 59 ss - 0 to 59
d d - 0 to 7 1 = Sunday ( )
0 = ( 0)
S7-200CPU
February
30 (2 30 )
TODR/TODW
TOD TOD TOD
S7-200PLC
SM4.3 0007
2096
9-71

SIMATIC
9.8 SIMATIC
L
A
D
F
B
D
ADD_I
EN ENO
IN1 OUT OUT
IN2
SUB_I
EN
ENO
IN1 OUT OUT
IN2
16
16 (OUT)
LAD FBD IN1 + IN2 = OUT
STL
IN1 - IN2 = OUT
IN1 + OUT = OUT
OUT - IN1 = OUT
ENO = 0 SM1.1 ( ) SM4.3
( ) 0006 ( )
SM1.1 ( ) SM1.2 ( )
SM1.0 ( )
S
TL
+I IN1, OUT
-I IN1, OUT
✓
221
✓ ✓
222 224
IN1, IN2 VW, IW, QW, MW, SW, SMW, LW, AIW, T, C, AC, , *VD,
*AC, *LD
OUT VW, IW, QW, MW, SW, SMW, LW, T, C, AC, *VD, *AC, *LD INT
INT
9-72

SIMATIC
L
A
D
F
B
D
ADD_DI
EN
ENO
IN1 OUT OUT
IN2
SUB_DI
EN
ENO
IN1 OUT OUT
IN2
32
32 (OUT)
LAD FBD IN1 + IN2 = OUT
STL
IN1 - IN2 = OUT
IN1 + OUT = OUT
OUT - IN1 = OUT
ENO = 0 SM1.1 ( ) SM4.3
( ) 0006 ( )
SM1.1 ( ) SM1.2 ( )
SM1.0 ( )
S
TL
+D IN1, OUT
-D IN1, OUT
✓
221
✓ ✓
222 224
IN1, IN2 VD, ID, QD, MD, SMD, SD, LD, AC, HC, , *VD, *AC, *LD DINT
OUT VD, ID, QD, MD, SM, SD, LD, AC, *VD, *AC, *LD DINT
9-73

SIMATIC
L
A
D
F
B
D
S
TL
✓
221
MUL_I
EN ENO
IN1
IN2
EN
IN1
IN2
OUT OUT
DIV_I
ENO
*I IN1, OUT
/I IN1, OUT
✓ ✓
222 224
OUT OUT
16 16
16 16
LAD FBD IN1

SIMATIC
L
A
D
F
B
D
S
T
L
MUL_DI
EN ENO
IN1 OUT OUT
IN2
DIV_DI
EN ENO
IN1 OUT OUT
IN2
*D IN1, OUT
/D IN1, OUT
32
32
32
32
LAD FBD IN1

SIMATIC
L
A
D
F
B
D
S
TL
✓
221
MUL
EN ENO
IN1
IN2
EN
IN1
IN2
OUT OUT
DIV
ENO
OUT OUT
MUL IN1, OUT
DIV IN1, OUT
✓ ✓
222 224
( ) SM1.3 ( 0 )
32
16
16
32 16 (
) 16 ( )
STL 32 (16
)
STL 32 (16
)
LAD FBD IN1

SIMATIC
LAD
STL
Network 1
I0.0
AC1
AC0
ADD_I
EN ENO
IN1
OUT
T
IN2
AC0
NETWORK 1
LD I0.0
+I AC1, AC0
MUL AC1, VD100
DIV VW10, VD200
MUL
EN ENO
AC1
VW102
IN1
IN2
OUOUT
T
VD100
DIV
EN ENO
VW202
VW10
IN1
IN2
OUOUT
T
VD200
FBD
Network 1
ADD_I
I0.0 EN ENO
MUL
EN ENO
DIV
EN ENO
AC1
AC0
IN1
IN2
OU OUT
T
AC0
AC1
VW102
IN1
IN2
OUOUT
T
VD100
VW202
VW10
IN1
IN2
OU OUT
T
VD200
AC1 4000
AC1 4000
VD200
4000
AC0 6000
VD100
200
VW10
41
AC0 10000
VD100
800000
VD200
23
97
VD100 VW100 VW102
VD200 VW200 VW202
9-25 LAD STL FBD
VW200
VW202
9-77

SIMATIC
L
A
D
F
B
D
S
T
L
✓
221
INC_B
EN ENO
IN
INCB OUT
DECB OUT
OUT
DEC_B
EN ENO
IN
✓ ✓
222 224
OUT
(INCB)
(IN) 1 1
(OUT)
(DECB)
LAD FBD IN + 1 = OUT
IN - 1 = OUT
STL OUT+ 1 = OUT
OUT - 1 = OUT
ENO = 0 SM1.1 ( ) SM4.3
( ) 0006 ( )
SM1.1 ( )
SM1.0 ( )
IN VB, IB, QB, MB, SB, SMB, LB, AC, , *VD, *AC, *LD BYTE
OUT VB, IB, QB, MB, SB, SMB, LB, AC,*VD, *AC, *LD BYTE
L
A
D
F
B
D
S
T
L
INC_W
EN ENO
IN OUT
DEC_W
EN ENO
IN OUT
INCW OUT
DECW OUT
(INCW) (DECW) (IN)
1 1 (OUT)
(16#7FFF > 16#8000)
LAD FBD IN + 1 = OUT
IN - 1 = OUT
STL OUT+ 1 = OUT
OUT - 1 = OUT
ENO = 0 SM1.1 ( ) SM4.3
( ) 0006 ( )
SM1.1 ( ) SM1.2 ( )
SM1.0 ( )
✓
221
✓ ✓
222 224
IN V W, IW, QW, MW, SW, SMW, AC, AIW, LW, T, C, , *VD, *AC,*LD INT
OUT VW, IW, QW, MW, SW, SMW, LW, AC, T, C, *VD, *AC, *LD INT
9-78

SIMATIC
L
A
D
F
B
D
INC_DW
EN ENO
IN OUT
(IN) 1 1
(OUT)
LAD FBD IN + 1 = OUT
IN - 1 = OUT
S
T
L
✓
221
INCD
DEC_DW
EN ENO
IN
OUT
DECD OUT
✓ ✓
222 224
OUT
(16#7FFFFFFF > 16#80000000)
STL OUT + 1 = OUT
OUT - 1 = OUT
ENO = 0 SM1.1 ( ) SM4.3
( ) 0006 ( )
( ) SM1.2 ( )
SM1.0( ) SM1.1
IN VD, ID, QD, MD, SD, SMD, LD, AC, HC, , *VD, *AC, *LD DINT
OUT VD, ID, QD, MD, SD, SMD, LD, AC, *VD, *AC, *LD DINT
9-79

SIMATIC
I4.0
LAD
INC_W
EN ENO
AC0 IN OUT AC0
DEC_DW
EN ENO
VD100 IN OUT VD100
STL
LD I4.0
INCW AC0
DECD VD100
FBD
I4.0
INC_W
EN ENO
DEC_DW
EN ENO
IN AC0 OUT AC0
VD100 IN OUT VD100
AC0
125
VD100
128000
AC0
126
VD100
127999
9-26 / LAD STL FBD
9-80

SIMATIC
9.9 SIMATIC
L
A
D
F
B
D
S
TL
ADD_R
EN ENO
IN1 OUT OUT
IN2
SUB_R
EN ENO
IN1 OUT OUT
IN2
+R IN1, OUT
-R IN1, OUT
32 (OUT)
32
LAD FBD IN1 + IN2 = OUT
STL
IN1 - IN2 = OUT
IN1 + OUT = OUT
OUT - IN1 = OUT
ENO = 0 SM1.1 ( ) SM4.3
( ) 0006 ( )
SM1.1 ( ) SM1.2 ( )
SM1.1
SM1.0
SM1.0 ( )
SM1.1
SM1.2
SM1.1 SM1.0 SM1.2
✓
221
✓ ✓
222 224
IN1, IN2 VD, ID, QD, MD, SD, SMD, AC, LD, , *VD, *AC, *LD REAL
OUT VD, ID, QD, MD, SD, SMD, AC, LD, *VD, *AC, *LD REAL
ANSI/IEEE 754 1958
9-81

SIMATIC
L
A
D
F
B
D
S
T
L
MUL_R
EN ENO
IN1 OUT OUT
IN2
DIV_R
EN ENO
IN1 OUT OUT
IN2
*R IN1, OUT
/R IN1, OUT
(OUT)
32 32
32 32
LAD FBD IN1*IN2 = OUT
STL
IN1/ IN2 = OUT
IN1*OUT = OUT
OUT / IN1 = OUT
ENO = 0 SM1.1 ( ) SM4.3
( ) 0006 ( )
SM1.0 ( )
SM1.1 (
) SM1.2 ( ) SM1.3 ( 0 )
✓
221
✓ ✓
222 224
SM1.3
SM1.1
SM1.1
SM1.0 SM1.2 SM1.1 SM1.3
( ) SM1.0 SM1.2
IN1, IN2 VD, ID, QD, MD, SMD, SD, LD, AC, , *VD, *AC, *LD REAL
OUT VD, ID, QD, MD, SMD, SD, LD, AC, *VD, *AC, *LD REAL
ANSI/IEEE 754 1958
9-82

SIMATIC
LAD
STL
Network 1
I0.0
AC1
AC0
ADD_R
EN ENO
IN1
IN2
OU
OUT
T
AC0
NETWORK 1
LD I0.0
+R AC1, AC0
*R AC1, VD100
/R VD10, VD200
MUL_R
EN ENO
AC1
VD100
IN1
IN2
OUT
T
VD100
DIV_R
EN ENO
VD100
VD10
IN1
IN2
OU OUT
T
VD200
FBD
Network 1
I0.
0
AC1
AC0
ADD_R MUL_R
DIV_R
EN ENO EN ENO EN ENO
IN1
IN2
OUT
T
AC0
AC1
VD100
IN1
IN2
OUT
T
VD100
VD100
VD10
IN1
IN2
OUOUT
T
VD200
AC1 4000.0
AC1 400.00
VD200
4000.0
AC0 6000.0
VD100
200.0
VD10
41.0
AC0 10000.0
VD100
800000.0
VD200
97.5609
9-27 LAD STL FBD
9-83

SIMATIC
PID
L
A
D
F
B
D
PID
EN ENO
TBL
LOOP
ID
PID
ENO = 0 SM1.1 ( ) SM4.3
( ) 0006 ( )
SM1.1 ( )
S
T
L
PID TBL, LOOP
✓
221
✓ ✓
222 224
TBL VB BYTE
LOOP (0 7) BYTE
PID ( ) PID
PID
(TOS)
TABLE LOOP TABLE LOOP
0 7 8 PID
PID
PID .
9 PID
(PV n) (PVn-1) (SPn) (Mn)
(Kc) (Ts) (TI) (TD) (MX)
PID
PID
PID
STEP 7-Micro/WIN 32
PID
STEP 7–Micro/WIN 32 PID PID
Tools > Instruction Wizard
PID
9-84

K D
1
SIMATIC
PID
PID (e) (e)
(SP) (PV) PID M (t)
M ( t)
= K
c
* e + K
t
∫ edt + M
inital
+ K
c
0
c
*
de
dt
= + +
M (t) PID
K C PID
e PID ( )
M initial PID
M
n
= KC
n
* en
+ K
I
* en
+ MX + K
D
* ( en
− e
−1)
= + +
M n
K C PID
e n n
PID
e n - 1 n-1 ( )
K I
M initial
PID
9-85

SIMATIC
M
n
= KC
n
* en
+ K
I
* en
+ MX + K
D
* ( en
− e
−1)
= + +
CPU
M n PID
K C PID
e n
e n - 1 n-1 ( )
K I
MX
K D
PID
M
n
= MP
n
+
MI
n
+
MD
n
= + +
M n
MP n
MI n
MD n
9-86

SIMATIC
MP (K C ) (e) K C
(e) (SP) (PV) CPU
MP n = K C * (SP n - PV n )
MP n n
K C
SP n n
PV n n
MI
CPU
MI n = K C * T S / T I * (SP n - PV n ) + MX
MI n n
K C
T S
T I
SP n n
PV n n
MX n-1 ( ) ( )
(MX) MI n MI n
mx MI n ( ) MX
M initial ( )
(K C ) (T S ) (T I )
9-87

SIMATIC
MD
MD n = K C * T D / T S * ((SP n - PV n ) - (SP n - 1 - PV n - 1 ))
(SP n = SP n -
1) :
MD n = K C * T D / T S * (SP n - PV n - SP n + PV n - 1 )
MD n = K C * T D / T S * (PV n - 1 - PV n )
MD n n
K C
T S
T D
SP n n
SP n - 1 n-1
PV n n
PV n - 1 n-1
PV n -1
PV n
MX
1.0
0.0
9-88

SIMATIC
PID (SP) (PV)
PID
( )
PID
16
XORD AC0 AC0 //
MOVW AIW0 AC0 //
LDW>= AC0 0 //
JMP 0 //
NOT //
ORD 16#FFFF0000 AC0 // AC0
LBL 0
DTR AC0 AC0 // 32
0.0 1.0
R Norm = (R Raw / Span) + Offset)
R Norm
R Raw
Offset 0.0 0.5
Span
:
32,000 ( )
64,000 ( )
/R 64000.0 AC0 //
0.0 1.0
+R 0.5 AC0 // 0.0 1.0
MOVR AC0 VD100 //
9-89

SIMATIC
0.0 1.0
16
R Scal = (M n - Offset) * Span
R Scal
M n
Offset 0.0 0.5
Span
32,000 ( )
64,000 ( )
MOVR VD108,AC0 //
-R 0.5,AC0 //
*R 64000.0,AC0 //
ROUND AC0 AC0 // 32
MOVW AC0, AQW0 // 16
16
9-90

SIMATIC
PID
PID
)
PID
0.0 1.0 PID
( PID
PID
PID ( 1.0 0.0)
MX = 1.0 - (MP n + MD n ) M n > 1.0
MX = - (MP n + MD n ) M n < 0.0
MX ( )
MP n n
MD n n
M n n
PID
0.0 1.0 PID
PID
0.0 1.0
( ) PID
9-91

SIMATIC
S7–200 PID PID PID
PID
PID
PID
( 0 1) PID PID
M n
PID
• (SP n ) (PV n )
• (PV n-1 ) (PV n )
• (MX) (M n )
PID 1 CPU STOP RUN
CPU RUN PID
PID
PID
CPU
9-92

SIMATIC
CPU ( ) PID
PID (
) 0.0 1.0
PID SM1.1 (
) 1 PID (
)
PID
36 9-19
9-19
0
4
8
12
16
20
24
28
32
(PV n )
(SP n )
(M n )
(K C )
(T S )
(T I )
(T D )
(MX)
(PV n-1 )
- 0.0 1.0
- 0.0 1.0
- / 0.0 1.0
-
-
-
-
- / 0.0 1.0
- / PID
9-93

SIMATIC
PID
75%
0% 100%
0.0 1.0 1/32,000 ( )
K C
0.25
T S
0.1
T I
30
75%
I0.0 0 1
(0.0 1.0 )
VD108 (VD108 )
9–28
9-94

SIMATIC
MAIN OB1
Network 1
SM0.1
LAD
SBR0
EN
STL
Network 1
LD SM0.1 // 0
CALL 0
SUBROUTINE 0
Network 1
SM0.0
0.75
0.25
0.10
MOV_R
EN ENO
IN OUT
MOV_
E R EN
N
I
O
OU
MOV_R
EN ENO
IN
OUT
VD104
VD112
VD116
Network 1
LD SM0.0
MOVR 0.75, VD104 //
MOVR 0.25, VD112 // =
MOVR 0.10, VD116 //
MOVR 30.0, VD120 //
MOVR 0.0, VD124 //
MOVB 100, SMB34 //
//
ATCH 0, 10 //
ENI //
//
30.0
0.0
MOV_R
EN ENO
IN
OUT
MOV_R
EN ENO
IN OUT
VD1
20
VD124
100
MOV_B
EN ENO
I
OUT
N
ATCH
EN ENO
SMB34
0
INT
10
EVNT
ENI
9-28 PID
9-95

SIMATIC
LAD
INTERRUPT 0
Network 1
SM0.0 I_DI
EN ENO
AIW0 IN OUT
DI_R
EN ENO
AC0 IN OUT
DIV_R
EN ENO
AC0
32000
IN1
IN2
OUT
MOV_R
EN ENO
AC0
AC0
AC
0
STL
NETWORK 1
//
//
LD SM0.0
ITD AIW0, AC0 //
DTR AC0, AC0 //
/R 32000.0, AC0 //
MOVR AC0, VD100 //
NETWORK 2
//
LD I0.0 //
PID VB100, 0
NETWORK 3
//
LD SM0.0
MOVR VD108, AC0 //
*R 32000.0, AC0 //
ROUND AC0, AC0 //
DTI AC0, AQW0 //
AC0
IN
OUT
VD100
Network 2
I0.0
Network 3
SM0.0
VB100
0
VD108
32000
AC0
AC0
PID
EN ENO
TBL
LOOP
MUL_R
EN ENO
IN1 OUT
T
IN2
ROUND
EN ENO
IN OUT
DI_I
EN ENO
IN OUT
AC0
AC0
AQW0
9-28 PID ( )
9-96

SIMATIC
MAIN OB1
Network 1
SM0.1
SBR0
EN
FBD
SUBROUTINE 0
SM0.0
0.75
MOV_R
EN ENO
IN OUT
MOV_R
MOV_R
VD104 0.25
EN
IN
ENO
OUT VD112 0.10
EN
IN
ENO
OUT VD116
30.0
MOV_R
EN ENO
IN OUT
MOV_R
MOV_B
EN ENO
EN ENO
VD120 0.0 IN OUT VD124 100 IN OUT SMB34
10
0
ATCH
EN ENO
INT
EVNT
ENI
INTERRUPT 0
Network 1
SM0.0
I_DI
EN ENO
DI_R
EN ENO
DIV_R
EN ENO
MOV_R
EN ENO
AIW0 IN
Network 2
OUT
AC0
AC0
IN
OUT
AC0 AC0 IN1
32000 IN2
OUT
T
AC0 AC0
IN
OUT
VD100
I0.0
VB100
0
PID
EN ENO
TBL
LOOP
Network 3
SM0.0
MUL_R
EN ENO
ROUND
EN ENO
DI_I
EN ENO
VB108
32000
IN1
IN2
OU OUT
T
AC0
AC0
IN
OUT
AC0
AC0
IN
OUT
AQW0
9-28 PID ( )
9-97

SIMATIC
L
A
D
F
B
D
S
T
L
✓
221
L
A
D
SQRT
EN ENO
IN
SQRT IN, OUT
✓ ✓
222 224
OUT
IN = OUT
(SQRT) 32 (IN)
32 (OUT)
ENO = 0 SM1.1 ( ) SM4.3
( ) 0006 ( )
SM1.1 ( ) SM1.2 ( )
SM1.0 ( )
SM1.1 SM1.1 SM1.0 SM1.2
SM1.1 SM1.0 SM1.2
IN VD, ID, QD, MD, SMD, SD, LD, AC, , *VD, *AC, *LD REAL
OUT VD, ID, QD, MD, SMD, SD, LD,AC, *VD, *AC, *LD REAL
9-98

SIMATIC
9.10 SIMATIC
L
A
D
F
B
D
MOV_B
EN ENO
IN OUT
MOV_W
EN ENO
IN OUT
MOV_DW
EN ENO
IN OUT
(OUT)
(OUT)
(OUT)
(OUT)
(MOVB)
(MOVW)
(MOVDW)
(MOVR)
(IN)
(IN)
(IN)
(IN)
ENO = 0 SM4.3 ( )
0006 ( )
MOV_R
EN ENO
IN
OUT
S
T
L
MOVB IN, OUT
MOVW IN, OUT
MOVD IN, OUT
MOVR IN, OUT
✓
221
✓ ✓
222 224
IN VB, IB, QB, MB, SB, SMB, LB, AC, , *VD, *AC, *LD BYTE
OUT VB, IB, QB, MB, SB, SMB, LB, AC, *VD, *AC, *LD BYTE
IN VW, IW, QW, MW, SW, SMW, LW, T, C, AIW, , AC
*VD, *AC, *LD
OUT
IN
VW, T, C, IW, QW, SW, MW, SMW, LW, AC, AQW,
*VD, *AC, *LD
VD, ID, QD, MD, SD, SMD, LD, HC, &VB, &IB, &QB,
&MB, &SB, &T, &C, AC, , *VD, *AC, *LD
WORD, INT
WORD, INT
DWORD, DINT
OUT VD, ID, QD, MD, SD, SMD, LD, AC, *VD, *AC, *LD DWORD, DINT
IN VD, ID, QD, MD, SD, SMD, LD, AC, , *VD, *AC,
*LD
REAL
OUT VD, ID, QD, MD, SD, SMD, LD, AC, *VD, *AC, *LD REAL
9-99

SIMATIC
L
A
D
F
B
D
BLKMOV_B
EN
ENO
IN
OUT
N
BLKMOV_W
EN ENO
IN
OUT
N
BLKMOV_DW
EN
ENO
N 1 255
255
(BMB) (IN) N
(OUT) N
(BMW) (IN) N
(OUT) N N 1
(BMDW)
(IN)
N (OUT) N
N 1 255
ENO = 0 SM4.3 ( ) 0006
( ) 0091 ( )
IN
OUT
N
S
T
L
✓
221
BMB IN, OUT, N
BMW IN, OUT, N
BMD IN, OUT, N
✓ ✓
222 224
IN, OUT VB, IB, QB, MB,SB, SMB, LB, *VD, *AC, *LD BYTE
N VB, IB, QB, MB, SB, SMB, LB, AC, , *VD, *AC,
*LD
IN
VW, IW, QW, MW, SW, SMW, LW, T, C, AIW, *VD,
*AC, *LD
N VB, IB, QB, MB, SB, SMB, LB, AC, , *VD, *AC,
*LD
OUT
VW, IW, QW, MW, SW, SMW, LW, T, C, AQW,
*VD, *LD, *AC
BYTE
WORD
BYTE
WORD
IN, OUT VD, ID, QD, MD, SD, SMD, LD, *VD, *AC, *LD DWORD
N VB, IB, QB, MB, SB, SMB, LB, AC, , *VD, *AC,
*LD
BYTE
9-100

SIMATIC
LAD
STL
I2.1 BLKMOV_B
EN ENO
VB20 IN OUT
VB100
1 (VB20 VB23)
2 (VB100 VB103)
LD I2.1
BMB VB20, VB100, 4
4
N
FBD
I2.1
VB20
4
BLKMOV_B
EN
I
N
N
ENO
OUT
VB100
1
VB20
30
VB21
31
VB22
32
VB23
33
2
VB100
30
VB101
31
VB102
32
VB103
33
9-29 LAD STL FBD
9-101

SIMATIC
L
A
D
F
B
D
SWAP
EN ENO
IN
(SWAP)
(IN)
ENO = 0 SM4.3 ( )
0006 ( )
S
T
L
✓
221
SWAP IN
✓ ✓
222 224
IN VW, IW, QW, MW, SW, SMW, LW, T, C, AC, *VD, *AC, *LD WORD
LAD
I2.1 MOV_B
EN ENO
VB50 IN OUT
SWAP
EN ENO
AC0
STL
LD I2.1
MOVB VB50, AC0
SWAP AC0
AC0
IN
FBD
I2.1
MOV_B
EN ENO
SWAP
EN ENO
VB50
IN
OUT
AC0
AC0
IN
VB50
C3
AC0
D6 C3
AC0
C3
AC0
C3 D6
9-30 LAD STL FBD
9-102

SIMATIC
L
A
D
EN
FILL_N
ENO
(FILL)
(IN)
(OUT) N N 1 255
F
B
D
IN
N
OUT
ENO = 0 SM4.3 ( )
0006 ( ) 0091 ( )
S
T
L
✓
221
FILL IN, OUT, N
✓ ✓
222 224
IN VW, IW, QW, MW, SW, SMW, LW, AIW, T, C, AC, , *VD,
*AC, *LD
WORD
N VB, IB, QB, MB, SB, SMB, LB, AC, , *VD, *AC, *LD BYTE
OUT
VW, IW, QW, MW, SW, SMW, LW, T, C, AQW, *VD, *AC, *LD WORD
LAD
STL
I2.1
FILL_
ENN
ENO
VW200
VW218
LD I2.1
FILL 0, VW200, 10
0
IN
10
N
OUT
VW200
FBD
I2.1
FILL_
ENN
ENO
0
10
0
IN
N
OUT
VW200
VW200
0
VW202
0
. . .
VW218
0
9-31
9-103

SIMATIC
9.11 SIMATIC
(ATT)
L
A
D
F
B
D
S
T
L
AD_T_TBL
EN ENO
DATA
TBL
ATT DATA, TABLE
TT (TBL) (DATA)
(EC)
(TL)
EC 1 TL EC
100
ENO = 0 SM4.3 ( )
0006 ( ) 0091 ( )
✓
221
✓ ✓
222 224
SM1.4 1
DATA VW, IW, QW, MW, SW, SMW, LW, T, C, AIW, AC, , *VD,
*AC, *LD
WORD
TBL VW, IW, QW, MW, SW, SMW, LW, T, C, *VD, *AC, *LD WORD
9-104

SIMATIC
LAD
STL
I3.0 AD_T_TBL
EN ENO
VW100
VW200
DATA
TBL
LD I3.0
ATT VW100, VW200
I3.0
VW100
VW200
FBD
AD_T_TBL
EN ENO
DATA
TBL
ATT
ATT
VW100
1234
VW200
VW202
VW204
VW206
VW208
VW210
VW212
VW214
0006
0002
5431
8942
xxxx
xxxx
xxxx
xxxx
TL ( )
EC ( )
d0 ( 0)
d1 ( 1)
VW200
VW202
VW204
VW206
VW208
VW210
VW212
VW214
0006
0003
5431
8942
1234
xxxx
xxxx
xxxx
TL ( )
EC( )
d0 ( 0)
d1 ( 1)
d2 ( 2)
9-32
9-105

SIMATIC
L
A
D
F
B
D
S
T
L
EN
SRC
PTN
INDX
CMD
TBL_FIND
ENO
FND= SRC, PATRN
INDX
FND SRC, PATRN,
INDX
FND< SRC, PATRN,
INDX
FND> SRC, PATRN,
INDX
ND INDX (SRC) PTN
( )
CMD 1 4
(TL)
100
INDX
INDX
( ) 0 99
(EC)
EC
INDX
ENO = 0 SM4.3 ( )
0006 ( ) 0091 ( )
✓
221
✓ ✓
222 224
SRC VW, IW, QW, MW, SMW, LW, T, C, *VD, *AC, *LD WORD
PTN VW, IW, QW, MW, SW, SMW, AIW, LW, T, C, AC, , *VD,
*AC, *LD
INDX VW, IW, QW, MW, SW, SMW, LW, T, C, AC, *VD, *AC, *LD WORD
CMD
INT
BYTE
FND ATT LIFO FIFO
(EC) TL ATT LIFO FIFO
FND FND SRC
( EC) ATT LIFO FIFO TABLE
2 9-33
ATT, LIFO,
VW200
VW202
VW204
VW206
VW208
VW210
VW212
VW214
FIFO
0006
0006
xxxx
xxxx
xxxx
xxxx
xxxx
xxxx
TL ( )
EC ( )
d0 ( 0)
d1 ( 1)
d2 ( 2)
d3 ( 3)
d4 ( 4)
d5 ( 5)
FND
VW202
VW204
VW206
VW208
VW210
VW212
VW214
0006
xxxx
xxxx
xxxx
xxxx
xxxx
xxxx
EC ( )
d0 ( 0)
d1 ( 1)
d2 ( 2)
d3 ( 3)
d4 ( 4)
d5 ( 5)
9-33 FND ATT LIFO FIFO
9-106

SIMATIC
LAD
STL
LD I2.1
FND= VW202, 16#3130, AC1
I2.1 TBL_FIND
EN ENO
VW202
16#3130
SRC
PTN
AC1
INDX
1 CMD
I2.1
3130H
I2.1
VW202
16#3130
AC1
1
FBD
TBL_FIND
EN ENO
SRC
PTN
INDX
CMD
FND
VW202
VW204
VW206
VW208
VW210
VW212
VW214
ATT LIFO FIFO VW200
0006
3133
4142
3130
3030
3130
4541
EC ( )
d0 ( 0)
d1 ( 1)
d2 ( 2)
d3 ( 3)
d4 ( 4)
d5 ( 5)
AC1 0
AC1 0
AC1 2 AC1 1 d2
corresponding to the first
AC1 3
INDEX 1
AC1
AC1
4
5
AC1 2 d4
INDEX 1
AC1
6
AC1
EC
AC1 0
INDEX 0
9-34 LAD STL FBD
9-107

SIMATIC
(FIFO)
L
A
D
F
B
D
EN
TBL
FIFO
ENO
OUT
DATA
(FIFO)
DATA
(TBL)
(EC) 1
ENO = 0 SM1.5 ( ) SM4.3
( ) 0006 ( ) 0091 ( )
S
T
L
FIFO TABLE, DATA
SM1.5 1
✓
221
✓ ✓
222 224
TABLE VW, IW, QW, MW, SW, SMW, LW, T, C,*VD, *AC, *LD WORD
DATA
VW, IW, QW, MW, SW, SMW, LW, AC, AQW, T, C, *VD, *AC,
*LD
WORD
FIFO
LAD
STL
I4.1
FIFO
EN ENO
LD I4.1
FIFO VW200, VW400
VW200
TBL
DATA
VW400
FBD
I4.1
FIFO
EN ENO
VW200
TBL
DATA
VW400
FIFO
FIFO
VW400
5431
VW200
VW202
VW204
VW206
VW208
VW210
VW212
VW214
0006
0003
5431
8942
1234
xxxx
xxxx
xxxx
TL ( )
EC ( )
d0 ( 0)
d1 ( 1)
d2 ( 2)
VW200
VW202
VW204
VW206
VW208
VW210
VW212
VW214
0006
0002
8942
1234
xxxx
xxxx
xxxx
xxxx
TL ( )
EC ( )
d0 ( 0)
d1 ( 1)
9-35 FIFO
9-108

SIMATIC
(LIFO)
L
A
D
F
B
D
EN
TBL
LIFO
ENO
OUT
DATA
(LIFO)
(EC)
(TBL)
DATA
ENO = 0 SM1.5 ( ) SM4.3
( ) 0006 ( ) 0091 ( )
S
T
L
LIFO TABLE, DATA
SM1.5
✓
221
✓ ✓
222 224
TABLE VW, IW, QW, MW, SW, SMW, LW, T, C,*VD, *AC, *LD WORD
DATA
VW, IW, QW, MW, SW, SMW, LW, AQW, T, C, AC, *VD, *AC,
*LD
WORD
LIFO
LAD
STL
I4.0 LIFO
VW200
EN
TBL
ENO
DATA
VW300
LD I4.0
LIFO VW200, VW300
I4.0
VW200
FBD
LIFO
EN ENO
TBL
DATA
VW300
LIFO
LIFO
VW300
1234
VW200
VW202
VW204
VW206
VW208
VW210
VW212
VW214
0006
0003
5431
8942
1234
xxxx
xxxx
xxxx
TL ( )
EC ( )
d0 ( 0)
d1 ( 1)
d2 ( 2)
VW200
VW202
VW204
VW206
VW208
VW210
VW212
VW214
0006
0002
5431
8942
xxxx
xxxx
xxxx
xxxx
TL ( )
EC ( )
d0 ( 0)
d1 ( 1)
9-36 LIFO
9-109

SIMATIC
9.12 SIMATIC
L
A
D
F
B
D
WAND_B
EN ENO
IN1 OUT
IN2
WOR_B
EN ENO
IN1 OUT
IN2
ANDB ( )
(OUT)
ORB ( )
(OUT)
XORB ( )
(OUT)
ENO = 0 SM4.3 ( )
0006 ( )
SM1.0 ( )
WXOR_B
EN ENO
IN1
OUT
IN2
S
TL
ANDB IN1, OUT
ORB IN1, OUT
XORB IN1, OUT
✓
221
✓ ✓
222 224
IN1, IN2 VB, IB, QB, MB, SB, SMB, LB, AC, , *VD, *AC, *LD BYTE
OUT VB, IB, QB, MB,SB, SMB, LB, AC, *VD, *AC, *LD BYTE
9-110

SIMATIC
L
A
D
F
B
D
WAND_W
EN ENO
IN1 OUT
IN2
WOR_W
EN ENO
IN1 OUT
IN2
ANDW ( )
(OUT)
ORW ( )
(OUT)
XORW ( )
(OUT)
ENO = 0 SM4.3 ( )
0006 ( )
SM1.0 ( )
WXOR_W
EN ENO
IN1
OUT
IN2
S
TL
ANDW IN1, OUT
ORW IN1, OUT
XORW IN1, OUT
✓
221
✓ ✓
222 224
IN1, IN2 VW, IW, QW, MW, SW, SMW, LW, T, C, AIW, AC, , *VD,
*AC, *LD
WORD
OUT VW, IW, QW, MW, SW, SMW, LW, T, C, AC, *VD, *AC, *LD WORD
9-111

SIMATIC
L
A
D
F
B
D
WAND_DW
EN ENO
IN1 OUT
IN2
WOR_DW
EN ENO
IN1 OUT
IN2
NDD ( )
(OUT)
ORD ( )
(OUT)
XORD ( )
(OUT)
ENO = 0 SM4.3 ( )
0006 ( )
SM1.0 ( )
WXOR_DW
EN ENO
IN1
OUT
IN2
S
TL
ANDD IN1, OUT
ORD IN1, OUT
XORD IN1, OUT
✓
221
✓ ✓
222 224
IN1, IN2 VD, ID, QD, MD, SMD, AC, LD, HC, , *VD, *AC, SD, *LD DWORD
OUT VD, ID, QD, MD, SMD, LD, AC, *VD, *AC, SD, *LD DWORD
9-112

SIMATIC
I4.0
AC1
AC0
LAD
WAND_W
EN ENO
IN1
IN2
OUT
AC0
STL
LD I4.0
ANDW AC1, AC0
ORW AC1, VW100
XORW AC1, AC0
AC1
WOR_W
EN ENO
IN1
OUT
VW100
VW100
IN2
AC1
WXOR_W
EN ENO
IN1 OUT
AC0
AC0
IN2
FBD
I4.0
AC1
WAND_W
EN ENO
IN1 OUT
AC0
AC1
WOR_W
EN ENO
IN1 OUT
VW100
AC1
WXOR_W
EN ENO
IN1 OU
AC0
AC0
IN2
VW100
IN2
AC0
IN2
AC1
0001 1111 0110 1101
AC1
0001 1111 0110 1101
AC1
0001 1111 0110 1101
AC0 1101 0011 1110 0110
VW100 1101 0011 1010 0000
AC0
0001 0011 0110 0100
AC0
0001 0011 0110 0100
VW100
1101 1111 1110 1101
AC0
0000 1100 0000 1001
9-37
9-113

SIMATIC
L
A
D
F
B
D
INV_B
EN ENO
IN OUT
INV_W
EN ENO
IN OUT
INV_DW
EN ENO
INVB ( ) (IN)
(OUT)
INVW ( ) (IN)
(OUT)
INVW ( ) (IN)
(OUT)
ENO = 0 SM4.3 ( )
0006 ( )
SM1.0 ( )
IN
OUT
S
TL
INVB OUT
INVW OUT
INVD OUT
✓
221
✓ ✓
222 224
Invert... /
IN VB, IB, QB, MB,SB, SMB, LB, AC, , *VD, *AC,
*LD
BYTE
OUT VB, IB, QB, MB, SB, SMB, LB, AC,*VD, *AC, *LD BYTE
IN
OUT
VW, IW, QW, MW, SW, SMW, T, C, AIW, LW, AC,
, *VD, *AC, *LD
VW, IW, QW, MW,SW, SMW, T, C, LW, AC, *VD,
*AC, *LD
IN VD, ID, QD, MD, SD, SMD, LD, HC, AC, , *VD,
*AC, *LD
WORD
WORD
DWORD
OUT VD, ID, QD, MD, SD, SMD, LD, AC, *VD, *AC, *LD DWORD
9-114

SIMATIC
LAD
I4.0 INV_W
EN ENO
IN
AC0 OUT AC0
I4.
0
STL
LD I4.0
INVW AC0
FBD
INV_W
EN ENO
AC0 IN OUT AC0
AC0
1101 0111 1001 0101
AC0
0010 1000 0110 1010
9-38 LAD STL
9-115

SIMATIC
9.13 SIMATIC
L
A
D
EN
SHR_B
ENO
(SLB)
(SRB)
(IN) N OUT
F
B
D
IN
N
EN
IN
OUT OUT
SHL_B
ENO
OUT OUT
8 8
(SM1.0)
(SM1.1)
0
N
S
TL
N
SRB OUT, N
SLB OUT, N
ENO = 0 SM4.3 ( )
0006 ( )
SM1.1 ( )
SM1.0 ( )
✓
221
✓ ✓
222 224
IN, OUT VB, IB, QB, MB, SB, SMB, LB, AC, *VD, *AC, *LD BYTE
N VB, IB, QB, MB, SB, SMB, LB, AC, , *VD, *AC, *LD BYTE
9-116

SIMATIC
L
A
D
F
B
D
SHR_W
EN ENO
IN
N
OUT OUT
SHL_W
EN ENO
(SLW)
(SRW)
(IN) N OUT
(SM1.0)
16 16
(SM1.1)
0
N
IN
N
OUT OUT
ENO = 0 SM4.3 ( )
0006 ( )
S
T
L
SRW OUT, N
SM1.1 ( )
SM1.0 ( )
SLW OUT, N
✓
221
✓ ✓
222 224
IN VW, IW, QW, MW, SW, SMW, LW, T, C, AIW, AC, , *VD,
*AC, *LD
WORD
N VB, IB, QB, MB, SB, SMB, LB, AC, , *VD, *AC, *LD BYTE
OUT VW, IW, QW, MW, SW, SMW, LW, T, C, AC, *VD, *AC, *LD WORD
9-117

SIMATIC
L
A
D
F
B
D
S
TL
SHR_DW
EN ENO
IN OUT OUT
N
SHL_DW
EN ENO
IN OUT OUT
N
SRD OUT, N
SLD OUT, N
(OUT)
(IN)
(SLDW)
32 32
(SM1.1)
0
(SM1.0)
N
(SRDW)
ENO = 0 SM4.3 ( )
0006 ( )
SM1.1 ( )
SM1.0 ( )
N
✓
221
✓ ✓
222 224
IN VD, ID, QD, MD, SD, SMD, LD, AC, HC, , *VD, *AC, *LD DWORD
N VB, IB, QB, MB, SB, SMB, LB, AC, , *VD, *AC, *LD BYTE
OUT VD, ID, QD, MD, SD, SMD, LD, AC, *VD, *AC, *LD DWORD
9-118

SIMATIC
L
A
D
F
B
D
ROR_B
EN ENO
IN OUT OUT
N
(IN)
(OUT)
(RLB)
N
(RRB)
8
8 0 7
EN
ROL_B
ENO
(SM1.1)
IN
N
OUT OUT
8
(SM1.1)
0 (SM1.0)
S
T
L
✓
221
RRB OUT, N
RLB OUT, N
✓ ✓
222 224
ENO = 0 SM4.3 ( )
0006 ( )
SM1.0 ( )
SM1.1 ( )
IN VB, IB, QB, MB, SMB, SB, LB, AC, *VD, *AC, *LD BYTE
N VB, IB, QB, MB, SMB, SB, LB, AC, , *VD, *AC, *LD BYTE
OUT VB, IB, QB, MB, SMB, SB, LB, AC, *VD, *AC, *LD BYTE
9-119

SIMATIC
L
A
D
F
B
D
ROR_W
EN ENO
IN OUT OUT
N
(IN)
(OUT)
(RLW)
N
(RRW)
16
N 16 0 15
EN
ROL_W
ENO
(SM1.1)
IN
N
OUT OUT
16
(SM1.1)
0 (SM1.0)
S
TL
✓
221
RRW OUT, N
RLW OUT, N
✓ ✓
222 224
ENO = 0 SM4.3 ( )
0006 ( )
SM1.1 ( )
SM1.0 ( )
IN VW, T, C, IW, MW, SMW, AC, QW, LW, AIW, , *VD, *AC,
SW, *LD
WORD
N VB, IB, QB, MB, SMB, LB, AC, , *VD, *AC, SB, *LD BYTE
OUT VW, T, C, IW, QW, MW, SMW, LW, AC, *VD, *AC, SW, *LD WORD
9-120

SIMATIC
L
A
D
F
B
D
ROR_DW
EN ENO
IN OUT OUT
N
ROL_DW
EN ENO
IN OUT OUT
N
31
(SM1.1)
(IN)
(OUT)
(RLD)
32
(SM1.1)
0 (SM1.0)
N
(RRD)
N 32
N 32 0
S
TL
✓
221
RRD OUT, N
RLD OUT, N
✓ ✓
222 224
ENO = 0 SM4.3 ( )
0006 ( )
SM1.1 ( )
SM1.0 ( )
IN VD, ID, QD, MD, SMD, LD, AC, HC, , *VD, *AC, SD, *LD DWORD
N VB, IB, QB, MB, SMB, LB, AC, , *VD, *AC, SB, *LD BYTE
OUT VD, ID, QD, MD, SMD, LD, AC, *VD, *AC, SD, *LD DWORD
9-121

SIMATIC
LAD
STL
I4.0 ROR_W
EN ENO
AC0
2
IN
N OUT AC0
SHL_W
VW200
3
EN
IN
N
ENO
OUT VW200
I4.0
AC0
2
ROR_W
EN ENO
IN OUT
N
LD I4.0
RRW AC0, 2
SLW VW200, 3
AC0
FBD
VW200
3
SHL_W
EN ENO
IN OUT
N
VW200
AC0
0100 0000 0000 0001 x VW200
1110 0010 1010 1101
x
1
AC0 1010 0000 0000 0000 1
1
VW200 1100 0101 0101 1010 1
2
AC0 0101 0000 0000 0000 0
(SM1.0) = 0
(SM1.1) = 0
2
VW200 1000 1010 1011 0100 1
3
VW200 0001 shift 0101 0110 1000 1
(SM1.0) = 0
0 (SM1.1) = 1
9-39 LAD STL FBD
9-122

SIMATIC
L
A
D
F
B
D
S
T
L
SHRB
EN ENO
DATA
S_BIT
N
SHRB DATA, S_BIT, N
SHRB
S-BIT
(SHRB)
DATA
S-BIT N
N
( = N = -N)
(SM1.1)
ENO = 0 SM4.3 ( )
0006 ( ) 0091 ( ) 0092 (
)
SM1.1 ( )
SM1.0 ( )
✓
221
✓ ✓
222 224
DATA, S_BIT I, Q, M, SM, T, C, V, S, L BOOL
N VB, IB, QB, MB, SMB, LB, AC, , *VD, *AC, SB, *LD BYTE
9-123

SIMATIC
41
(MSB.b)
S-BIT N 9-
MSB.b = [ (S-IT ) + ([N - 1] + (S-BIT )) / 8 ] . [ 8
]
S-BIT
S-BIT V33.4 N 14 MSB.b V35.1
MSB.b = V33 + ([14] - 1 +4) /8
= V33 + 17/8
= V33 + 2 ( 1)
= V35.1
N
N
(S-BIT) N (S-BIT)
9–40
(SM1.1) 64
N= -14
N= 14
V33
S_BIT
MSB
LSB
7 4 0
V33
S_BIT
MSB
LSB
7 4 0
V34
7 0
V34
7 0
V35 7 1 0
V35 7 1 0
9-40
9-124

SIMATIC
I0.2
P
I0.3
V100.0
4
LAD
SHRB
EN ENO
DATA
S_BIT
N
STL
LD I0.2
EU
SHRB I0.3, V100.0, 4
FBD
I0.2
P
IN
OUT
I0.3
SHRB
EN ENO
DATA
V100.0
4
S_BIT
N
I0.2
1
I0.3
1 2
MSB
LSB
7
0
V100
0 1 0 1
S_BIT
I0.3
1
V100
(SM1.1)
x
1
0
1
1
S_BIT
I0.3
(SM1.1) 0
2
V100
0
1
1
0
S_BIT
I0.3
(SM1.1) 1
9-41 LAD STL FBD
9-125

SIMATIC
9.14 SIMATIC
BCD (BCDI) BCD (IBCD)
L
A
D
F
B
D
S
T
L
BCD_I
EN ENO
IN
BCDI OUT
IBCD OUT
OUT
I_BCD
EN ENO
IN
OUT
BCDI BCD (IN)
(OUT) OUT IN 0
9999
IBCD (IN) BCD
(OUT) OUT IN 0
9999
ENO = 0 SM1.6 (BCD )
SM4.3 ( ) 0006 ( )
BCD)
SM1.6 (
✓
221
✓ ✓
222 224
IN VW, T, C, IW, QW, MW, SMW, LW, AC, AIW, , *VD, *AC,
SW, *LD
WORD
OUT VW, T, C, IW, QW, MW, SMW, LW, AC, *VD, *AC, SW, *LD WORD
(DTR)
L
A
D
F
B
D
EN
IN
DI_R
ENO
OUT
DTR 32 (IN) 32
(OUT)
ENO = 0 SM4.3 ( )
0006 ( )
S
T
L
DTR IN, OUT
✓
221
✓ ✓
222 224
IN VD, ID, QD, MD, SMD, AC, LD, HC, , *VD, *AC, SD, *LD DINT
OUT VD, ID, QD, MD, SMD, LD, AC, *VD, *AC, SD, *LD REAL
9-126

SIMATIC
(ROUND)
L
A
D
F
B
D
ROUND
EN ENO
IN OUT
(ROUND) (IN) 32
(OUT) 0.5
ENO = 0 SM1.1 ( ) SM4.3
( ) 0006 ( )
SM1.1 ( )
S
T
L
ROUND IN, OUT
✓
221
✓ ✓
222 224
IN VD, ID, QD, MD, SMD, AC, LD, HC, , *VD, *AC, SD, *LD REAL
OUT VD, ID, QD, MD, SMD, LD, AC, *VD, *AC, SD, *LD DINT
(TRUNC)
L
A
D
F
B
D
S
TL
✓
221
TRUNC
EN EN
O
IN OU
T
TRUNC IN, OUT
✓ ✓
222 224
(TRUNC) 32 (IN) 32
(OUT) (
)
ENO = 0 SM1.1 ( ) SM4.3
( ) 0006 ( )
SM1.1 ( )
IN VD, ID, QD, MD, SMD, LD, AC, , *VD, *AC, SD, *LD REAL
OUT VD, ID, QD, MD, SMD, LD, AC, *VD, *AC, SD, *LD DINT
9-127

SIMATIC
L
A
D
F
B
D
S
T
L
DI_I
EN ENO
IN OUT
DTI IN, OUT
(OUT)
(IN)
ENO = 0 SM1.1 ( ) SM4.3
( ) 0006 ( )
SM1.1 ( )
✓
221
✓ ✓
222 224
IN VD, ID, QD, MD, SMD, AC, LD, HC, , *VD, *AC, SD, *LD DINT
OUT VW, IW, QW, MW, SW, SMW, LW, T, C, AC, *VD, *LD, *AC INT
L
A
D
F
B
D
EN
IN
I_DI
ENO
OUT
(OUT)
(IN)
ENO = 0 SM4.3 (
) 0006 ( )
S
TL
ITD IN, OUT
✓
221
✓ ✓
222 224
IN VW, IW, QW, MW, SW, SMW, LW, T, C, AIW, AC, , *AC,
*VD, *LD
OUT VD, ID, QD, MD, SD, SMD, LD, AC, *VD, *LD, *AC DINT
INT
9-128

SIMATIC
L
A
D
EN
B_I
ENO
(OUT)
(IN)
F
B
D
IN
OUT
ENO = 0 SM4.3 ( )
0006 ( )
S
T
L
✓
221
BTI IN, OUT
✓ ✓
222 224
IN VB, IB, QB, MB, SB, SMB, LB, AC, , *AC, *VD, *LD BYTE
OUT VW, IW, QW, MW, SW, SMW, LW, T, C, AC, *VD, *LD, *AC INT
L
A
D
F
B
D
S
T
L
I_B
EN ENO
IN OUT
ITB IN, OUT
(OUT)
0 255
(IN)
ENO = 0 SM1.1 ( ) SM4.3
( ) 0006 ( )
SM1.1 ( )
✓
221
✓ ✓
222 224
IN VW, IW, QW, MW, SW, SMW, LW, T, C, AIW, AC, , *VD,
*LD, *AC
OUT VB, IB, QB, MB, SB, SMB, LB, AC, *VD, *AC, *LD BYTE
INT
9-129

SIMATIC
Network 1
I0.0 I_DI
EN ENO
C10
AC1
VD0
VD4
IN
OUT
DI_R
EN ENO
IN
OUT
MUL_R
EN ENO
IN1
IN2
OUT
ROUND
EN ENO
VD
IN OUT
8
Network 2
I3.0 BCD_I
EN ENO
LAD
AC1
VD0
VD8
VD12
Clear accumulator
1.
Load counter value
(number of inches)
into AC1.
Convert to a real
number.
Multiply by 2.54 to change
to
centimeters.
Convert back to an
integer.
STL
Network 1
LD I0.0
ITD C10, AC1
DTR AC1, VD0
MOVR VD0, VD8
*R VD4, VD8
ROUND VD8, VD12
Network 2
LD I3.0
BCDI AC0
AC0
IN
OUT
AC0
FBD
Network 1
I_DI
I0.0
C10
EN
IN
ENO
OUT
AC1
AC1
DI_R
EN ENO
IN
OUT
VD0
VD0
VD4
MUL_R
EN ENO
IN1
IN2
OUT
VD8
VD8
ROUND
EN ENO
IN OUT
VD12
Network 2
BCD_I
I3.0 EN ENO
AC0
IN
OUT
AC0
C10 101
VD0 101.0
VD4 2.54
VD8 256.54
Round
= 101
2.54 ( )
256.54
BCD
AC0
AC0
1234
BCDI
04D2
V12 257
257
9-42
9-130

SIMATIC
L
A
D
F
B
D
S
T
L
DECO
EN ENO
IN OUT
DECO IN, OUT
(DECO) (IN) (
) (OUT) 1
0
ENO = 0 SM4.3 ( ) 0006
( )
✓
221
✓ ✓
222 224
IN VB, IB, QB, MB, SMB, LB, SB, AC, , *VD, *AC, *LD BYTE
OUT
VW, IW, QW, MW, SMW, LW, SW, AQW, T, C, AC, *VD, *AC,
*LD
WORD
L
A
D
F
B
D
ENCO
EN ENO
IN OUT
(ENCO) (IN) ( 1)
(OUT) ( )
ENO = 0 SM4.3 ( )
0006 ( )
S
T
L
ENCO IN, OUT
✓
221
✓ ✓
222 224
IN VW, T, C, IW, QW, MW, SMW, AC, LW, AIW, , *VD, *AC,
SW, *LD
WORD
OUT VB, IB, QB, MB, SMB, LB, AC, *VD, *AC, SB, *LD BYTE
9-131

SIMATIC
LAD
STL
I3.1
AC2
DECO
EN ENO
IN OUT
VW40
AC2
LD I3.1
DECO AC2, VW40
I3.1
FBD
DECO
EN ENO
AC2
IN
OUT
VW40
AC2 3 DECO VW40
3
AC2
VW40
3
DECO
15 3 0
0000 0000 0000 1000
9-43
LAD
STL
I3.1
ENCO
EN ENO
AC2
VB40
LD I3.1
ENCO AC2, VB40
FBD
AC2
IN
OUT
VB40
I3.1
ENCO
EN ENO
AC2
IN
OUT
VB40
AC2 ENCO VB40
AC2
VB40
15 9 0
1000 0010 0000 0000
ENCO
9
9-44 (ENCO)
9-132

SIMATIC
(SEG)
L
A
D
F
B
D
S
T
L
SEG
EN ENO
IN OUT
SEG IN, OUT
(SEG)
(OUT) (IN)
ENO = 0 SM4.3 ( )
0006 ( )
9–45 (SEG)
✓
221
✓ ✓
222 224
IN VB, IB, QB, MB, SMB, LB, AC, , *VD, *AC, SB, *LD BYTE
OUT VB, IB, QB, MB, SMB, LB, AC, *VD, *AC, SB, *LD BYTE
(IN)
LSD
(OUT)
- g f e d c b a
(IN)
LSD
(OUT)
- g f e d c b a
0 0 0 1 1 1 1 1 1
8 0 1 1 1 1 1 1 1
1 0 0 0 0 0 1 1 0
a 9 0 1 1 0 0 1 1 1
2 0 1 0 1 1 0 1 1 f g b A 0 1 1 1 0 1 1 1
3 0 1 0 0 1 1 1 1
e c
B 0 1 1 1 1 1 0 0
4 0 1 1 0 0 1 1 0 C 0 0 1 1 1 0 0 1
5 0 1 1 0 1 1 0 1
d
D 0 1 0 1 1 1 1 0
6 0 1 1 1 1 1 0 1 E 0 1 1 1 1 0 0 1
7 0 0 0 0 0 1 1 1 F 0 1 1 1 0 0 0 1
9-45
9-133

SIMATIC
I3.3
LAD
SEG
EN ENO
STL
LD I3.3
SEG VB48, AC1
FBD
VB48
IN
OUT
AC1
SEG
I3.3 EN ENO
VB48
IN
OUT
AC1
VB48
05
AC1
SEG
6D
( )
9-46
9-134

SIMATIC
ASCII 16 (ATH) 16 ASCII (HTA)
L
A
D
F
B
D
S
TL
✓
221
EN
IN
LEN
EN
IN
LEN
ATH
ENO
OUT
HTA
ENO
ATH IN, OUT, LEN
HTA IN, OUT, LEN
✓ ✓
222 224
OUT
ATH IN LEN ASCII
OUT 16 ASCII
255
HTA IN LEN 16
OUT ASCII
16 255
41 46
ASCII 16 30 39
ASCII 16 ENO = 0
SM1.7 ( ASCII ) SM4.3 ( ) 0006
( ) 0091 ( )
16 ASCII ENO = 0
SM4.3 ( ) 0006 ( ) 0091 (
)
ASCII )
SM1.7 (
IN, OUT VB, IB, QB, MB, SMB, LB, *VD, *AC, SB, *LD BYTE
LEN VB, IB, QB, MB, SMB, LB, AC, , *VD, *AC, SB, *LD BYTE
ASCII 16
I3.2
VB30
LAD
ATH
EN ENO
IN OUT
VB40
STL
LD I3.2
ATH VB30, VB40, 3
3
LEN
FBD
I3.2
ATH
EN ENO
VB30 33 45 41
VB30
IN
OUT
VB40
ATH
VB40 3E AX
3
LEN
X
9-47 ASCII 16
9-135

SIMATIC
ASCII
L
A
D
F
B
D
S
T
L
ITA
EN ENO
IN OUT
FMT
ITA IN, OUT, FMT
ASCII
(IN)
ASCII (FMT)
OUT
8 ASCII 8
ENO = 0 SM4.3 ( )
0006 ( ) ( )
✓
221
✓ ✓
222 224
IN VW, IW, QW, MW, SW, SMW, LW, AIW, T, C, AC, , *VD,
*AC, *LD
FMT VB, IB, QB, MB, SMB, LB, AC, , *VD, *AC, SB, *LD BYTE
OUT VB, IB, QB, MB, SMB, LB, *VD, *AC, SB, *LD BYTE
INT
9-136

SIMATIC
ITA ( ASCII ) (FMT) 9-48
8 nnn
nnn 0 5 0
5 nnn ASCII c
(c=1) (c=0) 4
0
1.
2.
3. 0 ( 0)
4.
9–48 (c = 0)
(nnn = 011)
FMT
MSB
LSB
7 6 5 4 3 2 1 0
0 0 0 0 c n n n
c = (1) (0)
nnn =
:
in=12
in=-123
in=1234
in = -12345
Out
Out Out Out Out Out Out Out
+1 +2 +3 +4 +5 +6 +7
0 . 0 1 2
- 0 . 1 2 3
1 . 2 3 4
- 1 2 . 3 4 5
9-48 ITA FMT
9-137

SIMATIC
ASCII
L
A
D
F
B
D
S
T
L
DTA
EN ENO
IN OUT
FMT
DTA IN, OUT, FMT
ASCII
ASCII
12
(FMT)
(IN)
OUT
ENO = 0 SM4.3 ( )
0006 ( ) ( )
✓
221
✓ ✓
222 224
IN VD, ID, QD, MD, SD, SMD, LD, HC, , AC, *VD, *AC, *LD DINT
FMT VB, IB, QB, MB, SMB, LB, AC, , *VD, *AC, SB, *LD BYTE
OUT VB, IB, QB, MB, SMB, LB, *VD, *AC, SB, *LD BYTE
DTA ( ASCII ) (FMT) 9-49
12 nnn
nnn 0 5 0
5 nnn ASCII
c (c=1) (c=0) 4
0
1.
2.
3. 0 ( 0)
4.
9-138

SIMATIC
9–49 (c = 0)
(nnn =100)
FMT
Example:
MSB
LSB
7 6 5 4 3 2 1 0
0 0 0 0 c n n n
c = comma (1) or decimal point (0)
nnn = digits to right of decimal point
in=-12
in=1234567
Out Out Out Out Out Out Out Out Out Out Out Out
+1 +2 +3 +4 +5 +6 +7 +8 +9 +10 +11
1
-
2
0
3
.
.
0
4
0
5
1
6
2
7
9-49 DTA FMT
.
ASCII
L
A
D
F
B
D
EN
IN
FMT
RTA
ENO
OUT
ASCII
ASCII
3 15
(FMT)
(IN)
OUT
ENO = 0 SM4.3 ( )
0006 ( ) ( )
S
T
L
RTA IN, OUT, FMT
✓
221
✓ ✓
222 224
IN VD, ID, QD, MD, SD, SMD, LD, AC, *VD, *AC, *LD REAL
FMT VB, IB, QB, MB, SMB, LB, AC, , *VD, *AC, SB, *LD BYTE
OUT VB, IB, QB, MB, SMB, LB, *VD, *AC, SB, *LD BYTE
9-139

SIMATIC
RTA ( ASCII ) (FMT) 9-50
ssss 0 1 2
nnn nnn 0
5 0 5 nnn
ASCII c (c=1) (c=0)
4 0
1.
2.
3. 0 ( 0)
4.
5. 3
6.
9–50 (c = 0)
(nnn =001) 6 (ssss=0110)
MSB
LSB
7 6 5 4 3 2 1 0
s s s s c n n n
ssss =
c = (1) (0)
nnn =
in = 1234.5
in = -0.0004
in = -3.67526
in = 1.95
Out Out Out Out Out Out
+1 +2 +3 +4 +5
1 2 3 4 . 5
0 . 0
- 3 . 7
2 . 0
9-50 RTA FMT
S7-200 CPU 7 7
9-140

SIMATIC
9.15 SIMATIC
(END)
L
A
D
END
(END)
F
B
D
END
S
TL
END
✓
221
✓ ✓
222 224
Micro/WIN 32
(STOP)
L
A
D
STOP
(STOP)
RUN STOP
CPU
F
B
D
STOP
STOP
STOP
CPU
RUN
S
T
L
STOP
✓
221
✓ ✓
222 224
9-141

SIMATIC
(WDR)
L
A
D
WDR
CPU
(Watchdog Reset)
(WDR)
F
B
D
WDR
S
T
L
WDR
✓
221
✓ ✓
222 224
WDR
WDR
• ( )
• I/O ( I/O )
•
• SM (SM0 SM5 SM29 )
•
• 25 10 ms 100 ms
• STOP
300ms
300ms WDR
STOP
S7-200 CPU STOP 1.4 CPU
9-142

SIMATIC
Stop, End, and WDR Example
LAD
STL
Network 1
SM5.0
.
.
.
Network 15
M5.6
.
.
.
Network 78
I0.0
.
.
.
STOP
WDR
END
I/O
STOP
M5.6 on
WDR
I0.0 on
CPU
Network 1
LD SM5.0
STOP
.
.
.
Network 15
LD M5.6
WDR
.
.
.
Network 78
LD I0.0
END
FBD
Network 1
SM5.0
STOP
I/O
STOP
CPU
Network 15
M5.6
WDR
M5.6 on
WDR
Network 78
I0.0
END
I0.0 on
9-51 STOP END WDR LAD STL
9-143

SIMATIC
L
A
D
n
JMP
1
(JMP)
(n)
n
LBL
(LBL)
n: 0 255
(n)
F
B
D
n
JMP
WORD
n
LBL
S
TL
JMP n
LBL n
✓
221
✓ ✓
222 224
LAD
STL
Network 14
SM0.2
/
.
.
.
Network 33
4
LBL
4
JMP
LBL4
LBL
JMP
Network
LDN SM0.2
JMP 4
.
.
.
Network
LBL 4
FBD
Network 14
.
.
.
.
Network 33
SM0.2
4
JMP
4
LBL
LBL4
LBL
JMP
9-52 JMP LBL LAD STL FBD
9-144

SIMATIC
L
A
D
SBR
(CALL)
(n)
Edit > Insert > Subroutine
RET
(CRET)
( )
n:
F
B
D
L
A
D
EN SBRn
BYTE
S
TL
SBR n
CRET
RET
9–55
ENO = 0 SM4.3 ( )
0008 ( )
✓
221
✓ ✓
222 224
Micro/WIN32
8 ( )
1
9-145

SIMATIC
53) ( 8 )
16
(IN_OUT)
(OUT)
• IN ( VB10)
( *AC1)
( 16#1234) (VB100)
(IN)
( 9-
• IN-OUT:
( 16#1234) ( &VB100) /
• OUT: ( 16#1234)
( &VB100)
• TEMP:
(IN, IN-OUT

SIMATIC
• STEP 7–Micro/WIN
32
9-54
(EN) IN1
• - 9-54 IN2
• - 1 2 4
• - 2 4
• - 4 IEEE
LAD
STL
I0.0
I0.1
VB10
I1.0
&VB100
*AC1
EN
SBR1
0
IN1
IN2
IN3
IN4
IN/OUT
OUT1
VD200
LD I0.0
CALL 10, I0.1, VB10,
I1.0, &VB100,
*AC1, VD200
9-54 LAD STL
9-54 ( IN4 &VB100) ( )
DW#12345
12345
( 9–53)
9-147

SIMATIC
• L.0
• 1 8 Lx.0 Lx.7
• (LBx LWx
LDx)
/
,
CALL
CALL 1 2 ...
EN0=0
SM4.3 ( ) 0008 ( )
9-148

SIMATIC
LAD
STL
MAIN
Network 1
SM0.1
.
.
SUBROUTINE .
10
SBR10
EN
SBR10
Network 1
LD SM0.1
CALL 10
.
.
.
.
Network 6
M14.3
.
.
.
RET
10
10 (RET)
STEP 7 Micro/Win 32
.
.
.
Network 6
LD M14.3
CRET
.
.
.
FBD
MAIN
SM0.1
SBR10
EN
SUBROUTINE 10
M14.3
RET
9-55 LAD STL FBD
9-149

SIMATIC
(For, Next)
L
A
D
EN
INDX
INIT
FINAL
FOR
ENO
NEXT
FOR NEXT FOR
NEXT FOR FOR
NEXT
FOR
(INDX) (INIT) (FINAL)
NEXT 1
(INIT) 1 (FINAL) 10
(INDX) 1 10 FOR
NEXT 10
1
F
B
D
EN
INDX
FOR
ENO
For: ENO = 0 SM4.3 (
) 0006 ( )
INIT
FINAL
NEXT
S
TL
FOR INDX,
INIT
FINAL
NEXT
✓
221
✓ ✓
222 224
INDX VW, IW, QW, MW, SW, SMW, LW, T, C, AC, *VD, *AC, *LD INT
INIT VW, IW, QW, MW, SW, SMW, T, C, AC, LW, AIW, , *VD,
*AC, *LD
FINAL VW, IW, QW, MW, SW, SMW, LW, T, C, AC, AIW, , *VD,
*AC, *LD
INT
INT
9-150

SIMATIC
FOR/NEXT
• FOR/NEXT
FOR/NEXT
• ( )
FOR/NEXT
FOR NEXT FOR
NEXT FOR NEXT ( FOR NEXT
FOR NEXT ) 8
9-151

SIMATIC
For/Next
LAD
STL
Network 1
I2.0 FOR
EN ENO
VW100 INDX
1
100
INIT
FINAL
Network 10
I2.1 FOR
EN
VW225
1
2
Network 15
INDX
INIT
FINAL
ENO
NEXT
2
1
I2.0 1
100
I2.1 2
2
Network
LD I2.0
FOR VW100, 1, 100
.
.
.
Network
LD I2.1
FOR VW225, 1, 2
.
.
.
Network
NEXT
.
.
Network
NEXT
Network 20
NEXT
FBD
Network 1
I2.0
VW100
1
100
FOR
EN ENO
INDX
INIT
FINAL
Network 10
I2.1
VW225
1
2
Network 15
FOR
EN ENO
INDX
INIT
FINAL
NEXT
Network 20
NEXT
9-56 FOR/NEXT LAD STL
9-152

SIMATIC
L
A
D
S bit
SCR
S bit
SCRT
SCRE
LSCR
(SCR)
n=1 SCR SCR
SCRE
SCRT SCR n=1
SCR (S )
SCR SCR (S
) SCR
SCRE
SCR
F
B
D
S bit
SCR
S bit
SCRT
SCRE
S
TL
LSCR S bit
SCRT S bit
SCRE
✓
221
✓ ✓
222 224
n S BOOL
SCR
SCR
SCR
LSCR S SCR SCR
SCR
S
LAD SCR 9-57
LSCR
S
9-153

SIMATIC
Sx.y
LSCR
SCR
S
S
ivs
iv0
iv1
iv2
iv3
iv4
iv5
iv6
iv7
iv8
S
S
Sx.y
Sx.y
iv1
iv2
iv3
iv4
iv5
iv6
iv7
iv8
9-57 LSCR
SCR
• LSCR SCRE SCR
SCR SCRE LSCR SCR
• SCRT SCR SCR
SCR
SCR
SCR
• S S0.1
• SCR JMP LBL
SCR
• SCR FOR NEXT END
9-154

SIMATIC
SCR
9–58 SCR
• SM0.1 S0.1
1 (SCR ) .
• 2 T37 2 2 SCR (S0.2)
1 SCR (S0.1)
LAD
STL
Network 1
SM0.1
Network 2
Network 3
SM0.0
Network 4
T37
Network 5
S0.1
SCR
2
0
S0.1
S
1
Q0.4
S
1
Q0.5
R
2
T37
TON
IN
PT
S0.2
SCRT
SCRE
1
1
1
2
2 2
1 SCR
1
Network 1
LD
S
SM0.1
S0.1, 1
Network 2
LSCR S0.1
Network 3
LD SM0.0
S Q0.4, 1
R Q0.5, 2
TON T37, 20
Network 4
LD T37
SCRT S0.2
Network 5
SCRE
( )
9-58 (SCR)
9-155

SIMATIC
LAD
STL
Network 6
S0.2
SCR
2
Network 6
LSCR S0.2
Network 7
SM0.0
Q0.2
S
1
T38
IN TON
3
25
Network 7
LD SM0.0
S Q0.2, 1
TON T38, 250
250
PT
Network 8
T38
Network 9
.
.
.
S0.3
SCRT
SCRE
25 3
2 SCR
FBD
Network 8
LD T38
SCRT S0.3
Network 9
SCRE
.
.
.
Network 1 S0.1
SM0.1 EN S
1
1
N
Network 2 S0.1
SCR
1
Network 3
SM0.0
AND
EN
Q0.4
S
1
SM0.0
1
N
Q0.5
EN
R
1
2
N
Network 4
S0.2
2
0
IN
PT
T37
TON
T37 SCRT
2 2
2
9-58 (SCR) ( )
9-156

SIMATIC
FBD
Network 5
SCRE 1 SCR
Network 6
S0.2
SCR
T SCR
2
Network 7
SM0.0
AND
EN
Q0.2
S
3
SM0.0
1
N
T38
IN
TON
25
250
PT
Network 8
T38
Network 9
S0.3
SCRT
T
SCRE
25 3
2 SCR
9-58 (SCR) ( )
2
9-59
L
M N
9-59
9-157

SIMATIC
9-60
LAD
SCRT
SCR
STL
Network
S3.4
SCR
L
Network
LSCR S3.4
Network
. . .
Network
. .
.
Network
M2.3
I2.1
S3.5
SCRT
S6.5
SCRT
N
M
L
Network
LD M2.3
A I2.1
SCRT S3.5
SCRT S6.5
Network
SCRE
Network
SCRE
L
SCR
FBD
Network
S3.4
SCR
Network
M2.3
I2.1
Network
AND
SCRE
S3.5
SCRT
S6.5
SCRT
9-60
9-158

SIMATIC
9-61
L
M
N
9-61
9-159

SIMATIC
SCR L L M M
N 9-62
L M SCR
LAD
STL
Network
S3.4
SCR
L
Network
LSCR S3.4
Network
. . .
Network
. .
.
Network
V100.5 S3.5
Network
LD V100.5
SCRT
L'
SCRT S3.5
Network
Network
SCRE
SCRE L SCR
Network
S6.4
SCR
M
Network
LSCR S6.4
Network
. . .
Network
C50
Network
S6.5
SCRT
SCRE
M
M'
SCR
Network
. .
.
Network
LD C50
SCRT S6.5
Network
SCRE
Network
S3.5
S6.5
S5.0
S
1
S3.5
R
1
S6.5
R
1
N
L'
M'
Network
LD S3.5
A S6.5
S S5.0, 1
R S3.5, 1
R S6.5, 1
9-62
9-160

SIMATIC
9-161
S3.4
FBD
Network
L
N
S3.5
Network
S6.5
L'
Network
L'
L
SCR
S6.4
M
Network
M'
M
SCR
M'
SCR
AND
S5.0
S3.5
SCRT
V100.5
SCRE
Network
Network
SCR
S6.5
SCRT
C50
SCRE
Network
S
1
EN
N
R
EN
N
1
S3.5
R
EN
N
1
S6.5
9-62 ( )

SIMATIC
9-63
L
M N
9-63
SCR 9–64
LAD
STL
Network
S3.4
SCR
L
Network
LSCR S3.4
Network
. . .
Network
. .
Network
M2.3
Network
I3.
3
S3.5
SCRT
S6.5
SCRT
M
N
Network
LD M2.3
SCRT S3.5
Network
LD I3.3
SCRT S6.5
Network
SCRE
L
SCR
Netwo
rk SCR
E
9-64
9-162

SIMATIC
FBD
Network
S3.4
SCR
L
Network
M2.3
S3.5
SCRT
M
Network
I3.3
Network
S6.5
SCRT
N
SCRE
L
SCR
9-64 ( )
9-163

SIMATIC
ENO
S
T
L
3
221
AENO
3 3
222 224
ENO LAD FBD
ENO
ENO
ENO
STL
EN
1
STL ENO ENO
LAD FBD STL
ENO
And ENO (AENO)
AENO
ENO
AENO STL
AENO
ENO
9-164

SIMATIC
9.16 SIMATIC
L
A
D
F
B
D
ATCH
EN ENO
INT
EVNT
DTCH
EN ENO
(ATCH)
(INT)
(DTCH)
ENO = 0
( ) 0006 ( )
(EVNT)
(EVNT)
SM4.3
EVNT
S
TL
ATCH INT, EVENT
DTCH EVENT
✓
221
✓ ✓
222 224
INT (CPU 222: 0-12, 19-23, 27-33; CPU 224: 0-23, 27-33) BYTE
EVNT (CPU 222: 0-12, 19-23, 27-33; CPU 224: 0-23, 27-33) BYTE
(ATCH) ( )
( )
(ENI)
(DISI)
9–20
(DTCH)
(DTCH)
9-165

SIMATIC
9-20
CPU 221 CPU 222 CPU 224
0 I0.0 Y Y Y
1 I0.0 Y Y Y
2 I0.1 Y Y Y
3 I0.1 Y Y Y
4 I0.2 Y Y Y
5 I0.2 Y Y Y
6 I0.3 Y Y Y
7 I0.3 Y Y Y
8 0 Y Y Y
9 0 Y Y Y
10 0 SMB34 Y Y Y
11 1 SMB35 Y Y Y
12 HSC0 CV=PV ( = ) Y Y Y
13 HSC1 CV=PV ( = ) Y
14 HSC1 Y
15 HSC1 Y
16 HSC2 CV=PV ( = ) Y
17 HSC2 Y
18 HSC2 Y
19 PLS0 Y Y Y
20 PLS1 Y Y Y
21 T32 CT=PT Y Y Y
22 T96 CT=PT Y Y Y
23 0 Y Y Y
24 1
25 1
26 1
27 HSC0 Y Y Y
28 HSC0 Y Y Y
29 HSC4 CV=PV ( = ) Y Y Y
30 HSC4 Y Y Y
31 HSC4 Y Y Y
32 HSC3 CV=PV ( = ) Y Y Y
33 HSC5 CV=PV ( = ) Y Y Y
9-166

SIMATIC
L
A
D
RETI
Edit > Insert > Interrupt
F
B
D
RETI
STEP 7-Micro/WIN 32
S
T
L
CRETI
✓
221
✓ ✓
222 224
(CRETI) ( )
(RETI)
DISI ENI HDEF LSCR END
(SM)
9-167

SIMATIC
• STL
STL
• LAD
MOVD, MOVR)
Move
STL
Move
STL
(MOVB, MOVW,
• STL LAD
/ (DISI ENI)
9-168

SIMATIC
L
A
D
ENI
DISI
(ENI)
(DISI)
F
B
D
ENI
DISI
RUN
(DISI)
(ENI)
RUN
S
T
L
ENI
DISI
✓
221
✓ ✓
222 224
PLC LAD STL
/
I/O
I/O
(PTO)
S7-200 CPU I0.0 I0.3 9-21
9-169

SIMATIC
9-21 /
I/O
S7–200 CPU
I/O I0.0 I0.3
PLC
I/O
9-170

SIMATIC
T32/T96 CPU
1ms 5
ms 255ms 0 SMB34 1
SMB35
PID
RUN
( ) 9-66
T32/T96
1ms (TON) (TOF) T32 T96
T32 T96
CPU 1ms
T32/T96
9-171

SIMATIC
• ( )
• I/O
• ( )
CPU
9-22
9-22
CPU 221 CPU 222 CPU 224
4 4 4
I/O 16 16 16
8 8 8
9-23
9-23
I/O
(0 = , 1 = ) SM
SM4.0
SM4.1
SM4.2
9-172

SIMATIC
9–24
9-24
8 0: 0
9 0: 0
23 0: 0
( )
24 1: 1
25 1: 1
26 1:
1
19 PTO 0 0
20 PTO 1 1
0 , I0.0 2
2 , I0.1 3
4 , I0.2 4
6 , I0.3 5
1 , I0.0 6
3 , I0.1 7
5 , I0.2 8
7 , I0.3 9
12 HSC0 CV=PV ( = ) 10
27 HSC0 11
I/O ( )
28 HSC0 12
13 HSC1 CV=PV ( = ) 13
14 HSC1 14
15 HSC1 15
16 HSC2 CV=PV 16
17 HSC2 17
18 HSC2 18
32 HSC3 CV=PV ( = ) 19
29 HSC4 CV=PV ( = ) 20
30 HSC4 21
31 HSC4 22
33 HSC5 CV=PV ( = )
23
10 0 0
11 1 1
( )
21 T32 CT=PT 2
22 T96 CT=PT
3
9-173

SIMATIC
9–65
LAD
STL
MAIN OB1
Network 1
SM0.1
Network 2
SM5.0
4
0
ATCH
EN ENO
INT
EVNT
ENI
DTCH
EN ENO
4 I0.0
0
I/O I0.0
Network 1
LD SM0.1
ATCH 4, 0
ENI
Network 2
LD SM5.0
DTCH 0
Network 3
LD M5.0
DISI
.
.
0
EVNT
Network 3
M5.0
DISI
M5.0 on
.
.
INTERRUPT 4
.
Network 1
SM5.0
RETI
I/0
I/O
Network 1
LD SM5.0
CRETI
FBD
MAIN OB1
Network 1
SM0.1
ATCH
EN ENO
ENI
4
0
INT
EVNT
Network 2
SM5.0
DTCH
EN ENO
0
Network 3
M5.0
EVNT
DISI
INTERRUPT 4
Network 1
SM5.0
RETI
9-65
9-174

SIMATIC
9–66
MAIN PROGRAM
LAD
STL
Network 1
SM0.1
SBR0
0
Network 1
LD SM0.1
CALL 0
SUBROUTINE 0
Network 1
SM0.0
100
MOV_B
EN ENO
IN OUT
SMB34
on
100ms
0
0
Network 1
LD SM0.0
MOVB 100, SMB34
0
ATCH
EN ENO
INT
0
0
ATCH 0, 10
ENI
10
EVNT
ENI
INTERRUPT 0
Network 1
SM0.0
AIW4
MOV_W
EN ENO
IN OUT
VW100
0
AIW4.
Network 1
LD SM0.0
MOVW AIW4, VW100
MAIN PROGRAM
Network 1
SM0.1
SBR0
EN
FBD
SUBROUTINE 0
Network 1
SM0.0
100
MOV_B
EN ENO
IN OUT
SMB34
0
10
ATCH
EN ENO
INT
EVNT
ENI
INTERRUPT 0
Network 1
SM0.0
MOV_W
EN ENO
AIW4
IN
OUT
VW100
9-66
9-175

SIMATIC
L
A
D
F
B
D
NETR
EN ENO
TBL
PORT
NETW
EN ENO
TBL
PORT
(PORT)
(PORT)
(NETR)
(NETW)
(TBL)
(TBL)
NETR 16
NETW 16
8 NETR
NETW
S7–200 PLC
4 NETR 4 NETW
2 NETR 6 NETW 9-67
NETR NETW TBL
S
TL
✓
221
NETR TABLE,PORT
NETW TABLE,PORT
✓ ✓
222 224
NETR: ENO = 0
SM4.3 ( ) 0006 ( )
NETW: ENO = 0
SM4.3 ( ) 0006 ( )
TBL I, Q, M, S, V, VB, MB, *VD, *AC, *LD BYTE
PORT
BYTE
9-176

SIMATIC
0
1
2
3
4
5
6
7
8
22
7 0
D A E 0
(I, Q, M, V)
0
1
15
D ( ): 0 = 1 =
A ( ): 0 = 1 =
E ( ): 0 = 1 =
NETR
NETW
PLC
NETR
NETW
1 16
0
1
2
e 3
4
5
6
7
8
9
A-F
9-67 NETR NETW TABLE
9-177

SIMATIC
9–68 NETR NETW
( )
8
4 CPU 221 CPU 222 TD 200
9–68
TD 200
1
#1
CPU221
2
#2
CPU221
3
#3
CPU221
4
#4
CPU221
5
CPU 222
6
VB100
VW101
VB100
VW101
VB100
VW101
VB100
VW101
VB200
VB300
VB200 2 VB300 2
VB100
VB101
f e e e 0 g b t
Control
Status
MSB
VB210 3
VB221 4
VB310 3
VB320 4
VB102
LSB
VB230 5
VB330 5
f
f=1,
g g=1, 30
b b=1, 30
t
t=1,
eee
9-68 NETR NETW
9-178

SIMATIC
9-69 2 ( VB200 VB300 )
CPU 224
NETR
100 NETW
( 1)
9-70
#1 #1
VB200
7 0
D A E 0
VB300
7 0
D A E 0
VB201
VB301
VB202
&VB100
VB302
&VB100
VB203
VB303
VB204
VB304
VB205
VB305
VB206
= 3
VB306
= 2
VB207
VB208 ( )
VB209
( )
VB307
VB308 0
0
9-69 NETR NETW TABLE
9-179

SIMATIC
LAD
STL
Network 1
SM0.1
Network 2
V200.7 VW20
8==
100 I
2
0
68
2
&VB101
2
MOV_B
EN ENO
IN OUT
FILL_N
EN ENO
IN OUT
N
MOV_B
EN ENO
IN OUT
MOV_D
EN ENO
IN OUT
MOV_B
EN ENO
IN OUT
SMB30
VW200
VB301
VD302
VB306
PPI
NETR
100
#1
Network 1
LD SM0.1
MOVB 2, SMB30
FILL 0, VW200, 68
Network 2
LD
AW=
V200.7
VW208, 100
MOVB 2, VB301
MOVD &VB101, VD302
MOVB 2, VB306
MOVW 0, VW307
NETW VB300, 0
Network 3
LD V200.7
MOVB VB207, VB400
Network 4
LDN SM0.1
AN V200.6
AN V200.5
MOVB 2, VB201
MOVD
MOVB
&VB100, VD202
3, VB206
NETR VB200, 0
Network 3
V200.7
0
VB300
VB207
Network 4
SM0.1 V200.6V200.5
/ / /
0
2
MOV_W
EN ENO
IN OUT
NETW
EN ENO
TBL
PORT
MOV_B
E ENO
I
N OUT
N
MOV_B
EN ENO
IN OUT
VW307
VB400
VB201
NETR
#1
#1
#1
&VB100
3
MOV_D
EN ENO
IN OUT
MOV_B
EN ENO
IN OUT
VD202
VB206
NETR
EN ENO
#1
VB200
0
TBL
PORT
9-70 NETR NETW LAD STL
9-180

SIMATIC
9-181
IN
2
MOV_B
OUT
VB301
EN
IN
2
MOV_B
OUT VB306
EN
IN
0
MOV_W
OUT
VW307
EN
TBL
NETW
EN
PORT
0
FILL_N
IN
N
0
68
EN
IN
2
MOV_B
OUT
SMB30
EN
VW200
OUT
IN
MOV_D
OUT
VD302
EN
IN
MOV_B
OUT
VB400
EN
ENO
ENO
ENO
ENO
ENO ENO ENO
ENO
Network 1
Network 2
Network 4
Network 3
FBD
SM0.1
==I
100
V200.7
VW208
&VB101
VB300
V200.7
VB207
AND
SM0.1
IN
2
MOV_B
OUT
EN
ENO
VB201
IN
MOV_D
OUT
VD202
EN
ENO
&VB101
V200.6
V200.5
IN
3
MOV_B
OUT
EN
ENO
VB206
TBL
NETR
EN
PORT
0
ENO
VB200
AND
SM0.0
9-71 NETR NETW FBD

SIMATIC
L
A
D
F
B
D
XMT
EN ENO
TBL
PORT
RCV
EN ENO
TBL
(XMT)
PORT
XMT
(RCV)
(PORT)
(TBL)
(TBL)
S
T
L
PORT
XMT TABLE, PORT
RCV TABLE, PORT
Transmit: ENO = 0
SM4.3 ( ) 0006 ( )
0009 ( 0 XMT/RCV)
000B ( 1 XMT/RCV)
✓
221
✓ ✓
222 224
Receive: ENO = 0 SM86.6 SM186.6 (RCV
) SM4.3 ( ) 0006 ( ) 0009 ( 0 XMT/RCV)
000B ( 1 XMT/RCV)
TABLE
VB, IB, QB, MB, SB, SMB,
*VD, *AC, *LD
BYTE
PORT (0) BYTE
9-182

SIMATIC
CPU
1)
(RCV)
SMB30 ( 0) SMB31 ( CPU
CPU STOP (
)
CPU
(XMT)
CPU RUN SMB30 (
0) SMB130 ( 1) 1
(XMT)
CPU
SM0.7
SM0.7 0 TREM SM0.7
1 RUN RUN
CPU
9-183

SIMATIC
SMB30 SMB130 0 1
9-25
9-25 SMB30 SMB130
SMB30
0 1
SMB130
MSB
LSB
7 0
p p d b b b m m
Freeport mode control
byte
SM30.6
SM30.7
SM130.6
SM130.7
pp
SM30.5 SM130.5 d
SM30.2 SM130.2 bbb
SM30.4 SM130.4
SM30.0 SM130.0 mm
SM30.1 SM130.1
00 =
01 =
10 =
11 =
0 = 8
1 = 7
000 = 38,400
001 = 19,200
010 = 9,600
011 = 4,800
100 = 2,400
101 = 1,200
110 = 600
111 = 300
00 = – – (PPI/ )
01 =
10 = PPI/
11 = ( PPI/ )
XMT
XMT
XMT
255
( 0 9
1 26) SM4.5 SM4.6
( )
9-184

SIMATIC
0 XMT BREAK
16 BREAK
BREAK BREAK XMT
SM4.5 SM4.6 XMT
XMT 9–72
M E S S A G E
M E ...
( )
9-72 XMT
RCV
255
RCV
RCV
23 1 24)
SMB86 SMB186
RCV SMB86 SMB186 0
0
( 0
RCV
9-26 (SM86 SM94 0 SM186 SM194 1 )
RCV 9–73
(x z) (y t )
M E S S A G E
xim
9-73 RCV
9-185

SIMATIC
9-26 SMB86 SMB94 SMB186 SMB194
SMB86
0 1
SMB186
MSB
LSB
7 0
n r e 0 0 t c p
Receive message status
byte
n:1=Receive message terminated by user disable command
r: 1=Receive message terminated:error in input parameters
Or
Missing start or end condition
e:1=End character received
t: 1=Receive message terminated:timer expired
c:1=Receive message terminated:maximum character count
Achieved
p:1=Receive message terminated because of aparity error
9-186

SIMATIC
9-26 SMB86 SMB94 SMB186 SMB194
0 1
SMB86
SMB186
MSB
LSB
7 0
n x y z m t 0 0
n: 0=Receive Message function is disabled
1=Receive Message function is enabled
Receive message status byte
The enable/disable receive message bit is checked each time the RCV
instruction is executed.
x: 0=lgnore SMB88 or SMB189
1=Use the value of SMB88 or SMB188 to detect start of message.
y: 0=lgnore SMB89 or SMB189.
1=Use the value of SMB89 or SMB189 detect end of message.
z: 0=lgnore SMW90 or SMB190.
1=Use the value of SMW90 to detect an idle line condition.
m: 0=Timer is an inter-character timer.
1=Timer is a message timer.
t: 0=lgnore SMW92 or SMW192.
1=Terminate receive if the time period in SMW92 or SMW192 is exceeded.
The bits of the message interrupt control byte are used to define the criteria by
which the message is identified.Both start of message and end of message
criteria are defined.To determine the start of a message,either of two sets of
logically ANDed start of message criteria must be true and must occur in
sequence(idle line followed by start character,or break followed by start
character).To determine the end of a message ,the enabled end of the message
criteria is logically Ored. The equations for start and stop criteria are given
below:
Start of Message =if*sc+bk*sc
End of Message=ec+tmr+maximum character count reached
Programming the start of message criteria for:
1.Idle line detection:
2.Start character detection:
3.Break Detection:
4.Any response to a request:
il=1,sc=0,bk=0,SMW90>0
il=o,sc=1,bk=0,SMW90
is a don
t care
il=o,sc=1,bk=1,SMW90
is a don
t care
il=1,sc=0,bk=0,SMW90=0
(Message timer can be used to terminate receive of there is no response.)
5.Break and a start character:
6.Idle line and a start character:
il=o,sc=1,bk=1,SMW90
is a don
t care
il=1,sc=1,bk=0,SMW90>0
7.Idle line and a start character(Illegal): il=1,sc=1,bk=0,SMW90=0
Note:Receive will automatically be terminated by an overrun or a parity error(if
enabled).
SMB88
SMB89
SMB188
SMB189
9-187

SIMATIC
9-26 SMB86 SMB94 SMB186 SMB194
SMB90
SMB91
SMB92
SMB93
0 1
SMB190
SMB191 SM90 ( SM190)
SM91 ( SM191)
SMB192
SMB193
/
( SM193)
SMB94 SMB194 (1 255 )
SM92 ( SM192) SM93
• SMB2
• SMB3
SMB2 ( ) SM3.0
.
0 1 SMB2 SMB3 0 0
( 8) SMB2 0
SMB3 1 1
( 25) SMB2 1
SMB3
9-188

SIMATIC
MAIN (OB1)
Network 1
SM0.1
LAD
MOV_B
EN ENO
16#9 IN OUT
MOV_B
EN ENO
16#B0 IN OUT
SMB30
SMB87
-
- 9600
- 8
-
- RCV
-
-
STL
Network 1
LD SM0.1
MOVB 16#9, SMB30
MOVB 16#B0, SMB87
MOVB 16#0A, SMB89
MOVW +5, SMW90
MOVB 100, SMB94
ATCH 0, 23
ATCH 1, 9
ENI
RCV VB100, 0
MOV_B
EN ENO
16#A IN OUT
SMB89
0A
16
MOV_W
EN ENO
5ms
IN +5 OUT
SMW90
MOV_B
EN ENO
100
100 IN OUT
SMB94
0
23
ATCH
EN ENO
INT
EVNT
ATCH
EN ENO
1
9
VB100
0
INT
EVNT
ENI
RCV
EN ENO
TBL
PORT
0
VB100
9-74
9-189

SIMATIC
INTERRUPT 0
Network 1
SMB86
==
16#20 B
10
1
10
RETI
MOV_B
EN ENO
IN OUT
ATCH
EN ENO
INT
EVNT
SMB34
ms
10
Network 1
LDB= SMB86, 16#20
MOVB 10, SMB34
ATCH 2, 10
CRETI
NOT
RCV VB100, 0
NOT
VB100
RCV
EN ENO
TBL
0
PORT
INTERRUPT 1
Network 1
SM0.0
10
DTCH
EN ENO
EVNT
nterrupt.
Network 1
LD SM0.0
DTCH 10
XMT VB100, 0
VB100
XMT
EN ENO
TBL
0
0
PORT
INTERRUPT 2
Network 10
SM0.0
RCV
EN ENO
Network 10
LD SM0.0
RCV VB100, 0
VB100
0
TBL
PORT
9-74 ( )
9-190

SIMATIC
Network 1
MOV_B
SM0.1 EN ENO
16#9 IN OUT
SMB30
FBD
MOV_B MOV_B
EN ENO
EN ENO
16#B0 IN OUT
SMB87 16#A IN OUT SMB89
MOV_W
EN ENO
+5 IN OUT
SMW90
100
MOV_B
EN ENO
IN OUT
SMB94
0
ATCH
EN ENO
INT
23
EVNT
ATCH
EN ENO
ENI
2
9
INT
EVNT
RCV
EN ENO
VB100
0
TBL
PORT
INTERRUPT 0
Network 1
==B
SMB86
16#20
MOV_B
EN ENO
10 IN OUT SMB34 1
ATCH
EN ENO RETI
INT
RCV
EN ENO
10
EVNT
VB100
TBL
0
PORT
INTERRUPT 1
SM0.0
10
DTCH
EN ENO
EVNT
VB100
XMT
EN ENO
TBL
0
PORT
INTERRUPT 2
SM0.0
VB100
0
RCV
EN ENO
TBL
PORT
9-74 ( )
9-191

SIMATIC
9.17 SIMATIC
(ALD)
S
T
L
ALD
ALD
1
ALD
✓
221
✓ ✓
222 224
(OLD)
S
T
L
✓
221
OLD
✓ ✓
222 224
OLD
1
OLD
S
T
L
LPS
LPS
✓
221
✓ ✓
222 224
S
T
L
LRD
LRD
✓
221
✓ ✓
222 224
9-192

SIMATIC
S
T
L
LPP
LPP
✓
221
✓ ✓
222 224
S
T
L
LDS
n
n
✓
221
✓ ✓
222 224
n (1 8)
9–75 ALD OLD
ALD
OLD
iv0
S0
S0 = iv0 * iv1
iv0
S0
S0 = iv0 + iv1
iv1
iv2
iv1
iv2
iv2
iv3
iv4
iv3
iv4
iv5
iv2
iv3
iv4
iv3
iv4
iv5
iv5
iv6
iv5
iv6
iv6
iv7
iv6
iv7
iv7
iv8
iv8
x
iv7
iv8
iv8
x
x ( 0 1)
9-75
9-193

SIMATIC
9–76 LPS LRD LPP
LPS
LRD
LPP
iv0
iv0
iv0
iv1
iv0
iv1
iv1
iv0
iv1
iv1
iv1
iv2
iv2
iv1
iv2
iv2
iv2
iv3
iv3
iv2
iv3
iv3
iv3
iv4
iv4
iv3
iv4
iv4
iv4
iv5
iv5
iv4
iv5
iv5
iv5
iv6
iv6
iv5
iv6
iv6
iv6
iv7
iv7
iv6
iv7
iv7
iv7
iv8
iv8
iv7
iv8
iv8
iv8
x
x ( 0 1) LPS iv8
9-76 LPS LRD LPP
9–77
LDS 3
iv0
iv1
iv2
iv3
iv4
iv5
iv6
iv7
iv8
iv3
iv0
iv1
iv2
iv3
iv4
iv5
iv6
iv7
9–77
9-194

SIMATIC
LAD
Network 1
I0.0 I0.1
I2.0 I2.1
Q5.0
NETWORK 1
LD I0.0
LD I0.1
LD I2.0
A I2.1
OLD
ALD
= Q5.0
STL
Network 2
I0.0 I0.5
I0.6
I2.1
I1.3
I1.0
Q7.0
Q6.0
Q3.0
NETWORK 2
LD I0.0
LPS
LD I0.5
O I0.6
ALD
= Q7.0
LRD
LD I2.1
O I1.3
ALD
= Q6.0
LPP
A I1.0
= Q3.0
9-78 LAD STL
FBD
Network 1
I2.0
AND OR AND
I2.1 I0.1 I0.0 Q5.0
Network 2
I0.0
AND
AND
Q7.0
SM0.0
I0.5
I0.6
OR
AND
Q6.0
I2.1
OR
I1.3
I1.0
AND
Q3.0
9-79 FBD
9-195

IEC 1131-3
10
IEC 1131-3 SIMATIC IEC
IEC
10.1 IEC 10–2
10.2 IEC 10–7
10.3 IEC 10–11
10.4 IEC 10–15
10.5 IEC 10–19
10.6 IEC 10–24
10.7 IEC 10–26
10.8 IEC 10–29
10.9 IEC 10–32
10-1

IEC 1131-3
10.1 IEC
10-1 IEC
10-1 IEC
9–2
9–3
9–4
9–4
9–6
9–6
(N ) 9–7
( IEC 1131-3)
L
A
D
bit
bit
/
(NO) 1
(NC) 0
I
Q
F
B
D
AND
(LAD)
OR
(FBD)
AND/OR
✓
221
✓ ✓
222 224
I, Q, M, SM, T, C, V, S, L BOOL
(FBD) I, Q, M, SM, T, C, V, S, L, BOOL
(FBD) I, Q, M, SM, T, C, V, S, L, BOOL
10-2

IEC 1131-3
L
A
D
P
N
F
B
D
P
IN OUT
N
IN OUT
LAD
FBD POS NEG
✓
221
✓ ✓
222 224
IN (FBD) I, Q, M, SM, T, C, V, S, L, BOOL
OUT (FBD) I, Q, M, SM, T, C, V, S, L, BOOL
LAD
FBD
Network 1
I0.0 I0.1
Q0.0
Network 1
I0.0
AND
Q0.0
I0.1
Network 2
I0.0
NOT
Q0.1
Network 2
I0.0
Q0.1
=
Network 3
I0.1
N
Q0.2
Network 3
I0.1
IN
N
OUT
Q0.2
I0.0
I0.1
Q0.0
Q0.1
Q0.2
10-1 LAD FBD
10-3

IEC 1131-3
L
A
D
F
B
D
bit
=
bit
LAD
FBD =
✓
221
✓ ✓
222 224
(LAD/FBD) I, Q, M, SM, T, C, V, S, L BOOL
(LAD)
BOOL
(FBD) I, Q, M, SM, T, C, V, S, L, BOOL
L
A
D
bit
S
OUT
bit
R
F
B
D
bit
S
bit
R
✓
221
✓
✓
222 224
(LAD, FBD) I, Q, M, SM, T, C, V, S, L BOOL
(FBD) I, Q, M, SM, T, C, V, S, L BOOL
10-4

IEC 1131-3
LAD
Network 1
I0.0
Q0.0
Q0.1
S
Q0.2
R
Q0.3
R
FBD
Network 1
I0.0
SM0.0
AND
Q0.0
=
Q0.1
S
Q0.2
R
Q0.3
R
I0.0
Q0.0
Q0.1
Q0.2
Q0.3
10-2 LAD FBD
10-5

IEC 1131-3
L
A
D
F
B
D
L
A
D
S1
R
xxx
SR
OUT
1
(S1) (R) 1 (OUT)
xxx
xxx
✓
221
✓ ✓
222 224
S1, R (LAD) BOOL
S1, R (FBD) I, Q, M, SM, T, C,V, S, BOOL
OUT (LAD)
BOOL
OUT (FBD) I, Q, M, SM,T, C, V, S, L, BOOL
xxx I, Q, M, V, S BOOL
L
A
D
F
B
D
S
R1
xxx
RS
OUT
0
(S) (R1) 1 (OUT)
xxx
xxx
✓
221
✓ ✓
222 224
/
S, R1 (LAD) BOOL
S, R1 (FBD) I, Q, M, SM, T, C, V, S, L, BOOL
OUT (LAD) Power Flow BOOL
OUT (FBD) I, Q, M, SM, T, C,V, S, L, BOOL
xxx I, Q, M, V, S BOOL
10-6

IEC 1131-3
10.2 IEC
IEC
L
A
D
EQ
EN OUT
IN1
IN2
IN1 IN2 OUT
F
B
D
EQ
✓
221
✓ ✓
222 224
(LAD
FBD)
IB, QB, MB, SB, SMB, VB, LB, IW, QW,
MW, SW, SMW, VW, LW, T, C, AIW, ID,
QD, MD, SD, SMD, VD, LD, HC, AC,
, *VD, *AC, *LD
OUT ( LAD) BOOL
OUT ( FBD) I, Q, M, SM, T, C, V, S, L, BOOL
BYTE, INT,
DINT REAL
10-7

IEC 1131-3
L
A
D
EN
IN1
IN2
NE
OUT
IN1 IN2 OUT
F
B
D
NE
✓
221
✓ ✓
222 224
(LAD
FBD)
IB, QB, MB, SB, SMB, VB, LB, IW, QW, MW, SW, SMW, BYTE, INT,
VW, LW, T, C, AIW, ID, QD, MD, SD, SMD, VD, LD, HC, DINT, REAL
AC, , *VD, *AC, *LD
OUT ( LAD) BOOL
OUT ( FBD) I, Q, M, SM, T, C, V, S, L, BOOL
L
A
D
EN
IN1
IN2
LT
OUT
IN1 IN2 OUT
F
B
D
LT
✓
221
✓ ✓
222 224
(LAD
/
FBD)
IB, QB, MB, SB, SMB, VB, LB, IW, QW, MW, SW, SMW, VW,
LW, T, C, AIW, ID, QD, MD, SD, SMD, VD, LD, HC, AC, ,
*VD, *AC, *LD
OUT ( LAD) BOOL
OUT ( FBD) I, Q, M, SM, V, S, L, BOOL
BYTE, INT,
DINT, REAL
10-8

IEC 1131-3
L
A
D
EN
IN1
IN2
LE
OUT
OUT
IN1
IN2
F
B
D
LE
✓
221
✓ ✓
222 224
(LAD
/
FBD)
IB, QB, MB, SB, SMB, VB, LB, IW, QW, MW, SW, SMW, VW,
LW, T, C, AIW, ID, QD, MD, SD, SMD, VD, LD, HC, AC, ,
*VD, *AC, *LD
OUT ( LAD) BOOL
OUT ( FBD) I, Q, M, SM, V, S, L, BOOL
BYTE, INT,
DINT, REAL
L
A
D
EN
IN1
IN2
GT
OUT
IN1 IN2 OUT
F
B
D
GT
✓
221
✓ ✓
222 224
/
(LAD
FBD)
IB, QB, MB, SB, SMB, VB, LB, IW, QW, MW, SW, SMW, VW,
LW, T, C, AIW, ID, QD, MD, SD, SMD, VD, LD, HC, AC, ,
*VD, *AC, *LD
OUT ( LAD) BOOL
OUT ( FBD) I, Q, M, SM, V, S, L, BOOL
BYTE, INT,
DINT, REAL
10-9

IEC 1131-3
L
A
D
EN
IN1
IN2
GE
OUT
OUT
IN1
IN2
.
F
B
D
GE
✓
221
✓ ✓
222 224
(LAD
FBD)
IB, QB, MB, SB, SMB, VB, LB, IW, QW, MW, SW, SMW, VW,
LW, T, C, AIW, ID, QD, MD, SD, SMD, VD, LD, HC, AC, ,
*VD, *AC, *LD
OUT ( LAD) BOOL
OUT ( FBD) I, Q, M, SM, V, S, L, BOOL
BYTE, INT,
DINT, REAL
10-10

IEC 1131-3
10.3 IEC
10–2 IEC
10-2 IEC
9–15
L
A
D
F
B
D
✓
221
IN
PT
xxx
✓ ✓
222 224
TON
Q
ET
(IN) 1
(ET)
(PT) (Q) 1
(IN) 0
(PT)
IN (LAD)
BOOL
IN (FBD) I, Q, M, SM, T, C, V, S, L, BOOL
PT (LAD FBD) VW, IW, QW, MW, SMW, LW, SW, AIW, AC, , *VD, *AC, *LD INT
Q (LAD FBD) I, Q, M, SM, V, S, L BOOL
ET (LAD FBD) VW, IW, QW, MW, SMW, LW, SW, AQW, AC, *VD, *AC, *LD INT
xxx 10–3 TON
10-11

IEC 1131-3
L
A
D
F
B
D
IN
PT
xxx
TOF
Q
ET
(PT)
(IN) 0
(Q)
(ET)
✓
221
✓ ✓
222 224
IN (LAD)
0 (IN)
1 (IN) 0 (PT)
1
10–3
BOOL
IN (FBD) I, Q, M, SM,T, C, V, S, L, BOOL
PT (LAD FBD) VW, IW, QW, MW, SMW, LW, SW, AIW, AC, , *VD, *AC, *LD INT
Q (LAD FBD) I, Q, M, SM, V, S, L BOOL
ET (LAD FBD) VW, IW, QW, MW, SMW, LW, SW, AQW, AC,*VD, *AC, *LD INT
xxx 10–3 TOF
L
A
D
F
B
D
IN
PT
xxx
TP
Q
ET
(IN) 1 (Q)
(PT) 0
(ET)
✓
221
✓ ✓
222 224
10–3
/
IN LAD)
BOOL
IN (FBD) I, Q, M, SM, T, C, V, S, L, BOOL
PT (LAD FBD) VW, IW, QW, MW, SMW, LW, SW, AIW, AC, , *VD, *AC, *LD INT
Q (LAD FBD) I, Q, M, SM, S, V, L BOOL
ET (LAD FBD) VW, IW, QW, MW, SW, LW, AQW, AC, *VD, *AC, *LD INT
Xxx 10–3 TP
10-12

IEC 1131-3
IEC 1131-3
TON TOF TP 10-3
10 ms 50 500 ms
10-3
(ms)
(s)
TON,
TP
TOF,
1 ms 32.767 s T32, T96
10 ms 327.67 s T33 ~ T36, T97 ~ T100
100 ms 3276.7 s T37 ~ T63, T101 ~ T255
T32
TOP T32
TOF TP TON TON
LAD
FBD
Input
3
I
N
P
T
T33
TON
Q
ET
Output
VW100
Input
3
I
NP
T
T33
TON
ET
Q
Output
VW100
Input
VW100
(current)
Output(Q)
PT = 3
PT = 3
10-3 LAD FBD
10-13

IEC 1131-3
LAD
FBD
Input
3
IN
PT
T33
TOF
Q
ET
Outpu
VW100 t
Input
3
I
N
P
T
T33
TOF
Q
ET
Output
VW100
Time Diagram
Input
VW100
(current)
PT = 3
PT = 3
Output(Q)
10-4 LAD FBD
LAD
FBD
Input
3
IN
PT
T33
TP
Q
ET
Output
VW100
Input
3
IN
PT
T33
TON
Q
ET
Output
VW100
Input
VW 100
(current)
Output
PT = 3
10-5 LAD FBD
10-14

IEC 1131-3
10.4 IEC
10–4 IEC
10-4 IEC
9–27
9–27
9–49
L
A
D
F
B
D
CU
R
PV
xxx
CTU
Q
CV
(R)
(PV)
(CU)
(Q)
(CV)
✓
221
✓ ✓
222 224
/ )
(
/
CU ( FBD) I, Q, M, SM, V, S, L, T, C, BOOL
R ( FBD) I, Q, M, SM, V, S, L, T, C, BOOL
PV (LAD FBD) VW, IW, QW, MW, SMW, LW, SW, AIW, AC, , *VD, *AC, *LD INT
Q (LAD FBD) I, Q, M, SM, V, S, L BOOL
CV (LAD FBD) VW, IW, QW, MW, SW, SMW, LW, AC, *VD, *AC, *LD INT
xxx C0 C255 CTU
10-15

IEC 1131-3
L
A
D
F
B
D
CD
LD
PV
xxx
CTD
Q
CV
(Q)
0
(PV)
(CD)
(LD)
(CV) 0
(CV)
✓
221
✓ ✓
222 224
/ )
(
10-5
CD (FBD) I, Q, M, SM, V, S, L, T, C, BOOL
LD (FBD) I, Q, M, SM, V, S, L, T, C, BOOL
PV (LAD FBD) VW, IW, QW, MW, SMW, LW, SW, AIW, AC, ,
*VD, *AC, *LD
INT
Q (LAD FBD) I, Q, M, SM, V, S, L BOOL
CV (LAD FBD) VW, IW, QW, MW, SW, LW, AC, *VD, *AC, *LD INT
xxx C0 C255 CTD
10-16

IEC 1131-3
/
L
A
D
F
B
D
CD
CU
R
LD
PV
xxx
CTUD
QU
QD
CV
/ (CU)
(CD)
(CV)
(QU)
(CV)
(LD)
(R) 0
0
✓
221
✓ ✓
222 224
CD ( FBDy) I, Q, M, SM, V ,S ,L, T, C, BOOL
CU ( FBD) I, Q, M, SM, V, S, L, T, C, BOOL
R ( FBD) I, Q, M, SM, V, S, L,T, C, BOOL
LD ( FBD) I, Q, M, SM, V, S, L, T, C, BOOL
PV (LAD FBD) VW, IW, QW, MW, SMW, LW, SW, AIW, AC, , *VD, *AC,
*LD
QU (LAD FBD) I, Q, M, SM, V, S, L BOOL
QD (LAD FBD) I, Q, M, SM, V, S, L BOOL
CV (LAD FBD) VW, T, C, IW, QW, MW, SW, LW, AC, *VD, *AC, *LD INT
Xxx C0 C255 CTUD
INT
10-17

IEC 1131-3
10-18
I4.0
CU-Up
Timing Diagram
LAD
FBD
I3.0
CD-Down
I4.0 C4
8
I3.0
4
I2.0
CTUD
CU
R
CD
PV
I2.0
R-Reset
0
1
2
3
4
3
4
0
VW0
CV-Current
Q0.0
QU-Up
QU
CV
QD
I1.0
CTUD
CU
R
CD
PV
QU
CV
QD
I4.0
I3.0
I2.0
LD
LD
4
I1.0
LD-Load
QD.1
QD-Down
I1.0
Q0.0
Q0.1
VW0
C4
8
Q0.0
Q0.1
VW0
4
2
3
4
10-6 LAD FBD

IEC 1131-3
10.5 IEC
10-6 IEC
10-6 IEC
PID 9–84
L
A
D
F
B
D
EN
IN1
IN2
ADD
ENO
OUT OUT
IN1 IN2
OUT
16
16
32 32
✓
221
EN
IN1
IN2
SUB
ENO
✓ ✓
222 224
OUT OUT
LAD
IN1 + IN2 = OUT
IN1 - IN2 = OUT
ENO=0 SM1.1 ( ) SM4.3 (
) 0006 ( )
SM1.1 ( ) SM1.2 ( )
SM1.0 ( )
IN1, IN2
OUT
VW, IW, QW, MW, SW, SMW, LW, AIW, T, C, VD, ID, QD,
MD, SMD, SD, LD, HC, AC, , *VD, *AC, *LD
VW, IW, QW, MW, SW, SMW, LW, T, C, VD, ID, QD, MD,
SMD, SD, LD, AC, *VD, *AC, *LD
INT, DINT, REAL
INT, DINT, REAL
ANSI/IEEE751-1985 ( )
10-19

IEC 1131-3
L
A
D
F
B
D
✓
221
MUL
EN ENO
IN1
IN2
EN
IN1
IN2
OUT OUT
DIV
ENO
✓ ✓
222 224
OUT OUT
.
IN1 IN2 OUT
IN1 IN2 OUT
16 16
32 32
LAD
IN1 IN2 = OUT
IN1 / IN2 = OUT
ENO=0 SM1.1 ( ) SM1.3 ( 0
) SM4.3 ( ) 0006 ( )
SM1.0 ( )
SM1.1 ( ) SM1.2 ( ) SM1.3 ( 0 )
SM1.1 ( ) 1
SM1.3
IN1, IN2
OUT
VW, IW, QW, MW, SW, SMW, LW, AIW, T, C, VD, ID, QD,
MD, SMD, SD, LD, HC, AC, , *VD, *AC, *LD
VW, IW, QW, MW, SW, SMW, T, C, LW, VD, ID, QD, MD,
SMD, SD, LD, AC, *VD, *AC, *LD
INT, DINT, REAL
INT, DINT, REAL
ANSI/IEEE751-1985 ( )
10-20

IEC 1131-3
LAD
Network 1
I0.0
ADD
MUL
DIV
EN ENO EN ENO EN ENO
AC1 IN1 OUT AC0 AC1 IN1 OUT VD100 VW202 IN1 OUT
OU VD200
T
T
T
AC0 IN2
VW102 IN2 VW10 IN2
Network 1
FBD
I0.0
AC1
AC0
ADD
E EN
N O
IN1
OUT
T
IN2
AC0
AC1
VW102
MUL
EN ENO
IN1 OUT
T
IN2
VD100
VD200
VD10
DIV
EN ENO
IN1
OUT
T
IN2
VD200
AC1 4000
AC1 4000
VD200
4000
VW90 6000
VD100
200
VD10
41.0
VW90 10000
VD100
800000
VD200
97.56098
10-7 LAD FBD
10-21

IEC 1131-3
L
A
D
F
B
D
✓
221
SQRT
EN ENO
IN
✓ ✓
222 224
OUT
IN
OUT
ENO=0 SM1.1 ( ) SM4.3 (
) 0006 ( )
SM1.0 ( )
SM1.1 ( ) SM1.2 ( )
SM1.1 ( ) 1
IN VD, ID, QD, MD, SMD, SD, LD, AC, , *VD, *AC, *LD REAL
OUT VD, ID, QD, MD, SMD, SD, LD, AC, *VD, *AC, *LD REAL
L
A
D
F
B
D
EN
IN
EN
IN
INC
ENO
OUT
DEC
ENO
OUT
IN 1 1
OUT
ENO=0 SM1.1 ( ) SM4.3 (
) 0006 ( )
SM1.0 ( )
SM1.1 ( ) SM1.2 ( )
✓
221
✓ ✓
222 224
/
IN VB, IB, QB, MB, SB, SMB, LB, VW, IW, QW, MW, SW, SMW, LW, T,
C, AIW, VD, ID, QD, MD, SD, SMD, LD, HC, AC, , *VD, *AC,
*LD
OUT VB, IB, QB, MB, SB, SMB, LB, VW, IW, QW, MW, SW, SMW, T, C,
LW, VD, ID, QD, MD, SMD, SD, LD, AC,*VD, *AC, *LD
BYTE,
DINT
BYTE,
DINT
INT,
INT,
10-22

IEC 1131-3
LAD
I4.0
INC
EN ENO
DEC
EN ENO
IN AC0 OUT AC0
VD10
0
IN
OUT
VD10
0
FBD
I4.0
INC
EN ENO
DEC
EN ENO
AC0 IN OUT AC0
VD1
00
IN
OUT
VD100
AC0
125
VD100
128000
AC0
126
VD100
127999
10-8 / LAD FBD
10-23

IEC 1131-3
10.6 IEC
10-7 IEC
10-7 IEC
9–102
L
A
D
F
B
D
✓
221
MOVE
EN ENO
IN
✓ ✓
222 224
OUT
IN OUT
ENO=0 SM4.3 ( ) 0006
( )
IN
OUT
VB, IB, QB, MB, SB, SMB, LB, VW, IW, QW, MW, SM, SMW, LW,
T, C, AIW, VD, ID, QD, MD, SMD, SD, LD, HC, &VB, &IB, &QB,
&MB, &SB, AC, , *VD, *AC, *LD
VB, IB, QB, MB, SB, SMB, LB, VW, IW, QW, MW, SW, SMW, LW,
T, C, AQW, VD, ID, QD, MD, SMD, SD, LD, AC, *VD, *AC, *LD
BYTE, WORD,
INT, DWORD,
DINT, REAL
BYTE, WORD,
INT, DWORD,
DINT, REAL
10-24

IEC 1131-3
L
A
D
F
B
D
✓
221
BLKMOVE
EN ENO
IN OUT
N
✓ ✓
222 224
IN N
OUT N 1 255
IEC
ENO=0 SM4.3 ( ) 0006
( ) 0091 ( )
IN
OUT
VB, IB, QB, MB, SB, SMB, LB, VW, IW, QW, MW, SM, SMW,
LW, T, C, AIW, VD, ID, QD, MD, SMD, SD, LD, HC, &VB, &IB,
&QB, &MB, &SB, AC, , *VD, *AC, *LD
VB, IB, QB, MB, SB, SMB, LB, VW, IW, QW, MW, SW, SMW,
LW, T, C, AQW, VD, ID, QD, MD, SMD, SD, LD, AC, *VD, *AC,
*LD
N VB, IB, QB, MB, SB, SMB, LB, AC, , *VD, *AC, *LD BYTE
BYTE, WORD,
DWORD
BYTE, WORD,
DWORD
I2.1
LAD
MOVE
EN ENO
FBD
VB50
IN
OUT
AC0
I2.1
MOVE
EN ENO
SQRT
EN ENO
SQRT
EN ENO
VB50
VB50
IN
OUT
AC0
VD100
IN
OUT
AC1
VD100
IN
OUT
AC1
VB50
C3
VD100
150.00
AC0
C3
AC1 12.247
10-9 LAD FBD
10-25

IEC 1131-3
10.7 IEC
IEC
And, Or,
L
A
D
F
B
D
AND
EN ENO
IN1 OUT
IN2
OR
EN ENO
IN1 OUT
IN2
XOR
EN EN
O
IN1 OUT
IN2
(AND) IN1 IN2
OUT
(OR) IN1 IN2
OUT
(XOR) IN1 IN2
OUT
ENO=0 SM4.3 ( ) 0006
( )
SM1.0 ( )
✓
221
✓ ✓
222 224
IN1, IN2 VB, IB, QB, MB, SB, SMB, LB, VW, IW, QW, MW, SW,
SMW, AIW, T, C, LW, VD, ID, QD, MD, SD, SMD, LD, HC,
AC, , *VD, *AC, *LD
OUT
VB, IB, QB, MB, SB, SMB, LB, VW, IW, QW, MW, SW,
SMW, T, C, LW, VD, ID, QD, MD, SD, SMD, LD, AC, *VD,
*AC, *LD
BYTE,
DWORD
BYTE,
DWORD
WORD
WORD
10-26

IEC 1131-3
AND
OR
LAD
I4.0 AND
AC1
EN
IN1
ENO
OUT VW90
VW90
IN2
AC1
VW100
OR
EN ENO
IN1 OUT
IN2
VW100
AC1
VW200
XOR
EN ENO
IN1 OUT
IN2
VW200
FBD
I4.0
AC1
VW90
AND
EN ENO
IN1 OUT
IN2
VW90
AC1
VW100
OR
E EN
N
IN1
O
OU
IN2 T
VW100
AC1
VW200
XOR
EN ENO
IN1 OUT
IN2
VW200
AC1
0001 1111 0110 1101
AC1
0001 1111 0110 1101
AC1
0001 1111 0110 1101
AC0
AND
1101 0011 1110 0110
VW100
OR
1101 0011 1010 0000
AC0
XOR
0001 0011 0110 0100
AC0
=
0001 0011 0110 0100
VW100
=
1101 1111 1110 1101
AC0
=
0000 1100 0000 1001
10-10 AND OR
10-27

IEC 1131-3
L
A
D
F
B
D
✓
221
NOT
EN ENO
IN
OUT
✓ ✓
222 224
IN
OUT
ENO=0 SM4.3 ( ) 0006
( )
SM1.0 ( )
IN VB, IB, QB, MB, SB, SMB, LB, VW, IW, QW, MW, SW,
SMW, AIW, T, C, LW, VD, ID, QD, MD, SD, SMD, LD, HC,
BYTE,
DWORD
AC, , *VD, *AC, *LD
OUT
VB, IB, QB, MB, SB, SMB, LB, VW, IW, QW, MW, SW,
SMW, T, C, LW, VD, ID, QD, MD, SD, SMD, LD, AC,*VD,
*AC, *LD
BYTE,
DWORD
WORD
WORD
10-28

IEC 1131-3
10.8 IEC
10-8 IEC
10-8 IEC
9–123
L
A
D
F
B
D
SHR
EN ENO
IN OUT
N
SHL
EN ENO
IN OUT
N
(IN)
N
OUT 0
(IN)
N
OUT 0
ENO=0 SM4.3 ( ) 0006
( )
✓
221
✓ ✓
222 224
IN
VB, IB, QB, MB, SB, SMB, LB, VW, IW, QW, MW, SW,
SMW, LW, T, C, AIW, VD, ID, QD, MD, SD, SMD, LD, HC,
AC, , *VD, *LD, *AC
N VB, IB, QB, MB, SB, SMB, LB, AC, , *VD, *LD, *AC BYTE
OUT
VB, IB, QB, MB, SB, SMB, LB, VW, IW, QW, MW, SW,
SMW, LW,T, C, VD, ID, QD, MD, SD, SMD, LD, AC *VD,
*LD, *AC
BYTE, WORD
DWORD
BYTE, WORD
DWORD
10-29

IEC 1131-3
L
A
D
F
B
D
ROR
EN ENO
IN
N
OUT
T
ROL
EN ENO
IN
N
OUT
T
(IN)
(N)
(OUT)
ROR 0
ROL 0
ENO = 0 SM4.3 ( ) 0006
( )
✓
221
✓ ✓
222 224
IN
VB, IB, QB, MB, SB, SMB, LB, VW, IW, QW, MW, SW, SMW,
LW, T, C, AIW, VD, ID, QD, MD, SD, SMD, LD, HC, AC, ,
*VD, *LD, *AC
N VB, IB, QB, MB, SB, SMB, LB, AC, , *VD, *LD, *AC BYTE
OUT
VB, IB, QB, MB, SB, SMB, LB, VW, IW, QW, MW, SW, SMW,
LW, T, C, VD, ID, QD, MD, SD, SMD, LD, AC, *VD, *LD, *AC
BYTE, WORD
DWORD
BYTE, WORD
DWORD
10-30

IEC 1131-3
LAD
FBD
I4.0
VW100
2
ROR
EN ENO
IN OUT
N
SHL
EN ENO
VW100
I4.0
VW100
2
ROR
EN ENO
IN OUT
N
VW100
VW200
3
SHL
EN ENO
IN OUT
N
VW200
VW200
IN
OUT
VW200
3
N
VW100
0100 0000 0000 0001 x VW200
1110 0010 1010 1101
x
VW100 1010 0000 0000 0000 1
VW200 1100 0101 0101 1010 1
VW100 0101 0000 0000 0000 0
VW200 1000 1010 1011 0100 1
(SM1.0) = 0
(SM1.1) = 0
shift
VW200 0001 0101 0110 1000 1
(SM1.0) = 0
(SM1.1) = 1
10-11 LAD FBD
10-31

IEC 1131-3
10.9 IEC
10–9 IEC
10-9 IEC
9–131
9–131
9–133
ASCII Hex Hex ASCII 9–135
ASCII 9–136
ASCII 9–138
ASCII 9–139
L
A
D
F
B
D
✓
221
TRUNC
EN ENO
IN OUT
✓ ✓
222 224
(IN)
OUT
ENO = 0 SM1.1 ( ) SM4.3
( ) 0006 ( )
SM1.1 ( )
IN VD, ID, QD, MD, SD, SMD, LD, AC, , *VD, *AC,* LD REAL
OUT VD, ID, QD, MD, SD, SMD, LD, AC, *VD, *AC, *LD DINT
10-32

IEC 1131-3
BCD
BCD
L
A
D
F
B
D
BCD_TO_I
EN ENO
IN OUT
I_TO_BCD
EN ENO
IN OUT
BCD BCD (IN)
OUT
BCD
(IN)
BCD
OUT
ENO = 0 SM1.6 (BCD) SM4.3 (
) 0006 ( )
SM1.6 (
BCD )
✓
221
✓ ✓
222 224
IN VW, IW, QW, MW, SW, SMW, LW, T, C, AIW, AC, ,
*VD, *LD, *AC
WORD
OUT VW, IW, QW, MW, SW, SMW, LW, T, C, AC, *VD, *AC, *LD WORD
L
A
D
F
B
D
✓
221
DI_TO_R
EN ENO
IN
OUT
✓ ✓
222 224
(IN)
OUT
ENO = 0 SM4.3 ( ) 0006
( )
IN VD, ID, QD, MD,SD, SMD, LD, HC, AC, ,*VD,*LD, *AC DINT
OUT VD, ID, QD, MD, SD, SMD, LD, AC, *VD, *LD, *AC REAL
10-33

IEC 1131-3
L
A
D
F
B
D
✓
221
R_TO_DI
EN ENO
IN
OUT
✓ ✓
222 224
(IN)
OUT
ENO = 0 SM4.3 ( )
0006 ( )
IN VD, ID, QD, MD, SD, SMD, LD, AC, ,*VD,*LD, *AC REAL
OUT VD, ID, QD, MD, SD, SMD, LD, AC, *VD, *LD, *AC DINT
L
A
D
F
B
D
✓
221
DI_TO_I
EN ENO
IN
OUT
✓ ✓
222 224
(IN)
OUT
ENO = 0 SM4.3 ( ) 0006
( )
SM1.1 ( )
IN VD, ID, QD, MD, SD, SMD, LD, HC, AC, ,*VD,*LD, *AC DINT
OUT VW, IW, QW, MW, SW, SMW, LW, T, C, AC, *VD, *LD, *AC INT
10-34

IEC 1131-3
L
A
D
F
B
D
✓
221
I_TO_DI
EN ENO
ENO
IN OUT
✓ ✓
222 224
(IN)
OUT
ENO = 0 SM4.3 ( ) 0006
( )
IN VW, IW, QW, MW, SW, SMW, LW, T, C, AIW, , AC,
*VD,*LD, *AC
OUT VD, ID, QD, MD, SD, SMD, LD, AC, *VD, *LD, *AC DINT
INT
L
A
D
F
B
D
✓
221
B_TO_I
EN ENO
ENO
IN OUT
✓ ✓
222 224
(IN)
OUT
ENO = 0 SM4.3 ( ) 0006
( )
IN VB, IB, QB, MB, SB, SMB, LB, AC, , *VD, *LD, *AC BYTE
OUT VW, IW, QW, MW, SW, SMW, LW, T, C, AC, *VD, *LD, *AC INT
10-35

IEC 1131-3
L
A
D
F
B
D
✓
221
I_TO_B
EN ENO
IN
OUT
✓ ✓
222 224
(IN)
OUT
ENO = 0 SM1.1 ( ) SM4.3 (
) 0006 ( )
SM1.1 ( )
IN VW, IW, QW, MW, SW, SMW, LW, T ,C, AIW, AC, ,
*VD, *LD, *AC
OUT VB, IB, QB, MB, SB, SMB, LB, AC, *VD, *LD, *AC BYTE
INT
LAD
Network 1
I0.0
I_TO_D
EN I ENO
1
AC1
VW20
IN
OUT
AC1
DI_TO_R
EN
ENO
AC1
IN
OUT
VD0
VD0
MUL
EN ENO
IN1 OUT
VD8
2.54
VD4
IN2
ROUND
EN
ENO
VD8
Network 2
I3.0
IN OUT
BCD_TO_I
EN ENO
VD12
VW100
IN
OUT
VW100
10-12 LAD
10-36

IEC 1131-3
FBD
Network 1
I_TO_DI
I0.0 EN ENO
DI_TO_R
EN ENO
MUL
EN ENO
ROUND
EN ENO
VW 20 IN OUT
AC 1
AC 1 IN OUT
VD 0
VD 0
VD 4
IN1 OUT
IN2
VD 8
VD 8 VD 12
IN OUT
Network 2
I3.0
BCD_TO-I
EN ENO
IN OUT
VW 100 VW 100
VW20 101
VD0 101.0
VD4 2.54
VD8 256.54
VD12 257
= 101
2.54 ( )
256.54
256
BCD
VW100 1234
BCDI
VW100 04D2
10-13 FBD
10-37

A S7-200
A
A.1 A–2
A.2 CPU 221 A–6
A.3 CPU 222 A–11
A.4 CPU 224 A–16
A.5 EM221 A–21
A.6 EM222 A–23
A.7 EM223 8 /8 A–25
A.8 A–28
A.9 I/O A–29
A.10 PC/PPI A–30
A-1

A S7-200
A.1
S7-200 A -
1
• Underwriters Laboratories, Inc.: UL 508 Listed ( )
• CSA C22.2 142 ( )
• FM I 2 A,B,C,&D T4A
• VDE 0160:
• (CE) 72/23/EEC EN 61131 2:
• (CE) EMC 89/336/EEC
EN50081-1
EN50081-2
EN 50082-2
A-2

A S7-200
A-1 S7–200
S7–200 CPU S7 200 A-1
IEC 68-2-2 Test Bb
-40 ~ +70
IEC 68-2-1 Test Ab
IEC 68-2-30 Test Db 25 ~ 55 , 95%
IEC 68-2-31 100 mm 4
IEC 68-2-32 1 m 5
( 25 mm )
0 ~ 55
0 ~ 45
95%
IEC 68-2-14, Test Nb 5 ~ 55 3 /
IEC 68-2-27 15 G 11 ms (3 ) 6
IEC 68-2-6 - 0.30 mm 10 ~ 57 Hz 2 G / 1 G /
57 Hz ~ 150 Hz 10 1
/
EN 60529, IP20
12.5mm
1
EN50082-2 1
EN 61000-4-2 (IEC 801-2) 8 kV
EN 50140 (IEC 801-3) 80 MHz ~ 1 GHz 10 V/m 1 kHz 80%
EN 50141
0.15 ~ 80 MHz 10 V RMS
1kHz 80%
EN 50204 900 MHz ± 5 MHz 10 V/m 50% , 200 Hz
EN 61000-4-4 (IEC 801-4) AC DC 2 kV, 5 kHz
I/O
2 kV, 5 kHz
EN 61000-4-5 (IEC 801-5) 2 kV 1 kV
5 /5 0° +90° -90°
(24 VDC )
VDE 0160 85 VAC 90° 390 V 1.3 ms
180 VAC 90° 750 V 1.3 ms
A-3

A S7-200
A-1 S7–200
EN50081 -1 2 -2
EN 55011, Class A, Group 1, 1
0.15 MHz ~ 0.5 MHz
0.5 MHz ~ 5 MHz
5 MHz ~ 30 MHz
EN 55011, Class A, Group 1, 1
30 MHz ~ 230 kHz
230 MHz ~ 1 GHz
EN 55011, Class B, Group 1, 2
0.15 ~ 0.5 MHz
0.5 MHz ~ 5 MHz
5 MHz ~ 30 MHz
EN 55011, Class B, Group 1, 2
30 MHz ~ 230 kHz
230 MHz ~ 1 GHz
< 79 dB (µV) < 66 dB (µV)
< 73 dB (µV) < 60 dB (µV)
< 73 dB (µV) < 60 dB (µV)
30 dB (µV/m) 30
37 dB (µV/m) 30

A S7-200
A–1
4000
1000
500
300
250 VAC
30 VDC
100
250 VAC (p.f.=0.4)
30 VDC (L/R=7ms)
0 1 2 3 4 5 6 7
A
A-1
A-5

A S7-200
A.2 CPU 221
A-2 CPU 221 DC/DC/DC CPU 221 AC/DC/
CPU 221 DC/DC/DC
6ES7 211-0AA20-0XBO
CPU 221 AC/DC/
6ES7 211-0BA20-0XB0
( x H x ) 90 mm x 80 mm x 62 mm
270 g
4 W
90 mm x 80 mm x 62 mm
310 g
6 W
CPU
1 ms
10 ms
100 ms
/
(32– )
( )
:
I/O
6
4
4
4 20 kHz
2 20 kHz
2 20 kHz
1 8
2 1 ms
4 / 4
7 0.2 ms ~ 12.8 ms
6
2048
1024
1024
1024
10
256
112
256
256
64
4
16
236
256
256
0.37 µs
34 µs
50 µs ~ 64 µs
46 µs
100 µs ~ 400 µs
50 / 8 /
40° C
6
4
4
4 20 kHz
2 20 kHz
2 20 kHz
1 8
2 1 ms
4 / 4
7 0.2 ms ~ 12.8
ms
6
2048
1024
1024
1024
10
256
112
256
256
64
4
16
236
256
256
0.37 µs
34 µs
50 µs ~ 64 µs
46 µs
100 µs ~ 400 µs
50 / 8 /
40° C
A-6

A S7-200
A-2 CPU 221 DC/DC/DC CPU 221 AC/DC/
CPU 221 DC/DC/DC
6ES7 211-0AA20-0XBO
CPU 221 AC/DC/
6ES7 211-0BA20-0XB0
PPI/MPI
( )
1
RS–485
9.6, 19.2, 187.5 k
0.3, 0.6, 1.2, 2.4, 4.8, 9.6, 19.2,
38.4 k
1
RS–485
9.6, 19.2, 187.5 k
0.3, 0.6, 1.2, 2.4, 4.8, 9.6,
19.2, 38.4 k
38.4 k
187.5 k
1200 m
1000 m
1200 m
1000 m
32
32
126
126
32
32
PPI
MPI
(NETR/NETW)
4 ; 2 PG
4 ; 2
OP
PG
OP
( )
( )
( )
200 days, typical
25° C 2 /
0~55° C 7 /
200 /
25° C 2 /
0~55° C 7 /
CPU /
( )
( )
( )
( )
24 VDC
( )
20.4~ 28.8 VDC
70/600 mA 24 VDC
10 A 28.8 VDC
10 ms 24 VDC
2 A 250 V
15.4 ~ 28.8 VDC
180 mA
600 mA
85 ~ 264 VAC
47 ~ 63 Hz
25/80 mA 240 VAC
25/180 mA 120 VAC
20 A 264 VAC
1500 VAC
80 ms 240 VAC, 20 ms
120 VAC
2 A 250 V
20.4 ~ 28.8 VDC
180 mA
600 mA
1V ( )
A-7

A S7-200
A-2 CPU 221 DC/DC/DC CPU 221 AC/DC/
CPU 221 DC/DC/DC
6ES7 211-0AA20-0XBO
CPU 221 AC/DC/
6ES7 211-0BA20-0XB0
6
/ (IEC Type 1 )
6
/ (IEC Type 1 )
1 ( )
0 ( )
30 VDC
35 VDC/ 0.5 s
24 VDC/ 4 mA,
15 VDC/ 2.5 mA,
5 VDC/ 1 mA,
( )
(galvanic) 500 VAC 1
4 /2
30 VDC
35 VDC/ 0.5 s
24 VDC/ 4 mA,
15 VDC/ 2.5 mA,
5 VDC/ 1 mA,
500 VAC 1
4 /2
0.2 ~ 12.8 ms, 0.2 to 12.8 ms,
HSC
1 = 15 ~ 30 VDC
1 = 15 ~ 26 VDC
20 kHz
30 kHz
20 kHz
30 kHz
1 = 15 ~ 30 VDC
1 = 15 ~ 26 VDC
2 (Bero)
10 kHz
20 kHz
10 kHz
20 kHz
1 mA 1 mA
( HSC)
HSC
300 m
500 m
50 m
300 m
500 m
50 m
40 ° C
55 ° C
6
6
6
6
4
MOSFET ( )
4
-
1
10 K 0
20.4 ~ 28.8 VDC
24 VDC
20 VDC,
0.1 VDC,
5 ~ 30 VDC 5 ~ 250 VAC
-
-
-
A-8

A S7-200
A-2 CPU 221 DC/DC/DC CPU 221 AC/DC/
CPU 221 DC/DC/DC
6ES7 211-0AA20-0XBO
CPU 221 AC/DC/
6ES7 211-0BA20-0XB0
1
( )
- ( )
- ( )
( )
0.75 A
1
4
4
4
3.0 A
5.0 W
0.3
10 µA
8 A 100 ms ( )
2.00 A
2
4
3 1
3 1
6.0 A
30 W DC/200 W AC
-
7 A
0.002
500 VAC 1
-
-
-
4
-
1500 VAC 1
750 VAC 1
3 1
100 M
<
1 W,
-
0.5 LI 2 x
48 V
-
Off On (Q0.0 Q0.1)
On Off (Q0.0 Q0.1)
Off On (Q0.2 Q0.3)
On Off (Q0.2 Q0.3)
2 µs,
10 µs,
15 µs,
100 µs,
( )
Q0.0 Q0.1 20 kHz 1 Hz
-
-
-
-
( )
-
-
-
10 ms
10,000,000 /
100,000 /
150 m
500 m
150 m
500 m
A-9

A S7-200
24 VDC ,
_
+ +
_
_
24 VDC
M L+ 0.0 0.1 0.2 0.3 M L+DC
1.
2.
3.
36V
1K W
5.6K W
1M 0.0 0.1 0.2 0.3 2M 0.4 0.5
M L+
24 VDC
24 VDC
_
+
_
+
_
24 VDC
A-2 CPU 221 DC/DC/DC
N (-)
L (+)
N (-)
L (+)
120/240 VAC
1L 0.0 0.1 0.2 2L 0.3
N L1AC
1.
2. AC L
3.
4.
1K W
5.6K W
1M 0.0 0.1 0.2 0.3 2M 0.4 0.5
M L+
24 VDC
24 VDC
_
_
+
_
+
_
24 VDC
A-3 CPU 221 AC/DC/
A-10

A S7-200
A.3 CPU 222
A-3 CPU 222 DC/DC/DC CPU 222 AC/DC/
CPU 222 DC/DC/DC
6ES7 212-1AB20-0XB0
CPU 222 AC/DC/
6ES7 212-1BB20-0XB0
( x x ) 90 mm x 80 mm x 62 mm
270 g
4 W
90 mm x 80 mm x 62 mm
310 g
6 W
CPU
1 ms
10 ms
100 ms
/
(32– )
( )
:
I/O
I/O
8
6
4
4 20 kHz
2 20 kHz
2 20 kHz
1 8
2 1 ms
4 / 4
7 0.2 ms ~ 12.8 ms
8
2048
1024
1024
1024
2
256
16 AI/16 AO
256
112
256
256
64
4
16
236
256
256
0.37 µs
34 µs
50 µs ~ 64 µs
46 µs
100 µs ~ 400 µs
50 / 8 /
40° C
8
6
4
4 20 kHz
2 20 kHz
2 20 kHz
1 8
2 1 ms
4 / 4
7 0.2 ms ~ 12.8 ms
8
2048
1024
1024
1024
2
256
16 AI/16 AO
256
112
256
256
64
4
16
236
256
256
0.37 µs
34 µs
50 µs ~ 64 µs
46 µs
100 µs ~ 400 µs
50 / 8 /
40° C
A-11

A S7-200
A-3 CPU 222 DC/DC/DC CPU 222 AC/DC/
CPU 222 DC/DC/DC
6ES7 212-1AB20-0XB0
CPU 222 AC/DC/
6ES7 212-1BB20-0XB0
PPI/MPI
PPI
( )
38.4 k
187.5 k
MPI
/
(NETR/NETW)
1
RS–485
9.6, 19.2, 187.5 k
0.3, 0.6, 1.2, 2.4, 4.8, 9.6, 19.2,
38.4 k
1200 m
1000 m
32 / 126
32
4 ; 2 PG
OP
1
RS–485
9.6, 19.2, 187.5 k
0.3, 0.6, 1.2, 2.4, 4.8, 9.6,
19.2, 38.4 k
1200 m
1000 m
32 / 126
32
4 ; 2
PG
OP
( )
( )
( )
200 /
25° C 2 /
0~55° C 7 /
200 /
25° C 2 /
0~55° C 7 /
( )
CPU /
( )
( )
( )
20.4~ 28.8 VDC
70/600 mA 24 VDC
10 A 28.8 VDC
10 ms 24 VDC
2 A 250 V
+5 V I/O ( ) 340 mA 340 mA
24 VDC
( )
15.4 ~ 28.8 VDC
180 mA
600 mA
85 ~ 264 VAC
47 ~ 63 Hz
25/80 mA 240 VAC
25/180 mA 120 VAC
20 A 264 VAC
1500 VAC
80 ms 240 VAC, 20 ms
120 VAC
2 A 250 V
20.4 ~ 28.8 VDC
180 mA
1V ( )
600 mA
A-12

A S7-200
A-3 CPU 222 DC/DC/DC CPU 222 AC/DC/
CPU 222 DC/DC/DC
6ES7 212-1AB20-0XB0
CPU 222 AC/DC/
6ES7 212-1BB20-0XB0
8
/ (IEC Type 1 )
8
/ (IEC Type 1 )
1 ( )
0 ( )
( )
30 VDC
35 VDC/ 0.5 s
24 VDC/ 4 mA,
15 VDC/ 2.5 mA,
5 VDC/ 1 mA,
500 VAC 1
4
30 VDC
35 VDC/ 0.5 s
24 VDC/ 4 mA,
15 VDC/ 2.5 mA,
5 VDC/ 1 mA,
500 VAC 1
4
0.2 ~ 12.8 ms, 0.2 ~ 12.8 ms,
HSC
1 = 15 ~ 30 VDC
1 = 15 ~ 26 VDC
20 kHz
30 kHz
20 kHz
30 kHz
1 = 15 ~ 30 VDC
1 = 15 ~ 26 VDC
2 (Bero)
10 kHz
20 kHz
10 kHz
20 kHz
1 mA 1 mA
( HSC)
HSC
300 m
500 m
50 m
300 m
500 m
50 m
40 ° C
55 ° C
8
8
8
8
6
-MOSFET
6
-
1
10 K 0
20.4 ~ 28.8 VDC
24 VDC
20 VDC,
0.1 VDC,
5 ~ 30 VDC 5 ~ 250 VAC
-
-
-
A-13

A S7-200
A-3 CPU 222 DC/DC/DC CPU 222 AC/DC/
CPU 222 DC/DC/DC
6ES7 212-1AB20-0XB0
CPU 222 AC/DC/
6ES7 212-1BB20-0XB0
1
( )
- ( )
- ( )
( )
0.75 A
1
6
6
6
4.5 A
5 W
0.3
10 µA
8 A 100 ms ( )
2.00 A
2
6
3
3
6 A
30 W DC/ 200 W AC
0.002
-
7 A
500 VAC 1
-
-
-
6
-
1500 VAC 1
750 VAC 1
3
100 M
<
0.5 LI 2 x
1 W,
48 V
-
-
Off On (Q0.0 Q0.1)
On Off (Q0.0 Q0.1)
Off On (Q0.2 Q0.5)
On Off (Q0.2 Q0.5)
2 µs,
10 µs,
15 µs,
100 µs,
( )
Q0.0 and Q0.1 20 kHz 1 Hz
-
-
-
-
( )
-
-
-
10 ms
10,000,000 /
100,000 /
150 m
500 m
150 m
500 m
A-14

A S7-200
24VDC
_
+ +
_
_
24 VDC
M L+ 0.0 0.1 0.2 0.3 0.4 0.5
M L+DC
1.
2.
3.
36V
1K W
5.6K W
1M 0.0 0.1 0.2 0.3 2M 0.4 0.5 0.6 0.7 M L+
24 VDC
24 VDC
_
+
_
+
_
24 VDC
A-4 CPU 222 DC/DC/DC
N (-)
L (+)
N (-)
L (+)
120/240 VAC
1L 0.0 0.1 0.2 2L 0.3 0.4 0.5 N L1AC
1.
2. AC L
3.
4.
1K W
5.6K W
1M 0.0 0.1 0.2 0.3 2M 0.4 0.5 0.6 0.7 M L+
24 VDC
24 VDC
_
+
_
+
_
24 VDC
A-5 CPU 222 AC/DC/
A-15

A S7-200
A.4 CPU 224
A-4 CPU 224 DC/DC/DC CPU 224 AC/DC/
CPU 224 DC/DC/DC
6ES7 214-1AD20-0XB0
CPU 224 AC/DC/
6ES7 214-1BD20-0XB0
( x H x ) 120.5 mm x 80 mm x 62 mm
360 g
8 W
120.5 mm x 80 mm x 62 mm
410 g
9 W
CPU
A-16
( )
1 ms
10 ms
100 ms
/
(32– )
( )
: ( )
I/O
I/O
14
10
6
6 20 kHz
4 20 kHz
2 20 kHz
1 8
2 1 ms
4 / 4
7 0.2 ms ~ 12.8 ms
14
25° C 2 /
0° C ~ 55° C 7 /
4096
2560
2560
2560
7
256
16 AI/16 AO
256
112
256
256
64
4
16
236
256
256
0.37 µs
34 µs
50 µs ~ 64 µs
46 µs
100 µs ~ 400 µs
190 / 120 /
40° C
14
10
6
6 20 kHz
4 20 kHz
2 20 kHz
1 8
2 1 ms
4 / 4
7 0.2 ms ~ 12.8 ms
14
25° C 2 /
0° C ~ 55° C 7 /
4096
2560
2560
2560
7
256
16 AI/16 AO
256
112
256
256
64
4
16
236
256
256
0.37 µs
34 µs
50 µs ~ 64 µs
46 µs
100 µs ~ 400 µs
190 / 120 /
40° C

A S7-200
A-4 CPU 224 DC/DC/DC CPU 224 AC/DC/
CPU 224 DC/DC/DC
6ES7 214-1AD20-0XB0
CPU 224 AC/DC/
6ES7 214-1BD20-0XB0
PPI/MPI
PPI
( )
38.4 k
187.5 k
MPI
/
(NETR/NETW)
1
RS–485
9.6, 19.2, 187.5 k
0.3, 0.6, 1.2, 2.4, 4.8, 9.6, 19.2,
38.4 k
1200 m
1000 m
32 / 126
32
4 ; 2 PG
OP
1
RS–485
9.6, 19.2, 187.5 k
0.3, 0.6, 1.2, 2.4, 4.8, 9.6, 19.2,
38.4 k
1200 m
1000 m
32 / 126
32
PG
4 ; 2
OP
( )
( ) 200 / 200 /
( )
CPU /
( )
( )
( )
20.4 ~ 28.8 VDC
120/900 mA 24 VDC
10 A 28.8 VDC
10 ms 24 VDC
2 A, 250 V,
+5 V I/O ( ) 660 mA 660 mA
24 VDC
( )
15.4 ~ 28.8 VDC
180 mA
600 mA
85 ~ 264 VAC
47 ~ 63 Hz
35/100 mA 240 VAC
35/220 mA 120 VAC
20 A 264 VAC
1500 VAC
80 ms 240 VAC, 20 ms 120
VAC
2 A, 250 V,
20.4 ~ 28.8 VDC
180 mA
1V ( )
600 mA
A-17

A S7-200
A-4 CPU 224 DC/DC/DC CPU 224 AC/DC/
14
/ (IEC Type 1)
14
/ (IEC Type 1)
1 ( )
0 ( )
( )
30 VDC
35 VDC/ 0.5 s
24 VDC/ 4 mA,
15 VDC/ 2.5 mA,
5 VDC/ 1 mA,
500 VAC 1
8 6
30 VDC
35 VDC/ 0.5 s
24 VDC/ 4 mA,
15 VDC/ 2.5 mA,
5 VDC/ 1 mA,
500 VAC 1
8 6
0.2 ~ 12.8 ms, 0.2 to 12.8 ms,
HSC
1 = 15 ~ 30 VDC
1 = 15 ~ 26 VDC
20 kHz
30 kHz
20 kHz
30 kHz
1 = 15 ~ 30 VDC
1 = 15 ~ 26 VDC
(Bero)
10 kHz
20 kHz
10 kHz
20 kHz
1 mA 1 mA
( HSC)
HSC
300 m
500 m
50 m
300 m
500 m
50 m
40 ° C
55 ° C
14
14
14
14
10
-MOSFET
10
-
1
10 K 0
20.4 ~ 28.8 VDC
24 VDC
20 VDC,
0.1 VDC,
5 ~ 30 VDC 5 ~ 250 VAC
-
-
-
A-18

A S7-200
A-4 CPU 224 DC/DC/DC CPU 224 AC/DC/
CPU 224 DC/DC/DC
6ES7 214-1AD20-0XB0
CPU 224 AC/DC/
6ES7 214-1BD20-0XB0
1
( )
- ( )
- ( )
( )
0.75 A
2
10
5
5
3.75 A
5 W
0.3
10 µA
8 A 100 ms ( )
2.00 A
3
10
4/3/3
4/3/3
8 A
30 W DC/200 W AC
-
7 A
0.002
500 VAC 1
-
-
-
5
-
1500 VAC 1
750 VAC 1
4 / 3 / 3
100 M
<
0.5 LI 2 x
1 W,
48 V
-
-
Off On (Q0.0 Q0.1)
On Off (Q0.0 Q0.1)
Off On (Q0.2 Q1.1)
On Off (Q0.2 Q1.1)
2 µs,
10 µs,
15 µs,
100 µs,
( )
Q0.0 Q0.1 20 kHz 1 Hz
-
-
-
-
( )
-
-
-
10 ms
10,000,000 /
100,000 /
150 m
500 m
150 m
500 m
A-19

A S7-200
24 VDC
24 VDC
_ _ _ _
+ +
+
1M 1L+ 0.0 0.1 0.2 0.3 0.4 2M 2L+ 0.5 0.6 0.7 1.0 1.1
M L+DC
36V
1K W
5.6K W
1M 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 2M 1.0 1.1 1.2 1.3 1.4 1.5 M L+
24 VDC
24 VDC
_
+
_
+
_
24 VDC
A-6 CPU 224 DC/DC/DC
120/240 VAC
N (-)
L (+)
N (-)
L (+)
N (-)
L (+)
1L 0.0 0.1 0.2 0.3 2L 0.4 0.5 0.6 3L 0.7 1.0 1.1 N L1AC
1.
2. AC L
3.
4.
1K W
5.6K W
1M 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 2M 1.0 1.1 1.2 1.3 1.4 1.5 M L+
24VDC
24VDC
_
+
_
+
_
24VDC
A-7 CPU 224 AC/DC/
A-20

A S7-200
A.5 EM221
A-5 EM221 24 VDC 8
EM221 24 VDC, 8
6ES7 221-1BF20-0XA0
( ) 46 x 80 x 62 mm
150 g
2 W
8
/ (IEC Type 1 )
1 ( )
0 ( )
30 VDC
35 VDC/ 0.5 s
24 VDC/ 4 mA,
15 VDC/ 2.5 mA,
5 VDC/ 1 mA,
500 VAC 1
4
4.5 ms
2 (Bero)
1 mA
350 m
500 m
40 ° C
55 ° C
8
8
+5 VDC ( I/O ) 30 mA
A-21

A S7-200
_
+
_
24 VDC
24 VDC
1M .0 .1 .2 .3
1K W
5.6K W
2M .4 .5 .6 .7
24 VDC
24 VDC
_
_
+
A-8 EM221 8 x 24 VDC
A-22

A S7-200
A.6 EM222
A-6 EM222 24 V DC
( ) 46 x 80 x 62 mm
150 g
2 W
EM222 24 VDC
6ES7 222-1BF20-0XA0
EM222
6ES7 222-1HF20-0XA0
46 x 80 x 62 mm
170 g
2 W
8
-MOSFET
8
1
10 K 0
1
- ( )
- ( )
( )
20.4 ~ 28.8 VDC
24 VDC
20 VDC
0.1 VDC
0.75 A
2
8
4
4
3 A
5 W
0.3
10 µA
8 A 100 ms
5 ~ 30 VDC 5 ~ 250
VAC
-
-
2.00 A
2
8
4
4
8 A
30 W DC/200 W AC
0.002
-
7 A
500 VAC 1
-
-
-
4
-
1500 VAC 1
750 VAC 1
4
100M

A S7-200
24 VDC
24 VDC
_
+
1M
1L+ .0 .1 .2 .3
1.
2.
36V
2M
2L+ .4 .5 .6 .7
24 VDC
24 VDC
+
A-9 EM222 8 x 24 VDC
N (-)
L (+)
24 VDC
1L .0 .1 .2 .3
24 VDC
1.
2. AC L
3.
4. M
CPU M
M
L+
2L .4 .5 .6 .7
_
_
+
N (-)
L (+)
A-10 EM222 8 x
A-24

A S7-200
A.7 EM223 8 / 8
A-7 EM223 24 VDC 8 /8 EM223 24 VDC 8 /8
EM223 24VDC /
6ES7 223-1BH20-0XA0
EM223 24VDC /
6ES7 223-1PH20-0XA0
( ) 71.2 mm x 80 mm x 62 mm
200 g
3 W
71.2 mm x 80 mm x 62 mm
300 g
3 W
8
/ (IEC Type 1 )
8
/ (IEC Type 1 )
1 ( )
0 ( )
30 VDC
35 VDC / 0.5 s
24 VDC / 4 mA, l
15 VDC / 2.5 mA,
5 VDC / 1 mA,
30 VDC
35 VDC / 0.5 s
24 VDC / 4 mA,
15 VDC / 2.5 mA,
5 VDC / 1 mA,
500 VAC 1
4
500 VAC 1
4
4.5 ms 4.5 ms
2 (Bero)
1 mA 1 mA
300 m
500 m
300 m
500 m
40 ° C
55 ° C
8
8
8
8
8
-MOSFET
8
1
10 K 0 d
20.4 ~ 28.8 VDC
24 VDC
20 VDC,
0.1 VDC,
5 ~ 30 VDC 5 ~ 250 VAC
-
-
-
A-25

A S7-200
A-7 EM223 24 VDC 8 /8 EM223 24 VDC 8 /8
EM223 24VDC /
6ES7 223-1BH20-0XA0
EM223 24VDC /
6ES7 223-1PH20-0XA0
1
- ( )
- ( )
( )
0.75 A
2
8
4
4
2 A
5 W
0.3
10 µA,
8 A 100 ms,
2.00 A
2
8
4
4
8 A
30 W DC/200 W AC
-
7 A
0.002
500 VAC 1
-
-
-
4
-
1500 VAC 1
750 VAC 1
4
100 M
<
0.5 LI 2 x
1 W,
48 V
-
-
Off
On
On
Off
50 µs,
200 µs,
-
-
( )
-
-
-
10 ms
10,000,000 /
100,000 /
150 m
500 m
150 m
500 m
L+
+5 VDC ( I/O )
L+
100 mA
-
-
80 mA
9 mA
20.4 ~ 28.8 VDC
A-26

A S7-200
_
+ +
24 VDC
24 VDC
1M 1L+ .0 .1 .2 .3 2M 2L+ .4 .5 .6 .7
36V
24 VDC
24 VDC
470 W
1M
5.6 KW
.0 .1 .2 .3 2M .4 .5 .6 .7
_
_
+
_
+
_
A-11 EM223 (8 24VDC /8 VDC )
N (-)
L (+)
1L .0 .1 .2 .3 2L .4 .5 .6 .7
1.
2. AC L
3. DC
4. M
CPU M
470 W
5.6 KW
24 VDC
24 VDC
M
L+
1M
.0 .1 .2 .3 2M .4 .5 .6 .7
_
+
_
+
_
+
_
_
A-12 EM223 8 24 VDC /8
A-27

A S7-200
A.8
6ES7 291 8GE20 0XA0
6ES7 297 1AA20 0XA0
6ES7 291 8BA20 0XA0
( ) 200
2 / 25°C
7 / 0°C ~ 55°C
18 mm
3 g
18 mm
10 mm
3 V, 30 Mah Renata CR 1025
9.9 x 2.5 mm
(< 0.6 g)
10
A-28

A S7-200
A.9 I/O
6ES7 290-6AA20-0XA0
0.8 m (32 )
25 g
10
I/O
A-13 I/O
CPU
A-29

A S7-200
A.10 PC/PPI
6ES7 901-3BF20-0XA0
PC/PPI
0.3 m
(12 )
RS-232 COMM
0.1 m
(4 )
40 mm
(1.6 )
4.6 m
(181 )
RS-485 COMM
PC/PPI
PPI Baud Rate 123 SWITCH 4 1 = 10 BIT
38.4K 000 0 = 11 BIT
1
0
1 2 3 4 5
19.2K 001
9.6K 010 SWITCH 5 1 = DTE
2.4K 100 0 = DCE
1.2K 101
PC
A-14 PC/PPI
A-8 PC/PPI
38400 000
19200 001
9600 010
4800 011
2400 100
1200 101
600 110
(1 = )
A-9 PC/PPI
11– 0
10– 1
A-30

A S7-200
A-10 PC/PPI Pin–out
Pinout
DCE 0
DTE 1
A-11 RS–485 RS–232 DCE
RS–485
RS–232 DCE
1 (RS–485 ) 1 (DCD) ( )
2 24 V (RS–485 ) 2 (RD)
( PC/PPI )
3 B (RxD/TxD+) 3 (TD)
( PC/PPI)
4 RTS (TTL ) 4 (DTR)
( )
5 (RS–485 ) 5 (RS–232 )
6 +5 V ( 100 ) 6 (DSR) ( )
7 24 V 7 (RTS) ( )
8 A (RxD/TxD-) 8 (CTS) ( )
9 9 (RI) ( )
A-12 RS–485 RS–232 DTE
RS–485 RS–232 DTE 1
1 (RS–485 ) 1 (DCD) ( )
2 24 V (RS–485 ) 2 (RD)
( PC/PPI )
3 B (RxD/TxD+) 3 (TD)
( PC/PPI )
4 RTS (TTL ) 4 (DTR)
( )
5 (RS–485 ) 5 (RS–232 )
6 +5 V ( 100 ) 6 (DSR) ( )
7 24 V 7 (RTS)
( PC/PPI )
8 A (RxD/TxD-) 8 (CTS) ( )
9 9 (RI) ( )
1 - 9 25
A-31

A-32
A S7-200

B
B
S7-200CPU
B.1 B–2
B.2 B–3
B.3 B–4
B-1

B
B.1
CPU
CPU
CPU
CPU
• STOP ( )
• STOP ( ) LED
•
B-1 CPU
B-1 CPU
0000
0001
0002
0003 r
0004 EEPROM
0005 EEPROM
0006 EEPROM
0007 EEPROM
0008 EEPROM
0009 EEPROM DB1
000A
000B
000C
000D
000E
000F
DB1
0010
0011
0012
0013 CPU
B-2

B
B.2
CPU B-2
( )
B-2
0000
0001 HDEF HSC
0002 HSC
0003 HSC
0004 ENI DISI HDEF
( )
0005 HSC/PLS HSC/PLS
( HSC HSC/PLS )
0006
0007 TODW ( ) TODR ( )
0008
0009 XMT RCV 0 XMT/RCV
000A HSC , HDEF HSC
000B 1 XMT/RCV
000C
000D
000E PTO 0
0091 ( ) s
0092 ( )
0094 ( )
009A
B-3

B
B.3
CPU
( ) CPU
B-3
CPU
B-3
0080
0081
0082
0083 MEND MEND
0084
0085 FOR FOR NEXT
0086 NEXT NEXT FOR
0087 (LBL INT SBR)
0088 RET RET
0089 RETI RETI
008A
008B
008C (LBLNINT SBR)
008D (LBL INT SBR)
0090
0091 ( )
0092 ( )
0093 FOR/NEXT
0095 LSCR ( SCR)
0096 SCRE (SCR ) SCRE
0097 EU/ED
0098 EU/ED
0099
B-4

C (SM)
C
CPU
SMB0:
CPU
C-1 SMB0 8 S7-200
C-1 SMB0 (SM0.0 - SM0.7)
SM
SM0.0 1
SM0.1 1
SM0.2 1
SM0.3 RUN ON
SM0.4 30 1 30 0
1
SM0.5 0.5 1 0.5 0 1
1
SM0.6 1 0
SM0.7 CPU ( TERM 1 RUN
) RUN
TERM
C-1

C (SM)
SMB1:
C-2 SMB1
( 1) ( 0)
C-2 SMB1 (SM1.0 - SM1.7)
SM
SM1.0 0 1
SM1.1 1
SM1.2 1
SM1.3 1
SM1.4 ATT (Add to Table) 1
SM1.5 LIFO FIFO 1
SM1.6 BCD 1
SM1.7 ASCII 1
SMB2:
SMB2 C-3
C-3 SMB2
SM
SMB2 0 1
SMB3:
SMB3
1 C-4
SM3.0
C-4 SMB3 (SM3.0 - SM3.7)
SM
SM3.0 0 1 (0 1 )
SM3.1 -
SM3.7
C-2

C (SM)
SMB4:
C-5 SMB4
CPU
C-5 SMB4 (SM4.0 - SM4.7)
SM
SM4.0 1
SM4.1 1
SM4.2 1 1
SM4.3 1
SM4.4 1
SM4.5 ( 0) 1
SM4.6 ( 1) 1
SM4.7 1
1
SM4.0 SM4.1 SM4.2
( 0)
SMB5: I/O
C-6 SMB5 I/O
I/O
C-6 SMB5 (SM5.0 - SM5.7)
SM
SM5.0 I/O 1
SM5.1 I/O I/O 1
SM5.2 I/O I/O
SM5.3 -
SM5.6
SM5.7 DP
C-3

C (SM)
SMB6: CPU
(ID)
C-7 SMB6 CPU (ID) SM6.4 SM6.7
CPU SM6.0 SM6.3
C-7 SMB6
SM
MSB
LSB
7 0
x x x x r r r r
CPU ID register
SM6.4 – SM6.7 xxxx = 0000 = CPU 212/CPU 222
0010 = CPU 214/CPU 224
0110 = CPU 221
1000 = CPU 215
1001 = CPU 216
SM6.0 – SM6.3
SMB7:
SMB7
C-4

C (SM)
SMB8
SMB21: I/O
SMB8 SMB21 ( ) 0 6
C-8
I/O
I/O
C-8 SMB8 - SMB21
SM
SMB8
SMB9
SMB10
SMB11
SMB12
SMB13
SMB14
SMB15
SMB16
SMB17
SMB18
SMB19
SMB20
SMB21
Even-Number Byte:Moudule ID Register Odd-number Byte:Module Error register
MSB
LSB MSB
LSB
7 0
7 0
M t t A i i Q Q C ie 0 b r p f t
M:Module present 0=Present
1=Not present
tt: 00 Non-intelligent I/O module
01 Intelligent module
10 Reserved
11 Reserved
A IO type 0=Discrete
1=Analog
ii 00 No inputs
01 2 Al or 8 DI
10 4 Al or 16 DI
11 8 Al or 32 DI
QQ 00 No outputs
01 2 Al or 8 DI
10 4 Al or 16 DI
11 8 Al or 32 DI
0 (ID)
0
1 (ID)
1
2 (ID)
2
3 (ID)
3
4 (ID)
4
5 (ID)
5
6 (ID)
6
C: Configuration error
Ie: intelligent module error
0=no error
1=error
b: bus fault or parity error
r: Out-of-range error
P: No user power error
f: Blown fuse error
t: Terminal block loose error
C-5

C (SM)
SMW22
SMW26:
C-9 SMW22, SMW24 SMW26
C-9 SMW22 SMW26
SM
SMW22
SMW24 RUN
SMW26 RUN
SMB28
SMB29:
C-10 SMB28 0 SMB29
1
C-10 SMB28 SMB29
SM
SMB28 0 STOP/RUN
SMB29 1 STOP/RUN
SMB30
SMB130:
SMB30 0 SMB130 1
SMB30 SMB130 C-11
C-6

C (SM)
C-11 SMB30
0 1
SMB30
SMB130
MSB
LSB
7 0
p p d b b b m m Freeport mode control byte
SM30.6
SM30.7
SM130.6
SM130.7
SM30.5 SM130.5 d
SM30.2
SM30.4
SM30.0
SM30.1
SM130.2
SM130.4
SM130.0
SM130.1
pp
bbb
00 =
01 =
10 =
11 =
0 = 8 /
1 = 7 /
000 = 38,400
001 = 19,200
010 = 9,600
011 = 4,800
100 = 2,400
101 = 1,200
110 = 600
111 = 300
mm
00 = - - (PPI/ )
01 =
10 = PPI/
11 = ( PPI/ )
mm = 10 (PPI ) PLC
NETR NETW PPI 2
7
SMB31 and SMW32:
(EEPROM)
V (EEPROM)
SMW32
SMB31 CPU (SM31.7
0) V
CPU
C-7

C (SM)
C-12 SMB31
SMW32
V
SM
C-12 SMB31 SMW32
SMB31:
Sofware
command
MSB
LSB
7 0
c 0 0 0 0 0 s s
SMB31:
Sofware
command
MSB
LSB
7 0
V memory address
SM31.0
SM31.1
ss:
00 =
01 =
10 =
11 =
SM31.7 c: (EEPROM)
0 =
1 =
CPU
SMW32 SMW32 V V0
(EEPROM)
SMB34
SMB35:
C-13 SMB34 0 1
5ms ~ 255ms 1ms
CPU
C-13 SMB34 SMB35
SM
SMB34 0 ( ms ms ms )
SMB35 1 ( ms ms ms )
C-8

C (SM)
SMB36 SMB65: HSC0, HSC1 HSC2
C-14 SMB36 SM65 HSC0 HSC1
HSC2
SM
C-14 SMB36 SMB65
SM36.0
SM36.4
SM36.5 HSC0 1
SM36.6 HSC0 1
SM36.7 HSC0 1
SM37.0
SM37.1
SM37.2
0= 1 =
0 = 4 X 1 = 1 X
SM37.3 HSC0 1
SM37.4 HSC0 1
SM37.5 HSC0 1 HSC0
SM37.6 HSC0 1 HSC0
SM37.7 HSC0 1
SMB38
SMB39
SMB40
SMB41
SMB42
SMB43
SMB44
SMB45
SM46.0
SM46.4
SM46.5
SM46.6
SM46.7
SM47.0
HSC0
SMB38
HSC0
SMB42
HSC1
HSC1
HSC1
HSC1
SMB41
SMB45
C-9

C (SM)
C-14 SMB36 SMB65
SM47.1 HSC1 0= 1=
SM47.2 HSC1 0= 1=1
SM47.3 HSC1 1=
SM47.4 HSC1 1=
SM47.5 HSC1 1= HSC1
SM47.6 HSC1 1= HSC1
SM47.7 HSC1 1=
SMB48
SMB49
SMB50
SMB51
SMB52
SMB55
SM56.0
SM56.4
HSC1
SMB48
HSC1
SMB52
SM56.5 HSC2 1=
SMB51
SMB55
SM56.6 HSC2 1=
SM56.7 HSC2 1=
SM57.0 HSC2 0= 1=
SM57.1 HSC2 0= 1=
SM57.2 HSC2 0= 1=
SM57.3 HSC2 1=
SM57.4 HSC2 1=
SM57.5 HSC2 1= HSC2
SM57.6 HSC2 1= HSC2
SM57.7 HSC2 1=
SMB58
SMB59
SMB60
SMB61
SMB62
SMB63
SMB64
SMB65
HSC2
SMB58
HSC2
SMB62
SMB61
SMB65
C-10

C (SM)
SMB66
SMB85: PTO/PWM
C-15 SMB66 SMB85 (PTO)
(PWM) 9.5
C-15 SMB66 SMB85
SM
SM66.0
SM66.3
SM66.4 PTO 0 0= 1= ( )
SM66.5 PTO 0 0 = 1 =
SM66.6 PTO 0 (
) 0= 1=
SM66.7 PTO 0 0=PTO 1=PTO
SM67.0 PTO 0/PWM 0 1=
SM67.1 PWM 0 1=
SM67.2 PTO 0 1=
SM67.3 PTO 0/PWM 0 0= µs 1= ms
SM67.4 PWM 0 0 = 1 =
SM67.5 PTO 0 0 = ( SM )
1 = ( V )
SM67.6 PTO 0/PWM 0 0 = PTO 1 = PWM
SM67.7 PTO 0/PWM 0 1 =
SMB68
SMB69
SMB70
SMB71
SMB72
SMB73
SMB74
SMB75
PTO 0/PWM 0 (2 ~ 65,535 )
SMB68
SMB69
PWM 0 (0 ~ 65,535 )
SMB70
SMB71
PTO 0 (1 ~ 2 32 -1) ;
SMB72
SMB75
SM76.0
SM76.3
SM76.4
SM76.5
PTO1 profile aborted;
0 = no error, 1 = aborted because of delta calculation error
PTO1 profile aborted;
0 = not aborted by user command, 1 = aborted by user command
C-11

C (SM)
C-15 SMB66 SMB85
SM
SM76.7 PTO1 0 = PTO 1 = PTO
SM77.0 PTO1/PWM1 1 =
SM77.1 PWM1 1 =
SM77.2 PTO1 1 =
SM77.3 PTO1/PWM1 0 = 1 µs 1 = 1 ms
SM77.4 PWM1
0 = 1 =
SM77.5 PTO1 0 = ( SM ) , 1 =
( V )
SM77.6 PTO1/PWM1 0 = PTO, 1 = PWM
SM77.7 PTO1/PWM1 1 =
SMB78
SMB79
SMB80
SMB81
SMB82
SMB83
SMB84
SMB85
PTO1/PWM1 (2 65,535 )
SMB78
SMB79
PWM1 (0 65,535 )
SMB80
SMB81
PTO1 (1 2 32 -1) ;
SMB82
SMB86 SMB94, SMB186 SMB194:
SMB85
C-16 SMB86 SMB94 SMB186 SMB194
C-16 SMB86 SMB94 SMB186 SMB194
0 1
SMB86
SMB186
MSB
LSB
7 0 Receive Message status byte
n r e 0 0 r cr p
n: 1=Receive message terminated by user disabie command
r: 1=Recive mdssage teminated: erro in input parameters or
Missing start or end condition
e: 1=End character received
t: 1=Recdive message terminated : temer expired
c: 1=Receive message terminated: maximum character counta
chieved
P: 1=Receive message teminated because of aparity error
C-12

C (SM)
C-16 SMB86 SMB94 SMB186 SMB194
0 1
SMB87
SMB187
MSB
LSB
7 0 Receive message control byte
n x y z m t bk 0
SMB88
SMB188
n: 0=R: eceive Message fumcion is disabled.
1=Receive Message funcition is enabled.
The enable/disable receive messagge biris checked each time the
RCV instruction is executed.
x: 0=lgnore SMBB188 .
1=Use the value of SMB88 or SMB188 to detect start of
message.
y: 0=lgnore SMB89 or SM189
1=Use the ualue of SMB89 or SMB189 otdetect end of
message.
z: 0=lgnore SMW90.
1=Use the value of SMW90 to detect an idle lind condition.
m: 0=Timer is an inter-character timer.
1=Timer is a message timer.
t: 0=lgnore SMW92 or SMW192.
1=Terminate receive if the time period in SMW92 or SMW192
is exceeded.
bk: 0=lgnore break conditions
1=Use break condition as start of message detection
The bits of the message interrupt control byte are used to define the
criteria by which the message is identified.Both start of message and
end of message criteria are defined.To determine the start of a
message,either of two sets of logically ANDed start of message
criteria must be true and must occur in sequence(idle line followed by
start character,or break followed by start character).To determine the
end of a message ,the enabled end of the message criteria is logically
Ored. The equations for start and stop criteria are given below:
Start of Message =if*sc+bk*sc
End of Message=ec+tmr+maximum character count reached
Programming the start of message criteria for:
1.Idle line detection:
il=1,sc=0,bk=0,SMW90>0
2.Start character detection: il=o,sc=1,bk=0,SMW90
is a don t care
3.Break Detection:
il=o,sc=1,bk=1,SMW90
is a don t care
4.Any response to a request: il=1,sc=0,bk=0,SMW90=0
(Message timer can be used to terminate receive of there is no
response.)
5.Break and a start character: il=o,sc=1,bk=1,SMW90
is a don t care
6.Idle line and a start character: il=1,sc=1,bk=0,SMW90>0
7.Idle line and a start character(Illegal): il=1,sc=1,bk=0,SMW90=0
Note:Receive will automatically be terminated by an overrun or a
parity error(if enabled).
C-13

C (SM)
C-16 SMB86 SMB94 SMB186 SMB194
SMB89
SMB90
SMB91
SMB92
SMB93
0 1
SMB189
SMB190
SMB191 SM90 ( SM190)
SM91 ( SM191)
SMB192
SMB193
/ ( )
SM92 ( SM192) SM93
( SM193)
SMB94 SMB194 (1 255 )
SMB98 and SMB99
C-17 SMB98 SMB99
C-17 SMB98 SMB99
SM
SMB98
SMB99
SMB98
1
C-14

C (SM)
SMB131 SMB165: HSC3, HSC4 HSC5
C-18 SMB131 SMB165 HSC3
HSC4 HSC5
C-18 SMB130 SMB165
SM
SMB131
SMB135
SM136.0
SM136.4
SM136.5 HSC3 1 =
SM136.6 HSC3 1 =
SM136.7 HSC3 1 =
SM137.0
SM137.2
SM137.3 HSC3 1 =
SM137.4 HSC3 1 =
SM137.5 HSC3 1 = HSC3
SM137.6 HSC3 1 = HSC3
SM137.7 HSC3 1 =
SM138
SM141
SM142
SM145
HSC3 SM138 SM141
HSC3 SM142 SM145
SM146.0
SM146.4
SM146.5 HSC4 1 =
SM146.6 HSC4 1 =
SM146.7 HSC4 1 =
SM147.0
0 = 1 =
SM147.1
SM147.2
0 = 4x 1 = 1x
SM147.3 HSC4 1 =
SM147.4 HSC4 1 =
SM147.5 HSC4 1 = HSC4
SM147.6 HSC4 1 = HSC4
SM147.7 HSC4 1 =
C-15

C (SM)
C-18 SMB130 SMB165
SM
SMB148
SMB151
SMB152
SMB155
HSC4 SM148 SM151
HSC4 SM152 SM155
SM156.0
SM156.4
SM156.5 HSC5 1 =
SM156.6 HSC5 1 =
SM156.7 HSC5 1 =
SM157.0
SM157.2
SM157.3 HSC5 1 =
SM157.4 HSC5 1 =
SM157.5 HSC5 1 = HSC5
SM157.6 HSC5 1 = HSC5
SM157.7 HSC5 1 =
SMB158
SMB161
SMB162
SMB165
HSC5 SM158 SM161
HSC5 SM162 SM165
SMB166
SMB194: PTO0, PT1 Profile Definition Table
C-19 SMB166 SMB194 are used to show the number of active
profile steps and the address of the profile table V .
C-19 SMB166 SMB194
SM
SMB166
PTO0
SMB167
SMB168
SMB169
PTO0 V ( V0 ) SM168
SMB170
SMB175
SMB176
PTO1
SMB177
SMB178
SMB179
PTO1 V ( V0 ) SM178
SMB180
SMB194
C-16

D S7-200
D
D-1 S7-200
•
•
•
•
•
• ( )
2.4
•
•
•
• CPU I/O
CPU SF (
) •
- 0003
- 0011
- 0012
•
- 0001 0009
•
- 0001 0010
B.1
• FOR NEXT
JMP LBL
•
- 2.3
- 24 VDC M
2.3
•
•
•
2.3
24 VDC M
5.2
D-1

S7 200
D-1 S7–200
(
PLC
PC/PPI
)
STEP 7-Micro/WIN 32
)
( PLC
• 2.3 7
• PC/PPI
•
RS–485–to–RS–485
B
D-2

E S7-200
E
CPU
CPU 221 DC/DC/DC 6 /4 6ES7 211-0AA20-0XB0
CPU 221 AC/DC/Relay 6 /4 6ES7 211-0BA20-0XB0
CPU 222 DC/DC/DC 8 /6 6ES7 212-1AB20-0XB0
CPU 222 AC/DC/Relay 8 /6 6ES7 212-1BB20-0XB0
CPU 224 DC/DC/DC 14 /10 6ES7 214-1AD20-0XB0
CPU 224 AC/DC/Relay 14 /10 6ES7 214-1BD20-0XB0
EM221 24 VDC 8 6ES7 221-1BF20-0XA0
EM222 24 VDC 8 6ES7 222-1BF20-0XA0
EM222 8 6ES7 222-1HF20-0XA0
EM223 24 VDC 8 /8 6ES7 223-1BH20-0XA0
EM223 24 VDC 8 /8 6ES7 223-1PH20-0XA0
MC 291, CPU 22x
6ES7 291-8GE20-0XA0
CC 292, CPU 22x / 6ES7 297-1AA20-0XA0
BC 293, CPU 22x
6ES7 291-8BA20-0XA0
, I/O , .8 , CPU 22x/EM 6ES7 290-6AA20-0XA0
, PC/PPI, , 5– 6ES7 901-3BF20-0XA0
STEP 7-Micro/WIN 32 (V3.0) ( ) 6ES7 810-2BA00-0YX0
STEP 7-Micro/WIN 32 (V3.0) ( ) 6ES7 810-2BA00-0YX3
STEP 7-Micro/WIN 32 (V3.0) (CD–ROM) 6ES7 810-2BC00-0YX0
STEP 7-Micro/WIN 32 (V3.0) (CD–ROM) 6ES7 810-2BC00-0YX3
MPI : AT ISA 6ES7 793-2AA01-0AA0
CP 5411: AT ISA 6GK1 541-1AA00
CP 5511: PCMCIA, Type II
6GK1 551-1AA00
CP 5611: PCI (3.0 ) 6GK1 561-1AA00
E-1

E S7 200
TD 200
6ES7 272-0AA00-8BA0
S7–200 – – ( / ) 6ES7 298-8GA00-8XH0
S7–200 ( ) 6ES7 298-8FA20-8AH0
S7–200 ( ) 6ES7 298-8FA20-8BH0
S7–200 ( ) 6ES7 298-8FA20-8CH0
S7–200 ( ) 6ES7 298-8FA20-8DH0
S7–200 ( ) 6ES7 298-8FA20-8EH0
MPI
6ES7 901-0BF00-0AA0
PROFIBUS
6XVI 830-0AH10
6ES7 972-0BB11-0XA0
( ) 6ES7 972-0BA11-0XA0
CPU 22x/EM 7 6ES7 292-1AD20-0AA0
CPU 22x/EM 12 6ES7 292-1AE20-0AA0
CPU 22x/EM 18 6ES7 292-1AG20-0AA0
RS–485 35° 6ES7 972-0BA40-0XA0
RS–485 IP 20
6ES7 972-0AA00-0XA0
TD 200
OP3
OP7
OP17
6ES7 272-0AA00-0YA0
6AV3 503-1DB10
6AV3 607-1JC20-0AX1
6AV3 617-1JC20-0AX1
DIN
6ES5 728-8MAll
12– (CPU 221, CPU 222) 10– 6ES7 290-2AA00-0XA0
4 CPU 221/222 EM22x 12
CPU 224 18 EM 22x 7 CPU EM
6ES7 291-3AX20-0XA0
E-2

F
STL
F
4)
( ON 1) STL ( F-
( ON 1) CPU
( OFF 0)
F-1 ( OFF 0) STL
S7 200 CPU
F-1
S7–200 CPU
STL 3 µs
STL ( F-4)
F-2
F-2
S7–200 CPU
22 µs
F-1

F
STL
( AI AQ L ) F-3
F-3
S7–200 CPU
(AI) 149 µs
(AQ) 73 µs
(L) 5.4 µs
(AC) 4.4 µs
STL
F-4 S7–200 CPU STL
F-4 STL ( µs)
= I
L
SM, T, C, V, S, Q, M
+D 55
-D 55
*D 92
0.37
19.2
1.8
/D 376
+I 46
-I 47
*I 71
/I 115
=I 29
39
+R 110
163
-R 113
166
*R 100
130
/R 300
360
S7–200 CPU
(µs)
F-2

F
STL
F-4 STL ( µs)
A I
L
SM, T, C, V, S, Q, M
AB < =, =, >=, >, =, >, , =, >,

F
STL
F-4 STL ( µs)
CALL
15
S7–200 CPU
(µs)
=
+ ( )
( )
( )
( )
( )
CRET =
+ ( )
( )
( )
( )
( )
CRETI 23
CTD 48
36
CTU 53
35
CTUD 64
45
DECB 30
DECD 42
DECO 36
DECW 37
DISI 18
DIV 119
DTCH 18
DTR 60
70
ED 15
ENCO 39
43
END 0.9
ENI 53
EU 15
FIFO = + (LM) ( )
(LM)
32
23
21
24
27
13
21
14
18
20
109
14
F-4

F
STL
F-4 STL ( µs)
FILL = + (LM) ( )
( )
( )
(LM)
FND , = + (LM) ( )
(LM)
FOR = + (LM) ( )
(LM)
HDEF 35
HSC 37
HTA = + (LM) ( )
( )
( )
(LM)
156
165
7
224
12
73
72
175
184
11
IBCD 114
INCB 29
INCD 42
INCW 37
INT 1 47
INVB 31
INVD 42
INVW 38
JMP 0.9
LBL 0.37
LD : I
L
SM, T, C, V, S, Q, M
SM0.0
LDB =, >, , ,

F
STL
F-4 STL ( µs)
LDW =, >, =, >, =, >, , =, >,

F
STL
F-4 STL ( µs)
PID
PID (K c

F
STL
F-4 STL ( µs)
RRB = + (LM) ( )
(LM)
RRD = + (LM) ( )
(LM)
RRW = + (LM) ( )
(LM)
S =1 ( S V0.2,1)
= + (LM) ( )
(LM)
42
0.6
52
2.5
49
1.7
5
27
0.9
29
S7–200 CPU
(µs)
SBR 0
SCRE 0.37
SCRT 17
SEG 30
SHRB = + (LM) ( )
(LM)
SI = + (LM) ( )
(LM) ( )
(LM) ( )
SLB = + (LM) ( )
(LM)
SLD = + (LM) ( )
(LM)
SLW = + (LM) ( )
(LM)
140
1.6
SQRT 725
830
SRB = + (LM) < ( )
(LM)
18
22
32
30
43
0.7
53
2.6
51
1.3
43
0.7
F-8

F
STL
F-4 STL ( µs)
SRD = + (LM) ( )
(LM)
SRW = + (LM) ( )
(LM)
STOP 16
SWAP 32
TODR 2400
TODW 1600
TOF 64
TON 64
TONR 56
TRUNC 103
178
WDR 16
XMT 113
XORB 37
XORD 55
XORW 48
53
2.6
51
1.3
S7–200 CPU
(µs)
F-9

G S7-200
G
•
•
• S7–200 CPU
• HSC0, HSC1, HSC2, HSC3, HSC4, HSC5
• S7–200
G-1
SM0.0 1 SM1.0 = 0
SM0.1 1 SM1.1
SM0.2 1 SM1.2
SM0.3 RUN 1 SM1.3 0
SM0.4 30 s / 30 s SM1.4
SM0.5 0.5 s / 0.5 s SM1.5
SM0.6 1 /
1
SM1.6
BCD
SM0.7 RUN 1 SM1.7 ASCII
G-1

G S7 200
G-2
8 0: 0
9 0: 0
23 0: ( )
0
24 1: 1
25 1: 1
26 1:
1
0 I0.0 ( )
0
2 I0.1 1
4 I0.2 2
6 I0.3 3
1 I0.0 4
3 I0.1 5
5 I0.2 6
7 I0.3 7
12 HSC0 CV=PV ( = ) 0
27 HSC0 16
28 HSC0 /Z 2
13 HSC1 CV=PV ( = ) 8
14 HSC1 9
15 HSC1 10
16 HSC2 CV=PV ( = ) 11
17 HSC2 12
18 HSC2 13
32 HSC3 CV=PV ( = ) 1
29 HSC4 CV=PV ( = ) 3
30 HSC4 17
31 HSC4 /Z 18
33 HSC5 CV=PV ( = ) 19
19 PTO 0 14
20 PTO 1
15
10 0 ( )
0
11 1 1
21 T32 CT=PT 2
22 T96 CT=PT
3
G-2

G S7 200
G-3 S7–200 CPU
( )
( )
ms
y
CPU 221 CPU 222 CPU 224
2 K 2 K 4 K
1 K 1 K 2.5 K
I0.0 - I15.7 I0.0 - I15.7 I0.0 - I15.7 Ix.y IBx IWx IDx
Q0.0 - Q15.7 Q0.0 - Q15.7 Q0.0 - Q15.7 Qx.y QBx QWx QDx
-- AIW0 - AIW30 AIW0 - AIW30 AIWx
-- AQW0 - AQW30 AQW0-AQW30 AQWx
(V) 1 VB0.0 -
VB2047.7
VB0.0 -
VB2047.7
VB0.0 -
VB5119.7
Vx.y VBx VWx VDx
(L) 2 LB0.0 – LB63.7 LB0.0 - LB63.7 LB0.0 - LB63.7 Lx.y LBx LWx LDx
(M) M0.0 - M31.7 M0.0 - M31.7 M0.0 - M31.7 Mx.y MBx MWx MDx
(SM)
1ms
10 ms
100 ms
/ 1 ms
/ 10 ms
/ 100
SM0.0 -
SM179.7
SM0.0 – SM29.7
256 (T0 – T255)
T0, T64
T1 - T4,
T65 - T68
T5 - T31,
T69 - T95
T32, T96
T33 - T36,
T97 - T100
T37 - T63,
T101 - T255
SM0.0 -
SM179.7
SM0.0 - SM29.7
256 (T0 - T255)
T0, T64
T1 - T4,
T65 - T68
T5 - T31,
T69 - T95
T32, T96
T33 - T36,
T97 - T100
T37 - T63,
T101 - T255
SM0.0 -
SM179.7
SM0.0 -
SM29.7
256 (T0 - T255)
T0, T64
T1 - T4,
T65 - T68
T5 - T31,
T69 - T95
T32, T96
T33 - T36,
T97 - T100
T37 - T63,
T101 - T255
SMx.y SMBx SMWx SM
Dx
C0 - C255 C0 - C255 C0 - C255 Cx Cx
HC0, HC3. HC4,
HC5
HC0, HC3, HC4,
HC5
HC0 - HC5
(S) S0.0 - S31.7 S0.0 - S31.7 S0.0 - S31.7 Sx.y SBx SWx SDx
AC0 - AC3 AC0 - AC3 AC0 - AC3 ACx ACx ACx
/ 0 – 255 0 - 255 0 - 255
/ 0 – 63 0 - 63 0 - 63
PID 0 – 7
0 – 127 0 - 127 0 - 127
0
0 - 7
1 V
2 LB60 LB63 STEP 7-Micro/WIN 32 V3.0
0
0 - 7
0
Tx
Tx
HCx
G-3

G S7 200
G-4 HSC0, HSC3, HSC4, HSC5
HSC0 HSC3 HSC4 HSC5
I0.0 I0.1 I0.2 I0.1 I0.3 I0.4 I0.5 I0.4
0 - - - -
1 - - - -
2 - - - - - - - -
3 - - - -
4 - -
5 - - - - - - - -
6 - - - -
7 - -
8 - - - - - - - -
9 A B - - A B - -
10 A B - A B -
11 - - - - - - - -
G-5 HSC1 HSC2
HSC1
HSC2
I0.6 I0.7 I1.0 I1.1 I1.2 I1.3 I1.4 I1.5
0 - - - - - -
1 - - - -
2 - -
3 - - - -
4 - -
5
6 - - - -
7 - -
8
9 A B - - A B - -
10 A B - A B -
11 A B A B
G-4

G S7 200
LD
LDI
LDN
LDNI
A
AI
AN
ANI
O
OI
ON
ONI
LDBx
N
N
N
N
N
N
N
N
N
N
N
N
N1, N2
ABx N1, N2
OBx N1, N2
LDWx N1, N2
AWx N1, N2
OWx N1, N2
LDDx
N1, N2
ADx N1, N2
ODx N1, N2
LDRx
N1, N2
ARx N1, N2
ORx N1, N2
NOT
EU
ED
= N
=I N
S
R
SI
RI
S_BIT, N
S_BIT, N
S_BIT, N
S_BIT, N
N1 (x:, )
N2
N1 (x:, )
N2
N1 (x:, )
N1 (x:, )
N1 (x:, )
N1 (x:, )
N1 (x:, )
N1 (x:, )
N1 (x:, )
N1 (x:, )
N1 (x:, )
N1 (x:, )
N2
N2
N2
N2
N2
N2
N2
N2
N2
N2
+I IN1, OUT
+D IN1, OUT
+R IN1, OUT
-I IN1, OUT
-D IN1, OUT
-R IN1, OUT
MUL IN1, OUT
*R IN1, OUT
*D, *I IN1, OUT
DIV IN1, OUT
/R IN1, OUT
/D, /I IN1, OUT
SQRT
IN, OUT
INCB OUT
INCW OUT
INCD
DECB
OUT
OUT
DECW OUT
DECD OUT
PID Table, Loop PID
TON Txxx, PT
TOF Txxx, PT
TONR Txxx, PT
CTU
Cxxx, PV
CTD Cxxx, PV
CTUD Cxxx, PV /
TODR T
TODW T
END
IN1+OUT=OUT
OUT-IN1=OUT
IN1 * OUT = OUT
IN1 / OUT = OUT
STOP STOP
WDR (300 ms)
JMP
LBL
CALL
CRET
FOR
NEXT
LSCR
SCRT
SCRE
N
N
N [N1,...]
INDX,INIT,
FINAL
N
N
SBR
For/Next
1
1
[N1, ... 16
]
G-5

G S7 200
MOVB IN, OUT
MOVWIN, OUT
MOVD IN, OUT
MOVR IN, OUT
BMB IN, OUT, N
BMW IN, OUT, N
BMD
SWAP IN
IN, OUT, N
SHRB DATA, S_BIT,
N
SRB
SRW
SRD
SLB
SLW
SLD
RRB
RRW
RRD
RLB
RLW
RLD
FILL
ALD
OLD
LPS
LRD
LPP
LDS
OUT, N
OUT, N
OUT, N
OUT, N
OUT, N
OUT, N
OUT, N
OUT, N
OUT, N
OUT, N
OUT, N
OUT, N
IN, OUT, N
AENO ENO
ANDB IN1, OUT
ANDW IN1, OUT
ANDD IN1, OUT
ORB
ORW
ORD
IN1, OUT
IN1, OUT
IN1, OUT
XORB IN1, OUT
XORW IN1, OUT
XORD IN1, OUT
INVB
INVW
INVD
OUT
OUT
OUT
(1 )
( )
( )
( )
( )
ATT
LIFO
FIFO
TABLE,DATA
TABLE,DATA
TABLE,DATA
FND= SRC,PATRN,
INDX
FNDSRC,PATRN,
INDX
FND< SRC,PATRN,
INDX
FND> SRC,PATRN,
INDX
BCDI
IBCD
BTI
ITB
ITD
DTI
OUT
OUT
IN, OUT
IN, OUT
IN, OUT
IN, OUT
DTR IN, OUT
TRUNCIN, OUT
ROUND IN, OUT
ATH
HTA
ITA
DTA
RTA
IN, OUT, LEN
IN, OUT, LEN
IN, OUT, FMT
IN, OUT, FM
IN, OUT, FM
DECO IN, OUT
ENCO IN, OUT
BCD
SEG IN, OUT 7
CRETI
ENI
DISI
ATCH
DTCH
XMT
RCV
INT, EVENT
EVENT
TABLE,PORT
TABLE,PORT
NETR TABLE,PORT
NETW TABLE,PORT
HDEF
HSC
PLS
HSC, Mode
N
X
BCD
Convert Byte to Integer
Convert Integer to Byte
ASCII 16
16 ASCII
ASCII
ASCII
ASCII
G-6