Xilinx UG773 LogiCORE IP 10-Gigabit Ethernet MAC v11.1, User ...
Xilinx UG773 LogiCORE IP 10-Gigabit Ethernet MAC v11.1, User ...
Xilinx UG773 LogiCORE IP 10-Gigabit Ethernet MAC v11.1, User ...
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Chapter 4: Customizing and Generating Core<br />
Component Name<br />
For general help starting and using CORE Generator software on your development<br />
system, see the documentation supplied with your <strong>Xilinx</strong> ISE® software.<br />
The component name is used as the base name of the output files generated for the core.<br />
Names must begin with a letter and must be composed from the following characters: a<br />
through z, 0 through 9 and “_” (underscore).<br />
Statistics Gathering<br />
This checkbox selects whether the statistics counters will be included in the generated core.<br />
This option is only available if the Management Interface option is selected. The default is<br />
to have statistics counters included.<br />
Management Interface<br />
Physical Interface<br />
Select this option to include the Management Interface in the generated core. Deselect this<br />
option to remove the Management Interface and expose a simple bit vector to manage the<br />
core.<br />
The default is to have the Management Interface included.<br />
The physical interface section has a choice of two selections; XGMII, which implements the<br />
32-bit DDR interface to the physical layer, and Internal, which selects the internal 64-bit<br />
SDR interface to the physical layer.<br />
Note: On Spartan®-6 devices, only the internal 64-bit interface is supported.<br />
38 www.xilinx.com <strong>10</strong>-<strong>Gigabit</strong> <strong>Ethernet</strong> <strong>MAC</strong> <strong>User</strong> Guide<br />
<strong>UG773</strong> March 1, 2011