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ARM Software reference manual

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Contents<br />

1. Architectural description<br />

1<br />

1.1 Introduction<br />

1<br />

1.2 Programmer's model<br />

1<br />

1.2.1 Memory organisation<br />

2<br />

1.3 Registers<br />

2<br />

1.4 Modes<br />

4<br />

1.4.1 Mode 0<br />

5<br />

1.4.2 Mode 1<br />

5<br />

1.4.3 Mode 2<br />

5<br />

1.4.4 Mode 3<br />

6<br />

2. Instruction set<br />

7<br />

2.1 Branch and branch with link<br />

7<br />

2.1.1 Assembler syntax 9<br />

2.2 Data processing 9<br />

2.2.1 Data processing on registers<br />

13<br />

22.2 Data processing with register and immediate operand 16<br />

2.2.3 Changing modes.<br />

17<br />

2.3 Single data transfer group<br />

18<br />

2.3.1 [Rn, off] is a pre-indexing addressing mode<br />

20<br />

2.3.2 [Rn,Rm] is a pre-indexed addressing mode 20<br />

233 [Rn],off is a post-indexed addressing mode<br />

20<br />

2.3.4 [Rn],Rm is a post-indexed addressing mode<br />

21<br />

2.4 Block data transfer<br />

22<br />

2.4.1 Assembler syntax<br />

24<br />

2.5 Supervisor calls<br />

25<br />

3. Interrupts<br />

27<br />

3.1 Reset<br />

27<br />

3.2 Address exception trap<br />

28<br />

3.3 Abort<br />

28<br />

3.4 FIQ<br />

29<br />

3.5 IRQ<br />

30<br />

3.6 Undefined instruction trap 30<br />

3.7 <strong>Software</strong> interrupt<br />

30<br />

4. Appendix A 32<br />

4.1 Instruction speeds<br />

32<br />

5. Appendix B<br />

34<br />

iv <strong>ARM</strong> software

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