A CCSDS-Based Communication System for a Single Chip On ...

packets from the Data Field of the TLM frames; decode the CRC and if no error is detected, the
raw TLM data is passed to be analysed and displayed. The functions of the spacecraft segment
are to format CCSDS TLM packets; format CCSDS TLM frames; insert TLM packets into the
Data Field of the TLM frames; calculate the CCSDS recommended Cyclic Redundancy Check
(CRC) cyclic code of the frame inserted at the end of TLM frames; format the Attached
Synchronized Marker (ASM); implement R-S or Turbo encoding; receive and decode CCSDS
TC frames; detect whether a transmission bit error has been identified by the BCH code. If
there is no error, the telecommand will be passed to the on-board Controller Area Network
(CAN) bus and accepted by the corresponding CAN node. The TC retransmission system
utilises the COP-1 "go-back-n" automatic retransmission protocol, which consists of the pair of
synchronized procedures, FOP (in the ground segment) and FARM (in the spacecraft segment).
The FOP transmits TC transfer frames to the FARM. The FARM returns Command Link
Control Words (CLCW) within the TLM transfer frames.
The experimental set-up for the simulation of the CCSDS communication system consists of a
XILINX Virtex 800 FPGA prototyping board supporting the on-board operation and a personal
computer (PC), supporting the ground operation. The on-board segment will be run by the
RSC-OBC. An on-board CAN bus system will be used to verify the validity of the whole
system. The CAN interface is implemented as a VHDL IP core and is integrated with the
LEON processor IP core. An external CAN card will take responsibilities of an on-board
payload which will generate TLM data and receive TC data. The CCSDS TLM encoder and
decoder are provided by the European Space Agency (ESA). The encoder is implemented in
software which will run on the RSC-OBC. The decoder will be implemented as a VHDL core
in a XILINX FPGA. The RSC-OBC will communicate with the PC via an asynchronous RS-
232 serial port.
The paper will be structured in the following way. The CCSDS end-to-end link model will be
overviewed and its TLM and TC simulation models will be presented. The CCSDS software
structure and interfaces will be illustrated. An approach to the simulation of the CCSDS
communication will be outlined. Finally, simulation results will be presented and illustrated.
Refrences:
1. D.Zheng, T.Vladimirova, H.Tiggeler, Prof. Martin Sweeting. “Reconfigurable Single-Chip
On-Board Computer for a Small Satellite”, 52nd International Astronautical Congress,
Toulouse, France, October 1-5, 2001, IAF-01-U3.09.
2. H.Tiggeler, T.Vladimirova, D.Zheng. “A System-on-a-Chip for Small Satellite Data
Processing and Control”, Proceedings of Military and Aerospace Applications of
Programmable Devices and Technologies International Conference (MAPLD’2000), P20,
September 2000, Laurel, Maryland US, NASA.
3. I. Rutter, T.Vladimirova, H.Tiggeler.“A CCSDS Software System for a Single-Chip On-
Board Computer of a Small Satellite”, AIAA Small Satellites Conference, 2001, SSC01-
VI-4.
2