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Microsystem technology (MST) - Geert's pages

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More Moore: the Brains<br />

Product Half-Pitch, Gate-Length<br />

(nm)<br />

10000.0<br />

1000.0<br />

100.0<br />

10.0<br />

1.0<br />

hp<br />

5760<br />

2005 ITRS Product Technology Trends -<br />

Half-Pitch, Gate-Length<br />

3-year<br />

Node Cycle<br />

hp<br />

4080<br />

hp<br />

2880<br />

Scenario D:<br />

2-year Node Cycle:<br />

DRAM from 1998-2004<br />

Flash from 2004-2008<br />

hp<br />

2040<br />

hp<br />

1440<br />

Samsung “60nm”<br />

8Gbit/0.008u2/bit[MLC];<br />

Est. 4Gbit 0.016u2/cell[SLC]<br />

Intro/2004; est. Prod/2005-7<br />

hp<br />

1020<br />

hp<br />

720<br />

hp<br />

510<br />

2-year<br />

Node Cycle<br />

hp<br />

360<br />

DRAM 1/2 Pitch[Sc.C]<br />

MPU M1 1/2 Pitch[Sc.C]<br />

Flash Poly 1/2 Pitch[NEW Sc.C]<br />

Flash Poly 1/2 Pitch[NEW Sc.D]<br />

MPU Gate Length - Printed<br />

MPUGate Length - Physical<br />

Past Future<br />

[Proposal]<br />

1970 1975 1980 1985 1990 1995 2000 2005 2010 2015 2020<br />

Year of Production<br />

hp<br />

255<br />

hp<br />

180<br />

hp<br />

130<br />

hp<br />

90<br />

hp<br />

90<br />

1-year<br />

Node Cycle<br />

hp<br />

65<br />

hp<br />

45<br />

3-year<br />

Node Cycle<br />

2005-2020 ITRS Range<br />

2005 ITRS Flash<br />

Proposal:<br />

Scenario C =<br />

Catch DRAM<br />

@ 2004/90nm;<br />

then 3-yr cycle<br />

Scenario D =<br />

Cross-over DRAM<br />

@ 2004/90nm;<br />

then 2-yr cycle<br />

to 2006/65nm<br />

and 2008/45nm;<br />

then 3-yr cycle<br />

hp65 hp45 hp32 hp22 hp16 Scenario C: 3(thru 250nm)-2(thru 90nm)-3<br />

hp32 hp22 hp16 hp11 Scenario D: 3(thru 250nm)-2(thru 45nm)-3<br />

Courtesy Alan Allan, IRC/ITRS<br />

6

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