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5<br />

5<br />

4<br />

4<br />

3<br />

VIO_1V8<br />

3.3V<br />

U9<br />

74AVCB324245ZKER<br />

1006600<br />

D<br />

L4<br />

F4<br />

C4<br />

P4<br />

VCCA<br />

VCCA<br />

VCCA<br />

VCCA<br />

VCCB<br />

VCCB<br />

VCCB<br />

VCCB<br />

L3<br />

C3<br />

P3<br />

F3<br />

RS8<br />

3.3V_A<br />

D<br />

4 uP_nCS1<br />

DGND<br />

A4<br />

H4<br />

J4<br />

T4<br />

1OE<br />

2OE<br />

3OE<br />

4OE<br />

PLACE C17 NEAR PIN 2<br />

3.3V 0<br />

1006711<br />

0402 20mil Short<br />

C14<br />

10000pF<br />

10<strong>01</strong>329<br />

C15<br />

10000pF<br />

10<strong>01</strong>329<br />

C16<br />

10uF<br />

1005620<br />

2,4 BUFF_DIR_DATA<br />

2,4,5 uP_D[0:15]<br />

A3<br />

H3<br />

J3<br />

T3<br />

1DIR<br />

2DIR<br />

3DIR<br />

4DIR<br />

H = A->B<br />

L = B->A<br />

C12<br />

10000pF<br />

10<strong>01</strong>329<br />

C13<br />

10000pF<br />

10<strong>01</strong>329<br />

C18<br />

10000pF<br />

10<strong>01</strong>329<br />

C17<br />

10uF<br />

1005620<br />

DGND<br />

3.3V_A ETHER_TX+, ETHER_TX- AND<br />

C<br />

2,5,7,8,10 SYS_nRESWARM<br />

2,4,5 uP_nOE<br />

2,4,5 uP_nWE<br />

2,4,5 uP_A[1:10]<br />

uP_D0<br />

uP_D1<br />

uP_D2<br />

uP_D3<br />

uP_D4<br />

uP_D5<br />

uP_D6<br />

uP_D7<br />

uP_D8<br />

uP_D9<br />

uP_D10<br />

uP_D11<br />

uP_D12<br />

uP_D13<br />

uP_D14<br />

uP_D15<br />

uP_A10<br />

uP_A1<br />

uP_A2<br />

uP_A3<br />

uP_A4<br />

uP_A5<br />

uP_A6<br />

uP_A7<br />

A5<br />

A6<br />

B5<br />

B6<br />

C5<br />

C6<br />

D5<br />

D6<br />

E5<br />

E6<br />

F5<br />

F6<br />

G5<br />

G6<br />

H6<br />

H5<br />

J5<br />

J6<br />

K5<br />

K6<br />

L5<br />

L6<br />

M5<br />

M6<br />

N5<br />

N6<br />

P5<br />

P6<br />

R5<br />

R6<br />

T6<br />

T5<br />

R3<br />

R4<br />

N3<br />

N4<br />

M3<br />

M4<br />

K3<br />

K4<br />

1A1<br />

1A2<br />

1A3<br />

1A4<br />

1A5<br />

1A6<br />

1A7<br />

1A8<br />

2A1<br />

2A2<br />

2A3<br />

2A4<br />

2A5<br />

2A6<br />

2A7<br />

2A8<br />

3A1<br />

3A2<br />

3A3<br />

3A4<br />

3A5<br />

3A6<br />

3A7<br />

3A8<br />

4A1<br />

4A2<br />

4A3<br />

4A4<br />

4A5<br />

4A6<br />

4A7<br />

4A8<br />

GND<br />

GND<br />

GND<br />

GND<br />

GND<br />

GND<br />

GND<br />

GND<br />

1B1<br />

1B2<br />

1B3<br />

1B4<br />

1B5<br />

1B6<br />

1B7<br />

1B8<br />

2B1<br />

2B2<br />

2B3<br />

2B4<br />

2B5<br />

2B6<br />

2B7<br />

2B8<br />

3B1<br />

3B2<br />

3B3<br />

3B4<br />

3B5<br />

3B6<br />

3B7<br />

3B8<br />

4B1<br />

4B2<br />

4B3<br />

4B4<br />

4B5<br />

4B6<br />

4B7<br />

4B8<br />

GND<br />

GND<br />

GND<br />

GND<br />

GND<br />

GND<br />

GND<br />

GND<br />

A2<br />

A1<br />

B2<br />

B1<br />

C2<br />

C1<br />

D2<br />

D1<br />

E2<br />

E1<br />

F2<br />

F1<br />

G2<br />

G1<br />

H1<br />

H2<br />

J2<br />

J1<br />

K2<br />

K1<br />

L2<br />

L1<br />

M2<br />

M1<br />

N2<br />

N1<br />

P2<br />

P1<br />

R2<br />

R1<br />

T1<br />

T2<br />

D4<br />

D3<br />

B4<br />

B3<br />

E4<br />

E3<br />

G4<br />

G3<br />

uP_MD0<br />

uP_MD1<br />

uP_MD2<br />

uP_MD3<br />

uP_MD4<br />

uP_MD5<br />

uP_MD6<br />

uP_MD7<br />

uP_MD8<br />

uP_MD9<br />

uP_MD10<br />

uP_MD11<br />

uP_MD12<br />

uP_MD13<br />

uP_MD14<br />

uP_MD15<br />

uP_nMCS1<br />

uP_nMRESET<br />

uP_nMOE<br />

uP_nMWE<br />

uP_MA10<br />

uP_MA1<br />

uP_MA2<br />

uP_MA3<br />

uP_MA4<br />

uP_MA5<br />

uP_MA6<br />

uP_MA7<br />

DGND<br />

uP_MA1<br />

uP_MA2<br />

uP_MA3<br />

uP_MA4<br />

uP_MA5<br />

uP_MA6<br />

uP_MA7<br />

uP_MD0<br />

uP_MD1<br />

uP_MD2<br />

uP_MD3<br />

uP_MD4<br />

uP_MD5<br />

uP_MD6<br />

uP_MD7<br />

uP_MD8<br />

uP_MD9<br />

uP_MD10<br />

uP_MD11<br />

uP_MD12<br />

uP_MD13<br />

uP_MD14<br />

uP_MD15<br />

12<br />

11<br />

10<br />

9<br />

8<br />

7<br />

6<br />

36<br />

35<br />

34<br />

33<br />

32<br />

31<br />

29<br />

28<br />

27<br />

26<br />

25<br />

23<br />

22<br />

21<br />

20<br />

19<br />

A1<br />

A2<br />

A3<br />

A4<br />

A5<br />

A6<br />

A7<br />

D0<br />

D1<br />

D2<br />

D3<br />

D4<br />

D5<br />

D6<br />

D7<br />

D8<br />

D9<br />

D10<br />

D11<br />

D12<br />

D13<br />

D14<br />

D15<br />

U10<br />

LAN9211<br />

TPO+<br />

TPO-<br />

TPI+<br />

TPI-<br />

GPIO0_LED1#<br />

GPIO1_LED2#<br />

GPIO2_LED3#<br />

EECLK/GPO4<br />

EEDIO/GPO3<br />

EECS<br />

IRQ<br />

45<br />

44<br />

48<br />

47<br />

3<br />

4<br />

5<br />

40<br />

38<br />

39<br />

43<br />

ETHER_RX+/ETHER_RX-<br />

SHOULD BE ROUTED AS<br />

R9<br />

R10 R11 R12<br />

49.9 49.9 49.9 49.9 DIFFERENTIAL PAIRS.<br />

1%<br />

1%<br />

1%<br />

1%<br />

1002435 1002435 1002435 1002435<br />

ETHER_TX+ 2<br />

ETHER_TX- 2<br />

ETHER_RX+ 2<br />

ETHER_RX- 2<br />

SPD_LED_n100M_10M/LAN_LED1 2<br />

U11<br />

ACT_nLNK_LED/LAN_LED2 2<br />

AT93C46<br />

AT93C46-10TU-2.7 3.3V<br />

10<strong>01</strong>6<strong>01</strong><br />

EECLK<br />

EE_CS<br />

1<br />

8<br />

EEDIO<br />

EECLK<br />

CS VCC<br />

2<br />

7<br />

EE_CS<br />

EEDIO<br />

SK DC<br />

3<br />

DI ORG<br />

6<br />

4 5<br />

VIO_1V8<br />

DO GND<br />

R13<br />

1.0K<br />

DGND<br />

R14<br />

10<strong>01</strong>337<br />

4.75K<br />

5%<br />

IRQ MUST BE SETUP 1%<br />

AS OPEN DRAIN<br />

1002429<br />

WLAN_nIRQ 10<br />

C<br />

DGND<br />

DGND<br />

B NC<br />

14<br />

B<br />

R15<br />

1.0M 5%<br />

10<strong>01</strong>340<br />

55<br />

XTAL1<br />

NOTE: PLACE Y1 NEAR U10 TO<br />

MINIMIZE TRACE LENGTHS,<br />

AVOID NOISY AREAS OF PCB,<br />

PLACE OVER GROUND PLANE<br />

C22<br />

22pF<br />

1002395<br />

1<br />

3<br />

2 4<br />

DGND DGND<br />

NEED TO REPLACE<br />

WITH AGILE PART<br />

Y1<br />

25MHz<br />

ECS-250-20-33-A-E-L-TR<br />

1008355<br />

C23<br />

22pF<br />

1002395<br />

uP_nMRESET<br />

uP_nMOE<br />

uP_nMWE<br />

uP_nMCS1<br />

uP_MA10<br />

DGND<br />

R16<br />

12.4k<br />

1%<br />

1003838<br />

15<br />

16<br />

17<br />

A A<br />

3<br />

42<br />

13<br />

54<br />

50<br />

53<br />

RESET#<br />

RD#<br />

WR#<br />

CS#<br />

FIFO_SEL<br />

XTAL2<br />

VDD_A18<br />

EXRES1<br />

37<br />

2<br />

VDD_CORE_1.8V<br />

VDD_CORE_1.8V<br />

VSS<br />

57<br />

DGND<br />

1<br />

56<br />

18<br />

24<br />

30<br />

VDD_IO<br />

VDD_IO<br />

VDD_IO<br />

VDD_IO<br />

VDD_IO<br />

51<br />

49<br />

46<br />

VDD_A33<br />

VDD_A33<br />

VDD_A33<br />

PME<br />

AMDIX_EN<br />

41<br />

52<br />

2<br />

2<br />

Title OMAP34340 SOM<br />

Number 1007969<br />

1<br />

06 - WIRED LAN<br />

Rev<br />

LOGIC PRODUCT<br />

DEVELOPMENT<br />

4<br />

1<br />

411 WASHINGTON AVE. N<br />

MINNEAPOLIS, MN 554<strong>01</strong><br />

PHONE: (612) 672-9495<br />

FAX: (612) 672-9489<br />

Project OMAP3430-10<br />

Sheet 6 Of 12

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