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Universität Stuttgart<br />

<strong>Institut</strong> für <strong>Automatisierungs</strong>- <strong>und</strong> Softwaretechnik<br />

Prof. Dr.-Ing. Dr. h. c. P. Göhner<br />

Laboratory Course<br />

Industrial Automation<br />

Experiment Nr. 6<br />

Introduction to the <strong>FlexRay</strong> bus system<br />

<strong>FlexRay</strong> Basics


<strong>Gr<strong>und</strong>lagen</strong> <strong>FlexRay</strong> BasicsV 1.1 2<br />

Dokument Versionsverwaltung<br />

Version Autor QS Datum Status Änderungen<br />

0.1 Bäurle Pe 05.06.2011 in Bearb. Erstellung<br />

1.0 Bäurle Pe 09.06.2011 vorgelegt<br />

1.0 Bäurle Pe 21.06.2011 akzeptiert<br />

1.1 Koch Ya 12.10.2012 akzeptiert Überarbeitung<br />

Table of contents<br />

TABLE OF CONTENTS ......................................................................................................... 2<br />

ABBREVIATIONS .................................................................................................................. 3<br />

NAME CONVENTIONS ......................................................................................................... 6<br />

GLOSSARY .............................................................................................................................. 7<br />

1 FLEXRAY ....................................................................................................................... 10<br />

1.1 MOTIVATION ......................................................................................................................................... 10<br />

1.2 REQUIREMENTS AND PROPERTIES .......................................................................................................... 10<br />

2 TECHNICAL BASICS .................................................................................................. 12<br />

2.1 OSI-MODEL .......................................................................................................................................... 12<br />

2.2 STRUCTURE OF A COMMUNICATION NODE ............................................................................................. 12<br />

2.3 TERMINATION OF NODES ....................................................................................................................... 15<br />

2.4 PHYSICAL TOPOLOGY ............................................................................................................................ 17<br />

2.5 SIGNAL TRANSMISSION .......................................................................................................................... 20<br />

2.6 WAKEUP ................................................................................................................................................ 22<br />

2.7 STARTUP ............................................................................................................................................... 23<br />

2.8 SYNCHRONIZATION ............................................................................................................................... 25<br />

2.9 RE-SYNCHRONIZATION (BIT-SYNCHRONIZATION) ................................................................................ 27<br />

2.10 TIMING .................................................................................................................................................. 30<br />

2.11 COMMUNICATION STRUCTURE .............................................................................................................. 32<br />

2.11.1 <strong>FlexRay</strong> Cycle .................................................................................................... 32<br />

2.11.2 Bus access .......................................................................................................... 32<br />

2.11.3 Static segment .................................................................................................... 33<br />

2.11.4 Dynamic segment ............................................................................................... 33<br />

2.11.5 Symbol Window ................................................................................................. 34<br />

2.11.6 Network Idle Time ............................................................................................. 35<br />

2.12 FRAME FORMAT..................................................................................................................................... 35<br />

2.12.1 Header ................................................................................................................ 35<br />

2.12.2 Payload ............................................................................................................... 36<br />

2.12.3 Trailer ................................................................................................................. 36<br />

2.12.4 Null frame .......................................................................................................... 36<br />

2.13 PROTOCOL DATA UNIT .......................................................................................................................... 37<br />

2.14 SCHEDULING AND CYCLE MULTIPLEXING ............................................................................................. 38<br />

LITERATURE ....................................................................................................................... 39<br />

Bäurle 12.10.2012


<strong>Gr<strong>und</strong>lagen</strong> <strong>FlexRay</strong> BasicsV 1.1 3<br />

Abbreviations<br />

AP<br />

APO<br />

ASAM<br />

BD<br />

BM<br />

BP<br />

BSS<br />

C<br />

CAN<br />

CAPL<br />

CAS<br />

CC<br />

CHI<br />

CI<br />

CID<br />

CODEC<br />

CRC<br />

CSMA/CA<br />

CSN<br />

CSP<br />

DTS<br />

ECU<br />

EMV<br />

ESP<br />

FES<br />

Action Point<br />

Action Point Offset<br />

Association for Standardization of Automation and Measuring<br />

Systems<br />

Bus Driver<br />

Bus Minus<br />

Bus Plus<br />

Byte Start Sequence<br />

Capacitor<br />

Controller Area Network<br />

Communication Access Programming Language<br />

Collision Avoidance Symbol<br />

Communication Controller<br />

Controller Host Interface<br />

Channel Idle<br />

Channel Idle Delimiter<br />

Coding and Decoding Process<br />

Cycle Red<strong>und</strong>ancy Check<br />

Carrier Sense Multiple Access / Collision Avoidance<br />

Coldstart Node<br />

Clock Synchronization Process<br />

Dynamic Trailing Sequence<br />

Electronic Control Unit<br />

Elektromagnetische Verträglichkeit (engl. electromagnetic<br />

compatibility)<br />

Elektronisches Stabilitätsprogramm (engl. electronic stability control)<br />

Frame End Sequence<br />

Bäurle 12.10.2012


<strong>Gr<strong>und</strong>lagen</strong> <strong>FlexRay</strong> BasicsV 1.1 4<br />

FIBEX<br />

FSS<br />

FSP<br />

FTDMA<br />

FTM<br />

ID<br />

I/O<br />

HW<br />

IAS<br />

ISO<br />

L<br />

LIN<br />

MAC<br />

MiL<br />

MT<br />

MTS<br />

MOST<br />

Field Bus Exchange Format<br />

Frame Start Sequence<br />

Frame and Symbol Processing<br />

Flexible Time Division Multiple Access<br />

Fault Tolerant Midpoint Algorithm<br />

Identifier<br />

Input/Output<br />

Hardware<br />

<strong>Institut</strong> für <strong>Automatisierungs</strong>- <strong>und</strong> Softwaretechnik<br />

International Organization for Standard<br />

Inductivity<br />

Local Interconnect Network<br />

Media Access Control<br />

Model in the Loop<br />

Macrotick<br />

Media Access Test Symbol<br />

Media Oriented Systems Transport<br />

µC Microcontroller<br />

µT Microtick<br />

NIT<br />

NM<br />

OSI<br />

PDU<br />

I-PDU<br />

L-PDU<br />

N-PDU<br />

POC<br />

R<br />

Network Idle Time<br />

Network Management<br />

Open Systems Interconnection<br />

Protocol Data Unit<br />

Interaction Layer PDU<br />

Link Layer PDU<br />

Network Layer PDU<br />

Protocol Operation Control<br />

Resistor<br />

Bäurle 12.10.2012


<strong>Gr<strong>und</strong>lagen</strong> <strong>FlexRay</strong> BasicsV 1.1 5<br />

RxD<br />

SDL<br />

SPI<br />

SuF<br />

SW<br />

SyF<br />

TDMA<br />

TP<br />

TRP<br />

TSS<br />

TxEN<br />

TxD<br />

WUP<br />

WUS<br />

XML<br />

Receive Data signal<br />

Specification and Description Language<br />

Serial Peripheral Interface<br />

Startup Frame<br />

Software<br />

Sync Frame<br />

Time Division Multiple Access<br />

Test Point<br />

Time Reference Point<br />

Transmission Start Sequence<br />

Transmit data Enable Not signal<br />

Transmit Data signal<br />

Wakeup Pattern<br />

Wakeup Symbol<br />

Extensible Markup Language<br />

Bäurle 12.10.2012


<strong>Gr<strong>und</strong>lagen</strong> <strong>FlexRay</strong> BasicsV 1.1 6<br />

Name conventions<br />

The following name conventions are geared to the <strong>FlexRay</strong> specification 2.1.<br />

:= []<br />

:= a | c | v | g | p<br />

:= d | l | n | s | u<br />

table 1 Parameter prefix 1<br />

Prefix_1 Typ Beschreibung<br />

a<br />

c<br />

v<br />

g<br />

p<br />

auxiliary<br />

parameter<br />

Protocol<br />

constant<br />

Node<br />

variable<br />

Network<br />

parameter<br />

Node<br />

parameter<br />

This auxiliary parameter is used to define or derive other parameters or<br />

limits.<br />

This value defines properties or limits of the protocol. The value is<br />

provided in the protocol and cannot be changed.<br />

Value which can change depending on time, events etc.<br />

Global parameter, which is valid for all nodes. It can be defined in the<br />

POC:default config state and can only be altered in the POC:config<br />

state.<br />

Parameter which can have different values for different nodes in the<br />

network. It can be defined in the POC:default config state and can only<br />

be altered in the POC:config state.<br />

table 2 Parameter prefix 2<br />

Prefix_2 Typ Beschreibung<br />

d<br />

Time<br />

A value (parameter, variable …) which describes a period of time<br />

between two points of time<br />

l Length Physical length, e.g. of a cable<br />

n Amount Amount, e.g. of slots<br />

s Set A set of values (parameters, variables …)<br />

u Voltage Voltage difference between two cables<br />

Bäurle 12.10.2012


<strong>Gr<strong>und</strong>lagen</strong> <strong>FlexRay</strong> BasicsV 1.1 7<br />

Glossary<br />

AUTOSAR<br />

Backbone<br />

Bus<br />

Bus system<br />

Bus Driver<br />

Branch<br />

Channel Idle<br />

Cluster<br />

Coldstart Node<br />

Communication<br />

Controller<br />

Communication<br />

Cycle<br />

Communication<br />

Slot<br />

Cycle Counter<br />

Cycle Time<br />

Development partnership in the automotive sector, which defines<br />

standards for the development of software components<br />

A backbone is a network with a high data rate<br />

A bus is a shared connection between several units (in this case:<br />

<strong>FlexRay</strong> nodes)<br />

A communication system for data transfer<br />

An electronic component with a transmitter and a receiver, which<br />

enables the communication of the communication controller and the<br />

bus<br />

A sub-network of a cluster<br />

A state where no data is transmitted on the bus<br />

A <strong>FlexRay</strong> network<br />

A network node, which is allowed to initialize a startup procedure on<br />

an idle bus<br />

An electronic component, which implements the <strong>FlexRay</strong> protocol in<br />

each <strong>FlexRay</strong> node<br />

A communication cycle is a complete instance of a communication<br />

structure in the <strong>FlexRay</strong> system, which is repeated cyclic. The<br />

communication cycle consists of a static segment, a dynamic segment<br />

(optional), a symbol window (optional) and the NIT.<br />

In the TDMA method, every node is assigned a time interval for<br />

exclusive bus access. This interval is called a communication slot an is<br />

identified by a unique Slot ID,<br />

The number of the current communication cycle<br />

The current duration of a communication cycle in macrotics. The cycle<br />

time is reset to zero at the start of a new communication cycle.<br />

Dynamic Segment The dynamic segment is used to transmit non-regular data. It use is<br />

optional in a <strong>FlexRay</strong>-cycle, and it utilizes the FTMDA method.<br />

Dynamic<br />

Communication<br />

Slot<br />

This slot consists of several minislots, and is variable in its length<br />

Bäurle 12.10.2012


<strong>Gr<strong>und</strong>lagen</strong> <strong>FlexRay</strong> BasicsV 1.1 8<br />

FIBEX<br />

Frame<br />

FTDMA<br />

Header<br />

Host<br />

Jitter<br />

Knoten/Node<br />

Layer<br />

Macrotick<br />

Microtick<br />

Minislot<br />

Null Frame<br />

Payload<br />

PDU<br />

Slot<br />

Startup Frame<br />

Startup Slot<br />

Data format based on XML, which defines the entire <strong>FlexRay</strong> network<br />

A Frame is a basic structure, which is used to transmit data via the<br />

<strong>FlexRay</strong> network. A frame consists of a header, payload, and trailer<br />

segment.<br />

Access method, which assigns a node a time window, in which the<br />

node has exclusive resource access<br />

First part of a frame, which includes information on the frame<br />

The host contains the user software of an ECU<br />

A derivation in time towards the synchronous clock<br />

Active functional unit, which can send and receive messages<br />

Architectural layer, which describes the functions and tasks of a<br />

component within that layer<br />

A cycle is globaly divided into macrotics. Macrotics are generated out<br />

of the local microtics. The duration of a macrotic is adjusted dring the<br />

synchronization.<br />

The duration of a microtic is derived from the local osciliator of a node.<br />

They are used for bus synchronization.<br />

These slots divide the dynamic segment into up to 7986 parts. They can<br />

be combined into a dynamic slot.<br />

A frame which does not include any data for the receiver is called null<br />

frame. It is identified by a bit in the header, and all data bytes are set to<br />

Data_0<br />

This segment contains all payload data of a frame.<br />

PDUs are bus-independent units of data, consisting of payload and<br />

control data.<br />

See Communication Slot.<br />

Startup frames are <strong>FlexRay</strong> frames which are identified by the Startup<br />

Frame Indicator bit in the header. They are sent for 8 cycles at the start<br />

of the synchronization process. A startup frame always is a sync frame<br />

as well.<br />

Communication slot in which a startup frame is sent.<br />

Bäurle 12.10.2012


<strong>Gr<strong>und</strong>lagen</strong> <strong>FlexRay</strong> BasicsV 1.1 9<br />

Static<br />

Communication<br />

Slot<br />

Static Segment<br />

Sync Frame<br />

Sync Slot<br />

TDMA<br />

Trailer<br />

Wakeup Node<br />

These slots have a fixed length and a unique slot ID. A corresponding<br />

note has exclusive bus access.<br />

The static segment is used to transmit cyclic data. It is included in<br />

every cycle, and uses the TDMA method.<br />

A sync frame is used to synchronise the <strong>FlexRay</strong> bus. It is identified by<br />

the Sync Frame Indicator bit in the header.<br />

A communication slot in which a sync frame is sent,<br />

The TMDA method assigns a time slot to every node, in which the<br />

node has exclusive access to the bus.<br />

The trailer is the last part of a frame, and includes three bytes CRC for<br />

error detection.<br />

A cluster node, which has permission to send a wakeup pattern.<br />

Bäurle 12.10.2012


<strong>Gr<strong>und</strong>lagen</strong> <strong>FlexRay</strong> BasicsV 1.1 10<br />

1 <strong>FlexRay</strong><br />

1.1 Motivation<br />

Because of the huge potential for innovation in automotive electronics, and the resulting<br />

possibilities to make driving safer, more comfortable and more economic, the automotive<br />

sector is <strong>und</strong>ergoing a trend towards electrification since the 90s. This trend continues up until<br />

today [Joch07].<br />

To provide the desired level of functionality in a modern day car, a variety of electronic<br />

control units (ECU) have to interact with each other.<br />

For historic reasons, and because of the low data transfer rates needed in the past, the CAN<br />

bus system has been established as the primary bus system in modern cars. For special use<br />

cases, there are additional bus systems. As an example, the connection between the actuators<br />

and sensors inside of a door is realized by the low-cost LIN bus [LIN11], and the MOST bus<br />

is used for multimedia applications [MOST11].<br />

Since the requirements for electronic and mechatronic control units are getting higher for<br />

modern-day and future cars (e.g. for steer-by-wire), there is a need for a real-time<br />

communication with high data rates. Since such a communication is not possible with CAN, a<br />

consortium has been fo<strong>und</strong>ed in the year 2000, to develop a new bus which complies with<br />

these requirements.<br />

Fo<strong>und</strong>ing members were the companies BMW, Daimler, Motorola and Philips. During the<br />

years, the structure of the consortium has been divided in Core, Premium Associate, Associate<br />

and Development members. In the year 2009, the consortium has been closed, as the <strong>FlexRay</strong><br />

specification 3.0 had been released. At this point, the Core members were BMW, Bosch,<br />

Daimler, Freescale, GM, NXP and VW. There were 28 Premium members, more than 60<br />

Associate members, and several h<strong>und</strong>red Development members.<br />

Currently, the <strong>FlexRay</strong> specification 2.1 is being used. It can be downloaded from the official<br />

homepage [Flex11], until the specification 3.0 has been successfully merged into the<br />

following ISO standards:<br />

ISO 10681-1:2010 Road vehicles – Communication on <strong>FlexRay</strong> – Part 1: General<br />

information and use case definition<br />

ISO 10681-2:2010 Road vehicles – Communication on <strong>FlexRay</strong> – Part 2: Communication<br />

layer services<br />

1.2 Requirements and properties<br />

While defining the requirements for the new bus systems, the following points have played an<br />

important role:<br />

• Transmission rate – a transmission rate significantly higher than CAN (500 Kbit/s)<br />

should be achieved<br />

• Red<strong>und</strong>ant communication channels – by implementing two separate physical<br />

communication channels (A/B), the system offers to transmit data red<strong>und</strong>ant, or to<br />

double the data rate..<br />

• Global synchronous time base – the communication protocol should provide a global<br />

time base, which can be used to synchronize the various ECUs.<br />

Bäurle 12.10.2012


<strong>Gr<strong>und</strong>lagen</strong> <strong>FlexRay</strong> BasicsV 1.1 11<br />

• Reliability of transmission – Transmission of information should be reliable and<br />

have deterministic timing, since the CSMA method used by the CAN bus can lead to<br />

massive fluctuations in timing.<br />

• Physical layer – the physical layer should be robust and simple.<br />

• Extendibility – The network should be easily extendable. Single ECUs should be able<br />

to be removed or added to the network..<br />

• Support for time- and event-based communication – since – depending on the<br />

application - both of these methods of communication may be suited better, both<br />

methods should be supported.<br />

CSMA:<br />

TDMA:<br />

Figure 1.1 Examples for time- (CSMA) and event-based (TDMA) communication<br />

[Göhn10]<br />

As a result of these requirements, the properties of the <strong>FlexRay</strong> system have been specified.<br />

The key parameter of any communication system is the data rate. In respect to current and<br />

future demand for bandwidth, a sufficiently high data rate of 10 Mbit/s per channel has been<br />

selected.<br />

A synchronous time base is provided, which ensures the deterministic character of the system.<br />

Because of that, the event-based communication process using priorities (CSMA/CA), as used<br />

in the CAN bus, had to be abandoned. Instead, a time-based method (TDMA) is used for data<br />

transmission, see Figure 1.1. By using scheduling, an accurate time plan is possible, while<br />

still allowing for a jitter of 0.5 to 10 µS (1 to 3µS typical)..<br />

Because the communication process is organized in cycles, providing each ECU with defined<br />

slots, a deterministic delay for messages can be guaranteed.<br />

The focus during the development was to make the system flexible and extendable. As a<br />

result, it is possible to choose which messages should be transmitted red<strong>und</strong>ant, and the<br />

system can be optimized for reliability or performance, using static or dynamic bandwidth<br />

allocation.<br />

As many as 60 parameters – e.g. message length or cycle length - in the network design allow<br />

an optimization of the network for the specific application or task.<br />

Bäurle 12.10.2012


<strong>Gr<strong>und</strong>lagen</strong> <strong>FlexRay</strong> BasicsV 1.1 12<br />

A detailed overview of the requirements can be fo<strong>und</strong> in the <strong>FlexRay</strong> Requirements<br />

Specification V2.1 [FRRS05].<br />

Because of these properties, the <strong>FlexRay</strong> system is suited as a backbone, and for use in realtime<br />

and safety-critical applications.<br />

<strong>FlexRay</strong> is currently used in the BMW X5, BMW 7, Audi A8, and the new S-Class by<br />

Daimler [VeSc11].<br />

2 Technical basics<br />

2.1 OSI-Model<br />

Figure 2.1 OSI-Model fort he bus system and protocols<br />

The general structure of a communication system is described by the OSI-Model. As seen in<br />

Figure 2.1, the model consists of layers. Every layer is assigned a specific function, and is<br />

based on the layers below itself.<br />

A <strong>FlexRay</strong> system defines OSI-Layers 1 and 2, the other layers are not defined by <strong>FlexRay</strong>.<br />

The physical layer (OSI-Layer 1) is defined in the <strong>FlexRay</strong> Communications System<br />

Electrical Physical Layer Specification [FREPLS06].<br />

The data link layer (OSI-Layer 2) specifies the actual communication protocol, and is defined<br />

in the <strong>FlexRay</strong> Communications System Protocol Specification [FRPS05].<br />

As mentioned before, the higher layers are not defined by <strong>FlexRay</strong>. In the automotive sector,<br />

this role is taken by the AUTOSAR specification. The application layer (OSI-Layer 7)<br />

enables the applications to access the hardware, and provides data structures and protocols.<br />

2.2 Structure of a communication node<br />

A <strong>FlexRay</strong> network consists of several communication nodes and communication channels. A<br />

<strong>FlexRay</strong> node (see Figure 2.2) consists of a Microcontroller (µC, also called host), a<br />

Communication Controller (CC), an optional Bus Guardian (BG), and one or two Bus Driver<br />

(BD). The Bus Driver isn’t used in practical applications, since there are no available<br />

components on the market. In the future, a second Communication Controller will be used,<br />

which renders the Bus Driver useless [VeSc11].<br />

Bäurle 12.10.2012


<strong>Gr<strong>und</strong>lagen</strong> <strong>FlexRay</strong> BasicsV 1.1 13<br />

Figure 2.2 Structure of a <strong>FlexRay</strong> node [VeSc11]<br />

Every component has specific tasks. There are different types of microcontrollers, with or<br />

without an integrated Communication Controller. The Bus Driver provides the physical<br />

connection to the respective channel. The Bus Guardian was designed as a security system<br />

between Communication Controller and Bus Driver, but isn’t used as discussed before.<br />

The Communication Controller implements the <strong>FlexRay</strong> protocol. It controls the bus access<br />

(Media Access Control (MAC)), verifies the timing specified by the scheduling and the<br />

syntax of the frames (Frame and Symbol Processing (FSP)), performs the transformation of<br />

payload data into a bit stream (Coding and Decoding Process (CODEC)) and the<br />

synchronization with the global time base (Clock Synchronization Process (CSP)). An indepth<br />

description of these processes can be fo<strong>und</strong> in the <strong>FlexRay</strong> Communications System<br />

Protocol Specification [FRPS05], where they are described in the Specification and<br />

Description Language (SDL).<br />

The host runs the actual application, which controls the Communication Controller via the<br />

Controller Host Interface (CHI) and the Protocol Operation Control (POC)).<br />

Bäurle 12.10.2012


<strong>Gr<strong>und</strong>lagen</strong> <strong>FlexRay</strong> BasicsV 1.1 14<br />

Figure 2.3 States of the Communication Controllers [FRPS05]<br />

The Communication Controller can be in the following states (see also Figure 2.3):<br />

• default config – Startup state of the Communication Controller. In this state, no<br />

communication is possible, since no information concerning the connected <strong>FlexRay</strong><br />

network are available.<br />

• config – The microcontroller submits specific data from the FIBEX or AUTOSAR<br />

file, which is necessary for the operation of the Communication Controller.<br />

• ready – The Communication Controller has been successfully set up and is ready for<br />

starting the communication process. It can either join an existing system, or wakeup<br />

an idle network.<br />

• wakeup – If the <strong>FlexRay</strong> node is connected to an idle network, the microcontroller<br />

can instruct the Communication Controller to wake up the network. The controller<br />

switches to the wakeup state, and starts transmitting the Wakeup Pattern, see section<br />

2.6.<br />

• startup – In this state, the node tries to synchronize with the bus. Depending on the<br />

role of the node, there are two different procedures. If the node is a Coldstart Node, it<br />

actively participates in the synchronization process of the network. Otherwise, it uses<br />

the existing bus communication to synchronize itself.<br />

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<strong>Gr<strong>und</strong>lagen</strong> <strong>FlexRay</strong> BasicsV 1.1 15<br />

• normal active – This is the main operating state of the Communication Controller, in<br />

which communication with the bus is possible<br />

• normal passive – In case of specific errors, the node autonomously switches to this<br />

state or the halt state. The node is only allowed to listen to the bus, but is prohibited<br />

from transmitting data. If the AUTOSAR specification is used, this state isn’t used for<br />

security reasons, since the microcontroller isn’t able to control the transition to the<br />

state.<br />

• halt – All processes in the Communication Controllers are stopped. This state is<br />

reached, if an internal error of the Communication Controller occurs. It can only be<br />

left via the default config state.<br />

For detailed information, consult the <strong>FlexRay</strong> Communication System Protocol Specification<br />

[FRPS05].<br />

Figure 2.4 Structure of a <strong>FlexRay</strong> Active Star node [VeSc11]<br />

In between Branches of a <strong>FlexRay</strong> network, an Active Star (AS) can be used. It consists only<br />

of Bus Drivers, as shown in Figure 2.4.<br />

2.3 Termination of nodes<br />

To achieve a better signal quality on the bus and to prevent reflections on the end of the<br />

cables, the cables get terminated at the ends. The most simple way to do that is shown in<br />

Figure 2.5. It uses a resistor R T = 80...110Ω (110Ω typical) between Bus Plus (BP) and Bus<br />

Minus (BM).<br />

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<strong>Gr<strong>und</strong>lagen</strong> <strong>FlexRay</strong> BasicsV 1.1 16<br />

Terminated end of a cable<br />

R T = 80…110 Ω<br />

Figure 2.5 Termination with a resistor [FREPLS06]<br />

A ECU with termination is marked by a filled black square.<br />

A better way of termination is shown in Figure 2.6. The resistor R T is replaced by two<br />

identical resistors R TA and R TB . In between these two resistors, a 20 MHz RC filter is placed.<br />

R TA , R TB = 40...55 Ω<br />

R 1 < 10 Ω<br />

C 1 = 4700 pF<br />

Figure 2.6 Termination with RC filter [FREPLA06]<br />

The properties of the termination and the electromagnetic compliance can be further<br />

increased, by using a Common Mode Choke. The configuration is shown in Figure 2.7. The<br />

stray inductivity L stray should be low.<br />

R Line ≤ 1 Ω<br />

L ≥ 100 µH<br />

L stray < 1µH<br />

Figure 2.7 Termination with RCL filter[FREPLA06]<br />

Not every node of the bus can be equipped with a terminating resistor, because the resistance<br />

of the whole bus would be too low. At nodes without terminations (see Figure 2.8), the Bus<br />

Driver is directly connected to the bus.<br />

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Unterminiertes Kabelende<br />

Figure 2.8 Open termination [FREPLS06]<br />

All terminating resistors in a branch are parallel. The resulting resistance R DCLoad has to be<br />

between 40 and 55Ω. The usage of a choke is allowed, too. Depending on the topology, there<br />

are different setups for bus termination and the placement of the resistors. The resulting<br />

resistance has to be in the defined range for R DCLoad .<br />

2.4 Physical topology<br />

The physical topology describes the structural setup of the network. Figure 2.9 shows the<br />

most basic passive connection between two nodes, called Point-to-Point or Peer-to-Peer. The<br />

maximum length of the cable lBus is 24m. Both ends have to be terminated with resistors.<br />

Figure 2.9 Point-to-Point connection [FREPLS06]<br />

There are two additional passive bus topologies, the linear passive bus (Figure 2.10), and the<br />

passive star (Figure 2.11). The linear passive bus extends the Point-to-Point connection by<br />

additional nodes. The number of nodes is defined between 4 and 22.<br />

The maximum bus length lBus = lStub n + lSpliceDistance n,m + lStub m = 24m must not be<br />

exceeded. Typically, the stub lines lStub 2 or lStub 3 connecting to the main bus are only a few<br />

centimeters long, and do not contain additional stub lines.<br />

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Figure 2.10 Linear passive bus [FREPLS06]<br />

A passive star does not have a main line. The maximal bus length is lBus = lStub n + lStub m =<br />

24m. In practical applications, commonly 3 nodes with a length lStub n = 8m are used. The<br />

maximum number of nodes is 22. However, the length of the stub lStub n decreases rapidly<br />

with each additional stub, e.g. with 6 stubs, lStub n


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Figure 2.12 Active Star [FREPLS06]<br />

Figure 2.13 Example for a mixed topology<br />

If an Active Star is used in a network topology, it is important to verify there isn’t a second<br />

path to an ECU, because that would create a feedback, and would render the structure invalid.<br />

Channels must not be interrupted in a branch.<br />

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2.5 Signal transmission<br />

<strong>FlexRay</strong> uses two twisted wires for transmitting signal data. The transmission uses differential<br />

voltage levels aro<strong>und</strong> 2.5V. The transmit level uBus results out of the difference between uBP<br />

and uBM.<br />

Figure 2.14 <strong>FlexRay</strong> level diagram [FREPLS06]<br />

Using the different levels shown in Figure 2.14, the <strong>FlexRay</strong> bus can have four different<br />

states:<br />

• Idle_LP (Idle Low Power) – the level uBus is 0 V, and transceivers pull the voltage<br />

level of the <strong>FlexRay</strong> bus to GND.<br />

• Idle – the level uBus is 0 V, uBP and uBM are 2.5 V<br />

• Data_0 – the level uBus is -2 V, since at least one <strong>FlexRay</strong> transceiver has set Bus<br />

Plus to 1.5 V and Bus Minus to 3.5 V.<br />

• Data_1 – the level uBus is -2 V, since at least one <strong>FlexRay</strong> transceiver has set Bus<br />

Plus to 3.5 V and Bus Minus to 1.5 V.<br />

The bus states Idle, Data_0 and Data_1 are detected by the Bus Drivers in normal mode of<br />

operation, and have different values, depending on their position in the network. These Test<br />

Points (TP) are defined in Figure 2.15, and Table 2.1 shows the valid levels of uBus.<br />

Additionally, Figure 2.16 shows the timing of the falling and rising edges and the signal<br />

duration.<br />

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Figure 2.15 Definition of <strong>FlexRay</strong> network test points [FREPLS06]<br />

Table 2.1 Voltage levels at the test ponts<br />

Bus state<br />

uBus [mV]<br />

Min<br />

Max<br />

Idle_LP TP4 -150 150<br />

Idle<br />

TP1 0 30<br />

TP4 -150 150<br />

Data_0<br />

TP1 -600 -2000<br />

TP4 -400 -2000<br />

Data_1<br />

TP1 600 2000<br />

TP4 400 2000<br />

Figure 2.16 Eye diagram [FREPLS06]<br />

If the bus is at Idle_LP, the Bus Driver is in a sleep mode, and has to be put in normal mode<br />

by a local event in order to wake up the bus.<br />

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2.6 Wakeup<br />

The transition from the low power state to a powered state of the Bus Drivers is called<br />

Wakeup. This transition can be initialized by the Communication Controller, or by the bus<br />

itself, if the Bus Driver receives Wakeup Patterns. For the latter, the Bus Driver has to<br />

identify at least two Wakeup Symbols.<br />

Not every ECU on a network is allowed to send Wakeup Patterns. If a ECU has the<br />

permission to send such patterns, it is called a Wakeup Node, and may send 2 to 63 Wakeup<br />

Symbols.<br />

A Wakeup Symbol is defined (see Figure 2.17) as a Data_0 phase followed by an Idle phase.<br />

To ensure the Bus Driver can identify these phases, the following timing constraints have to<br />

be obeyed: dWU 01 , dWU Idle1 , dWU 02 , dWU Idle2 > 4µs <strong>und</strong> dWU < 48µs.<br />

Figure 2.17 Wakeup Pattern [EPLS06]<br />

A network may only contain up to 3 Wakeup Nodes, since an overlap of several Wakeup<br />

Patterns could prevent a correct detection, see Table 2.2.<br />

Table 2.2 Wakeup Pattern Detection [EPLS06]<br />

Name Description Min Max Unit<br />

dWU 0Detect Acceptable limits for detecting a 1 4 µs<br />

Data_0 phase.<br />

dWU IdleDetect Acceptable limits for detecting an 1 4 µs<br />

Idle phase.<br />

dWU Timeout Acceptable limits for detecting a<br />

Wakeup Pattern<br />

48 140 µs<br />

However, it is possible to define different Wakeup Nodes for channels A and B. This opens<br />

up additional possibilities for the network designer, as seen in the example in Figure 2.18.<br />

Here, the network on channel A is woken up by ECU1 due to a local event, while channel B is<br />

still asleep.<br />

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Figure 2.18 Example of a wakeup<br />

After completing the Wakeup Phase, the Coldstart Nodes try to establish a communication on<br />

the bus,<br />

2.7 Startup<br />

While starting up a <strong>FlexRay</strong> network, all timers of the ECUs are synchronized. The difficulty<br />

consists of synchronizing nodes with the communication, while not disrupting nodes which<br />

are already synchronized. This is examined in-depth in section 2.8.<br />

There are several scenarios which can occur during the Startup of a <strong>FlexRay</strong> network. It has to<br />

be considered that only Coldstart Nodes are allowed to send Startup Frames. Also, the ECUs<br />

have to be in POC:ready state, before they can participate in the Startup of the cluster.<br />

1. Scenario – no Coldstart Node in the cluster<br />

This scenario occurs, if no Coldstart Node has been defined in the cluster, or if these<br />

nodes aren’t in POC:ready state.<br />

In practical use, this situation often occurs while testing a single ECU. For starting the<br />

communication in that case, the software has to simulate the Coldstart Nodes.<br />

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2. Scenario – single Coldstart Node in the cluster<br />

After the Wakeup of a Coldstart node, it enters POC:startup state. As a next step, it<br />

checks weather there is already an active communication on the channels. In that case,<br />

it synchronizes itself to the cycle, and enters POC:normal active state.<br />

If there is no communication, the node starts the Startup procedure by sending a<br />

Collision Avoidance Symbol (CAS). This identifies the node als Leading Coldstart<br />

Node. After that, the node sends 4 Startup Sync Frames (SyF), see Figure 2.20 - (1). If<br />

no other node answers (like in this scenario), the Coldstart Node stops its activity after<br />

a defined number of retries, and waits for another node to take the role of Leading<br />

Coldstart Node.<br />

3. Scenario – two or more Coldstart Node in the cluster<br />

After “racing” for the role of Leading Startup Node, the winning node commences the<br />

Startup Procedure as described in scenario 2. All other Coldstart Nodes are called<br />

Following Coldstart Nodes. These commence scheduling after receiving the first two<br />

Sync Frames (SyF), and start synchronizing in the following cycle. In the fourth cycle,<br />

the Following Coldstart Node start sending Sync Frames on their own, the so called<br />

Coldstart Join (see Figure 2.19 and Figure 2.20 - (2)). All other nodes start scheduling<br />

at the 0 th cycle, followed by the synchronization. After the 7 th cycle, they start<br />

transmitting data (see Figure 2.20 - (3)). As with the 8th cycle, there is a normal<br />

communication on the bus, all nodes are in POC: normal active state.<br />

Figure 2.19 Startup sequence<br />

This behavior can be recorded and verified in CANoe, see Figure 2.20. In this case, two<br />

Coldstart Nodes have ben simulated by the software. The control unit <strong>und</strong>er test joins the<br />

communication as expected.<br />

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Figure 2.20 <strong>FlexRay</strong> Startup CANoe log file<br />

2.8 Synchronization<br />

A precondition for using the TDMA method is a synchronized bus. For this, <strong>FlexRay</strong> uses a<br />

mechanism for distributed clock synchronization, i.e. as shown in Figure 2.21 , every node<br />

derives the cycle clock from its own clock<br />

Figure 2.21 Synchronization of the ECUs [VeSc11]<br />

For adjusting the local timer, a combination of offset- and frequency-adjustment is used, see<br />

Figure 2.22 and Figure 2.23. By combining these methods it is ensured, that the local times of<br />

all nodes are almost identical at one point of time, and don’t diverge while time progresses.<br />

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Figure 2.22 Principle of offset adjustment<br />

For the offset-adjustment, the cycle start point T i of every Sync Node is derived from the local<br />

oscillator, and is compared to the starting time t on the bus. The resulting offset ΔT offset_i is<br />

just to calculate the adjustment.<br />

The calculation of the offset is done in every cycle, while an adjustment of the value is done<br />

only in odd numbered cycles. In these cycles, the Network Idle Time (NIT) will be shorted or<br />

longer, depending on the calculated value.<br />

Calculating the cycle time of a Sync Node ΔT i , by comparing two successive cycle start times<br />

of node I, we can calculate the derivation ΔT rate_i by subtracting the expected cycle time Δt.<br />

This is used for frequency-adjustment. The adjustment of the frequency is calculated and<br />

applied over two successive cycles.<br />

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Figure 2.23 Principle of frequency adjustment<br />

For the calculation of the adjustments, only Sync Frames may be used. The maximum number<br />

of nodes who are permitted to transmit Sync frames is limited to cSyncNodeMax = 15.<br />

Fault Tolerant Midpoint (FTM) Algorithms [VeSc11]:<br />

• Gathering all values for ΔT offset_i <strong>und</strong> ΔT rate_i<br />

• Sorting the values from lowest to highest.<br />

• Discarding of extreme values, depending on the number of nodes in the cluster. (If the<br />

number is between 3 and 7 , the highest value and the lowest value are discarded. If<br />

the number of nodes exceeds 7, the two highest values and the two lowest values are<br />

discarded)<br />

• Calculating the adjustment:<br />

If a node detects a massive discrepancy during the procedure, it stops transmitting and<br />

switches to POC:normal passiv state.<br />

2.9 Re-Synchronization (Bit-Synchronization)<br />

Even after the synchronization, there still is a discrepancy between the timers. Also, messages<br />

are transmitted and received with an offset. To be able to properly evaluate the data, it is<br />

necessary to re-synchronize on a bit-level.<br />

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As a security measure, the Action Offset Point (APO) in each slot has been introduced (see<br />

Figure 2.24). With the help of the APO, it is possible to compensate slight timing differences<br />

between ECUs, and to compensate for bus delay, without interfering with the global<br />

synchronization process.<br />

Figure 2.24 Action Point and Action Point Offset [VeSc11]<br />

The APO is derived from the actual Action Point (AP) of the sender. The received frame can<br />

be shifted in between the start and the end of a slot. This guarantees, that all ECUs receive a<br />

message in the correct slot.<br />

Figure 2.25 Static Segment Frame [FRPS05]<br />

While transmitting and receiving, the Bus Driver has to switch between these two modes,<br />

because the <strong>FlexRay</strong> bus is used bi-directional. Therefore, for activating the Bus Driver after<br />

the Action Pont, a Transmission Start Sequence (TSS) is used. The length of the TSS varies<br />

between 3 and 15 bit, depending on the number of Bus Drivers connected to the channel,<br />

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since it is shortened by every Bus Driver for latency reasons. After that, the Frame Start<br />

Sequence (FSS) starts, which is used as a safety buffer against quantization error while bit<br />

sampling.<br />

After that, the actual frame starts. In front of every byte, a Byte Start Sequence (BSS) is<br />

transmitted, to help bit synchronization. After the last byte, the static frame is delimited by an<br />

Frame end Sequence (FES).<br />

In Figure 2.25 and Figure 2.26 you can also see the signals TxD and TxEN, which are<br />

generated by the Communication Controller while transmitting.<br />

In a frame in the dynamic segment (Figure 2.26), the FES is followed by a Dynamic Trailing<br />

Sequence (DTS).. It is a Low phase with variable length, which extends every frame until the<br />

next Media Access Control (MAC), to enable an exact assignment to the Minislot-ID. The<br />

dynamic frame is delimited by the High bit of the DTS. The bus goes to Idle level after that.<br />

Figure 2.26 Dynamic Segment [FRPS05]<br />

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2.10 Timing<br />

In addition to the signal levels, timing plays an important role in the communication of a<br />

<strong>FlexRay</strong> bus, since without timing none of the protocol mechanisms would work. In Figure<br />

2.27, the hierarchical structure of the different time units is shown.<br />

Figure 2.27 <strong>FlexRay</strong> timing hierarchy<br />

The so-called Microtick is derived from the Sample Clock. The duration of a Microtick may<br />

differ between ECUs, since it depends on component tolerances, temperature and time drift of<br />

the oscillator of each ECU.<br />

Macroticks (MT) are composed from local Microticks, and are global synchronous time units.<br />

Since the duration of a Macrotick is the same throughout the whole cluster, the number of<br />

Microticks to a Macrotick may differ from ECU to ECU.<br />

A Communication Cycle consists of a constant number of Macroticks, and has the same<br />

duration for every node.<br />

The duration of a bit in <strong>FlexRay</strong> is determined by the Sample Clock, i.e. is independent of<br />

Macroticks and Microticks. Since the duration of a bit has to be equal for all ECUs, they get<br />

re-synchronized on bit-level.<br />

With the following formulas [FRPS05] and the system parameters in Table 2.3, the following<br />

example values can be calculated:<br />

(1)<br />

(2)<br />

( ) (3)<br />

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( ) (4)<br />

Table 2.3 Timing Parameter [VeSc11], example<br />

From the selected bus data rate of 10 Mbit/s results the bit duration gdBit = 0.1µs (1), by<br />

multiplying the number of samples per bit cSamplePerBit = 8 with the sample duration<br />

gdSamplesClockPeriod.<br />

As for choosing the duration of a Microtick pdMicroTick, there are three different<br />

configurations to choose from, depending on the ECU. For example, with an oscillator<br />

frequency of 80MHz the number of samples per Microtick equals pSamplesPerMicroTick = 1<br />

an using (2) , the duration of a Microtick equals pdMicroTick = 0.0125µs.<br />

By selecting the length of a Macrotick gdMacroTick it is possible to create a standardized<br />

proportion pMicroPerMacroNom between Microtick <strong>und</strong> Macrotick (3). Using the cycle<br />

length gdCycle we are able to calculate the number of Macroticks per Cycle gMacroPerCycle<br />

(4).<br />

Even more details can be fo<strong>und</strong> in the <strong>FlexRay</strong> Specification [FRPS05].<br />

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2.11 Communication structure<br />

The communication structure of a <strong>FlexRay</strong> bus is organized in Cycles. The duration of a<br />

Cycle is constant, and is defined by the parameter gdMacroPerCycle. The current active cycle<br />

is saved in vCycleCounter, it can be 0 to 63 ≡ cCycleCountMax.<br />

2.11.1 <strong>FlexRay</strong> Cycle<br />

Figure 2.28 shows <strong>FlexRay</strong> Cycles. Every Cycle is divided in four segments, which each have<br />

different properties.<br />

Static Segment:<br />

- Time-triggered transmission<br />

- Bus access using TDMA<br />

Dynamic Segment (optional):<br />

- Event-triggered Transmission<br />

- Bus access using FTDMA<br />

Symbol Window (optional):<br />

- Test symbol per Cycle for the use with a Bus Guardian<br />

NIT – Network Idle Time:<br />

- Segment for synchronization of the nodes<br />

Figure 2.28 Segments in a <strong>FlexRay</strong> cycle [VeSc11]<br />

The static segment is used for time-triggered data transfer, and is divided into slots, which are<br />

available and have to be used in every cycle. As bus access method TDMA is used, and<br />

therefore the defined access of the ECU to their slot(s) is guaranteed.<br />

In the dynamic segment, an event-triggered data transfer is possible. The length of the<br />

dynamic Slots may vary, and is implemented using the FTMDA method.<br />

The Symbol Window can be used to transmit test symbols, e.g. for the use with a bus<br />

guardian.<br />

The Network Idle Time is used by the nodes to perform the necessary time synchronization.<br />

Only the static segment and the Network Idle time are needed for a valid communication. The<br />

dynamic segment and the Symbol Window are optional. Therefore, there are four different<br />

possibilities for bus access.<br />

2.11.2 Bus access<br />

Depending on the application, the bus access can be configured flexibly. A <strong>FlexRay</strong> cluster<br />

can use either one of the modes shown in Figure 2.29.<br />

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Figure 2.29 Different division of a <strong>FlexRay</strong> cycle into segments<br />

(1) Pure Static – Only the static segment is used.<br />

(2) Pure Static with Symbol – The static segment and the Symbol Window are used.<br />

(3) Mixed – The static and the dynamic segments are used.<br />

(4) Mixed with Symbol – All segments are used.<br />

In real-life applications, mode (3) is used most commonly. Mode (1) is rare in the automotive<br />

sector. Modes (2) and (4) are not used, since the Bus Guardian is not used.<br />

2.11.3 Static segment<br />

The static segment is always the first segment of a cycle. As seen in Figure 2.30, the segment<br />

is divided into slots with corresponding IDs. These are assigned exclusively to the ECUs in<br />

the cluster, and enable a cyclic communication. The number of slots in the static segment can<br />

be set by the parameter gNumberOfStaticSlots. The value can be in the range of 2 to<br />

cStaticSlotIDMax = 1023 slots, and is constant for every cycle. The length of a slot<br />

gdStaticSlot kann can be selected from 4 to 661 Macroticks and is constant as well. This way,<br />

it can be ensured that every node is able to send its message always in the same slot of a<br />

cycle.<br />

In the static slots, Static Frames can be sent. The length of these Frames is constant as well,<br />

since it depends on gdStaticSlot. Every static frame consists of header, payload, and trailer,<br />

see section 2.12. The Channel Idle Delimiter (CID) delimits the static frame, its length<br />

cChannelIdleDelimiter is 11 Bit.<br />

2.11.4 Dynamic segment<br />

The static segment is followed by the optional dynamic segment, which can be used for<br />

spontaneous transmission of messages (e.g. diagnostic messages), using the assigned Slot ID<br />

The segment is divided into Minislots and has a constant length. The length is defined by the<br />

amount gNumberOfMiniSlots 0 to 7986 Minislots and the duration gdMiniSlot 2 to 63<br />

Macroticks.<br />

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Figure 2.30 Static and dynamic <strong>FlexRay</strong> segment [VeSc11]<br />

If an ECU sends data in the dynamic segment, several minislots are replaced by a dynamic<br />

slot, see Figure 2.30. The length of a dynamic slot can be chosen, unlike the length of static<br />

frames. If it is still possible to send the frame can be determined using pLatestTx (0 to 7980<br />

Minislots). This parameter shows if there is enough space for the dynamic frame in the<br />

current dynamic segment.<br />

To determine the current Slot ID, the counter of each node is incremented with every Minislot<br />

or dynamic slot. It is only possible to assign Slot IDs that have not been used in the static<br />

segment, the maximum Slot ID is cSlotIDMax = 2047. The lowest Slot ID has the highest<br />

priority.<br />

The length of a dynamic frame depends on the amount and length of data in the payload, and<br />

is therefore variable. Header, trailer and Channel Idle Delimiter are identical to the ones in a<br />

static frame, but the length of the payload can differ between cycles. The Dynamic Trailing<br />

Sequence acts as a buffer, so the frame length can be adjusted to the length of a Minislot.<br />

2.11.5 Symbol Window<br />

Figure 2.31 Symbol Window and Network Idle Time [VeSc11]<br />

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Figure 2.31 shows that the optional Symbol Window follows the dynamic segment. It can be<br />

used to send one Symbol per Cycle.<br />

The length gdSymbolWindow of the Symbol Windows can be defined between 0 and 142<br />

Macroticks. The Media Access Test Symbol (MTS) is used to check the Bus Guardian and is<br />

the only Symbol currently used. The length cdCAS of the Media Access Test Symbols is 30<br />

low bits, just like the one of the Collision Avoidance Symbol. The Collision Avoidance<br />

Symbol isn’t transmitted in the Symbol Window, but during the Startup oft he cluster.<br />

2.11.6 Network Idle Time<br />

Every communication cycle ends with the Network Idle Time. In this segment, the bus is<br />

silent, there is no communication.<br />

The Network Idle Time is used to synchronize the ECUS, and is defined by the parameter<br />

gdNIT (2 to 805 Macroticks). As seen in Figure 2.31, the Network Idle is divided in two parts.<br />

During Channel Idle (CI) the synchronization calculation is performed, and is adjusted in the<br />

Offset Correction Segment.<br />

2.12 Frame format<br />

A frame consists of three parts, header, payload, and trailer, see Figure 2.32.<br />

Figure 2.32 Structure of a Frames<br />

2.12.1 Header<br />

The first 40 bits of a frame are called header. It contains information which is necessary for<br />

the protocol.<br />

• Status Bits – at the start of a frame, the Reserved Bit, Payload Preamble Indicator,<br />

Null Frame Indicator, Sync Frame Indicator and Startup Frame Indicator are<br />

transmitted. The bits describe the type of payload transmitted. A detailed description is<br />

available in [FRPS05].<br />

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• Frame-ID – also called Slot ID. Defines in which slot the frame should be<br />

transmitted. The ID has a length of 11 bit and has a range from 1 to 2047, since 0 is<br />

reserved for invalid frames.<br />

• Payload Length – defines the number of bytes in the payload segment, divided by<br />

two. It is only possible to configure payloads with an even number of bytes. Using its<br />

seven bits, a range from 0 to cPayloadLengthMax = 127 can be configured, which<br />

translates into a payload length of 0 to 254 bytes..<br />

In any given network, the length of the payload in the static segment is identical. In<br />

the dynamic segment, the length of the payload may differ from cycle to cycle. It may<br />

also be different for the two channels.<br />

• Header CRC – is a checksum, which is calculated over the area marked in red in<br />

Figure 2.32. The Header Cycle Red<strong>und</strong>ancy Check (CRC) polynome is:<br />

( ) ( ) ( )<br />

• Cycle Count – defines, in which cycle the Frame shall be send. It is possible to<br />

address 0 to cCycleCountMax = 63 with this 6 bit value..<br />

2.12.2 Payload<br />

The payload area contains the actual data transmitted by the node. The length of the <strong>FlexRay</strong><br />

payload is 0 to 127 words, which translates to 0 to 254 bytes. A part of the payload can be<br />

used for the Network Management Vector in the static segment or the Message ID in the<br />

dynamic segment by setting the Payload Preamble Indicator.<br />

2.12.3 Trailer<br />

The trailer contains the CRC which is calculated over the entire length of the frame. With its<br />

help, received data can be checked for validity. The polynome used in <strong>FlexRay</strong> has a<br />

Hamming Distance of 6 at a frame length of 248 bytes. That means it is possible to detect up<br />

to 5 bit transmission errors per frame. If the frame length is increased to 254 bytes, the<br />

Hamming Distance decreases to 4.<br />

Das polynome for the calculation is:<br />

( ) ( )<br />

( )<br />

For the calculation of the CRC, both <strong>FlexRay</strong> channels are initialized using differ values. That<br />

way, only data for the correct channel can be verified successfully.<br />

2.12.4 Null frame<br />

A null frame has the Null Frame Indicator bit set to zero, such a frame does not contain any<br />

data. The payload section exists, but al data is filled up with zeros.<br />

This frame is sent in the static segment, if the transmit buffer is blocked by the host, but the<br />

node has to send in his slot. If such a case occurs in the dynamic segment, there is no frame<br />

sent at all.<br />

This method is important, especialy for Startup and Sync Fames. These actions are done by<br />

the Communication Controller, and don’t require interaction from the host.<br />

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2.13 Protocol Data Unit<br />

Protocol Data Units (PDU) are bus-independent data units, consisting of protocol data and<br />

payload, which are processed by the layers of the protocol stack A PDU can consist of a<br />

single signal or multiple signals. It has its own timing, and is able to show if its data is valid<br />

by using an update-bit.<br />

Figure 2.33 Overview of PDUs [VeSc11]<br />

In AUTOSAR, there are different PDUs for each OSI-Layer (see Figure 2.33):<br />

• I-PDU – Interaction Layer PDU, can consist of one or more signals, has its own<br />

Update Bit.<br />

• N-PDU – Network Layer PDU (optional)<br />

• L-PDU – Data Link Layer PDU are the equivalent to Frames. They can contain one or<br />

more I-PDU. It is possible to split up a single I-PDU between multiple L-PDU<br />

Since FIBEX Version 3.0 I-PDUs are supported, but there is no definition for N- <strong>und</strong> L-<br />

PDUs.<br />

Using PDUs offers a lot of advantages. The receiver only has to process the data, if the<br />

corresponding Update-Bit is set. Since otherwise the data has not been refreshed yet, or is<br />

invalid. This saves processing power. It is also possible to have an easier structure for data.<br />

Also, the data is directly provided, and it isn’t necessary to search for it in the frame.<br />

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2.14 Scheduling and Cycle Multiplexing<br />

The scheduling is defined during the network design. By defining static and dynamic slots, a<br />

fixed time frame is provided. This enables the unique assignment of frames to the<br />

corresponding slots in each channel.<br />

The number of slots is constant and cannot be changed after the network design. The<br />

flexibility and the usage of the bandwidth is defined during development.<br />

Table 2.4 Scheduling example [VeSc11]<br />

In Table 2.4, a scheduling for nodes K, L, M, N and O is provided. It is allowed to send<br />

different frames in different cycles for the same slot. This is called Cycle Multiplexing.<br />

For Cycle Multiplexing, the following information is needed:<br />

• Slot-ID in the cycle 0...2047<br />

• Base or Start Cycle 0...63<br />

• Repetition Factor {rep = 2 x with 0 ≤ x ≤ 7}<br />

• Channel {A, B, A&B}<br />

• Name of the node<br />

If we take a look on node M in Table 2.4, we can see that it is assigned slots 2 and 7. In the<br />

static segment, node M uses channel A only. Here, it sends three different frames, e.g. frame<br />

y, which has a base cycle of 2 and a repetition factor of 4. That means, that frame y is sent in<br />

cycle 2 for the first time, and after that every 2+4n (with n = 1..15) cycle.<br />

In the dynamic segment, it is acceptable for different nodes to use the same slot. Further, the<br />

nodes are allowed to send different frames, and different nodes may use the different channels<br />

of a slot. Again, all frames have to provide the information needed for Cycle Multiplexing.<br />

If we take a look at slot 7, we can see that node M shares this slot with nodes L and O. In a<br />

cycle, it is possible to send different frames from different nodes. It is also possible for<br />

Channels A and B to be asynchronous, i.e. for a given point of time, A has a different slot id<br />

than B.<br />

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Literature<br />

[Joch07]<br />

Jochim, M.: Zeitig steuern In: c’t Magazin für Computertechnik,<br />

http://publications.markusjochim.de/2007/<strong>FlexRay</strong>_Artikel_CT/Zeitig_steuern.pdf<br />

H. 2 S. 190-195, 2007<br />

[Göhn10] Göhner, P.: <strong>Automatisierungs</strong>technik I. Uni Stuttgart, Skript SS2010, S.<br />

227…229<br />

[Flex11 <strong>FlexRay</strong> Consortium: www.flexray.com, Stand 02/2011<br />

[FRPS05] <strong>FlexRay</strong> Consortium: <strong>FlexRay</strong> Communications System Protocol<br />

Specification, Version 2.1 Rev. A, 2005<br />

[FREPLA06] <strong>FlexRay</strong> Consortium: <strong>FlexRay</strong> Communications System Electrical Physical<br />

Layer Application Notes, Version 2.1 Rev. B, 2006<br />

[FREPLS06] <strong>FlexRay</strong> Consortium: <strong>FlexRay</strong> Communications System Electrical Physical<br />

Layer Specification, Version 2.1 Rev. B, 2006<br />

[FRRS05] <strong>FlexRay</strong> Consortium: <strong>FlexRay</strong> Requirements Specification, Version 2.1, 2005<br />

[LIN11] LIN Consortium: http://www.lin-subbus.org/, Stand 02/2011<br />

[MOST11]<br />

MOST Cooperation: http://www.mostcooperation.com/home/index.html, Stand<br />

02/2011<br />

[Vect11] Vector Informatik GmbH: www.vector.com, Stand 02/2011<br />

[VeSc11]<br />

Vector Informatik GmbH: Unterlagen zum <strong>FlexRay</strong> Workshop, In:<br />

CANoe/CANalyzer.<strong>FlexRay</strong> Workshop, 2011<br />

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