MULTI-SERVICE SWITCHING & ROUTING SOLUTIONS

MULTI-SERVICE 

SWITCHING & ROUTING 

SOLUTIONS 

PRODUCT GUIDE 

Asynchronous Crosspoint Switching 

Ethernet MACs 

Ethernet Switching 

Network Processors 

Optical Switching 

Packet and Cell Switching Fabrics 

Traffic Management 

Time Slot Interchange (TSI) Switching

Multi-Service Switching & Routings Solutions 

Solutions Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 

Network Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 

SECTION 1 

SECTION 2 

SECTION 3 

SECTION 4 

SECTION 5 

SECTION 6 

SECTION 7 

SECTION 8 

Asynchronous Crosspoint Switching Products . . . . . . . . . . . . . . . . . . . . .3 

•Dual 2x2 2.7 Gb/s Asynchronous Crosspoint Switch (VSC830) . . . . . .3 

•68x68 3.2 Gb/s Asynchronous Crosspoint Switch (VSC837) . . . . . . . . .3 

•36x36 3.2 Gb/s Asynchronous Crosspoint Switch (VSC838) . . . . . . . . .4 

•40x40 3.6 Gb/s Asynchronous Crosspoint Switch (VSC3138) . . . . . . . .4 

•72x72 3.6 Gb/s Asynchronous Crosspoint Switch (VSC3139) . . . . . . . .5 

•144x144 3.6 Gb/s Asynchronous Crosspoint Switch (VSC3140) . . . . . .5 

•Crosspoint Switch System Applications . . . . . . . . . . . . . . . . . . . . . . . . . .6 

Ethernet MAC Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 

•1x10 Gb Ethernet MAC - Meigs I (VSC7320) . . . . . . . . . . . . . . . . . . . . . . .7 

•10x1 Gb Ethernet MAC - Lansing (VSC7322) . . . . . . . . . . . . . . . . . . . . . . .7 

•8x10/100 Ethernet MAC - OctalMAC (VSC2800) . . . . . . . . . . . . . . . . . . . .8 

•Gigabit & 10 Gigabit Ethernet MAC Applications . . . . . . . . . . . . . . . . . .8 

Ethernet Switching Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 

•16x10/100/1000 Ethernet Switch - Heathrow-II (VSC7301) . . . . . . . . . . .9 

•24x10/100/1000 Ethernet Switch - Stapleford (VSC7303) . . . . . . . . . . .10 

•Heathrow II / Stapleford Comparison Chart . . . . . . . . . . . . . . . . . . . . . .11 

Network Processor Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 

•IQ2000 Programmable Network Processor (VSC2132) . . . . . . . . . . . . .12 

•IQ2200 Programmable Network Processor (VSC2232) . . . . . . . . . . . . .13 

•Vitesse NPU Developer’s Workbench (VSC2550) . . . . . . . . . . . . . . . . .14 

Optical Switching Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 

•8x8 All Optical Switch (VOS8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 

•64x64 All Optical Switch (VOS64) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 

Packet and Cell Switching Fabric Products . . . . . . . . . . . . . . . . . . . . . . .17 

•CrossStream E (VSC870/882) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 

•GigaStream (VSC872/882) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 

•TeraStream (VSC871/881) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 

•Typical TeraStream Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 

Traffic Management Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 

•OSCAR (VSC2401-25) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 

•PaceMaker 2.5 (VSC2400-25) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 

•Monitor 4.8 (VSC2450-00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 

Time Slot Interchange (TSI) Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 

•40 Gb/s STS-1 TSI IC (VSC9182) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 

•64x64 STS-48/STM-16 TSI Switch (VSC9185) . . . . . . . . . . . . . . . . . . . . .21 

•3024x3024 VT1.5 TSI Switch (VSC9187) . . . . . . . . . . . . . . . . . . . . . . . . . .22 

•VT1.5 Pointer Processor/ Column Aligner (VSC9188) . . . . . . . . . . . . . .23 

Sales Offices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 

About Vitesse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25

Multi-Service Switching & Routing: 

Solutions Overview 

A fundamental shift is occuring in the way businesses leverage 

networking and communications technology for their competitive 

advantage. Recognition, awareness, and proactive steps to 

meeting the diverse technology needs of the networking equipment 

OEM have long been the focus of Vitesse. 

While advances in communications technology have empowered our 

industry, those very advances have led to tremendous confusion and 

chaos in the marketplace. In the years ahead, we believe that the world 

will look back at this time as the one when networking was really invented. 

The products presented in this guide are the result of years of industry 

focus and best-of-class engineering activities centered around delivering 

highly integrated, maximum performance communication ICs. They have 

been designed with the Routing and Switching OEM in mind and have 

been optimized for interoperability and performance across the Vitesse 

product family. 

Multi-service systems are defined by Vitesse as common networking 

equipment that are required to handle multiple traffic types, such as TDM 

voice, ATM cells, and IP packets. In the access portion of the network 

these are represented by equipment such as DSLAMs and IADs; in the 

metro area network, edge routers and add/drop multiplexers; and within 

the core of the network, multi-service switches and core routers. All 

share some common requirements that Vitesse addresses through a 

family of products. By outlining the high level system requirements of 

these equipment types, we can demonstrate where Vitesse products find 

their sockets. 

We welcome you to explore the world of Vitesse...one Company...providing 

solutions to today’s challenges in networking and communications. 

Changing Requirements... 

Multiple Solutions... 

One Company. 

OVERVIEW 

1

Residential/ 

Enterprise 

Mobile 

Internet 

via 3G RAN 

Enterprise/Campus LAN 

FR/ATM/Gb Ethernet 

Switches/Routers VPN 

Gateway 

Residential/SOHO/ 

Enterprise via xDSL 

Cable, Fiber, 

Fixed Wireless 

TEL. 

PC 

Access 

CL5 

Server Farms 

Content Caches 

Hosted Apps., etc. 

PSTN 

VoIP 

Gateway 

SS7 

Access 

Switch/Router 

SoftSwitch 

MSPPS, etc 

Edge/Metro 

Gb/Tb 

Router 

ATM/MPLS 

GbE Switch 

Metro Optical 

Networks 

Core 

>200 DWDM 

Optical Core 

y 

Optical 

Switch 

Tb Router/ 

Optical Switch 

2 

NETWORK DIAGRAM

Asynchronous Crosspoint Switching Products 

Vitesse’s crosspoint switch family provides the broadest range of switch sizes from dual 2x2 to 144x144 matrices. Innovative features such as Input 

Signal Activity Monitoring, Integrated Signal Equalization for deterministic jitter reduction, and small package form factors enable a wide variety 

of different solutions such as SONET/SDH, Gigabit Ethernet, Fibre Channel, and HDTV standards. 

VSC830 

Dual 2x2 2.7 Gb/s Crosspoint Switch 

The VSC830 was the industry’s first 2x2 asynchronous crosspoint switch 

that supports FEC to 2.7 Gb/s per port. It is designed for critical signal 

path control and buffering applications such as loopback, protection 

switching and multi-channel backplane drivers/receivers. Signal path 

delay is tightly matched between each output channel to eliminate the 

need for delay path compensation when switching between signal 

sources. 

Features: 

•50 Ω Source Terminated Output Driver and Programmable 

Input Terminations 

•PECL Compatible High-Speed I/O 

•PECL/TTL Compatible Control Inputs 

•Power-Down Mode for Unused Outputs 

•Single 3.3 V Supply, 1 W (typ) 

•Compact 10 mm x 10 mm 44-Pin PQFP Package 

S1, S2 

A1 

Y1 

VSC837 

68x68 3.2 Gb/s Crosspoint Switch with Input Signal Activity 

Monitoring 

Supporting at data rates to 3.2 Gb/s, the VSC837 is a cost-effective member 

of the industry’s broadest crosspoint switch family. In addition to 

leading edge performance, the VSC837 provides enhanced flexibility with 

multiple programming modes, user-selectable input and output termination 

configurations, programmable output levels and Input Signal Activity 

monitoring to allow in-system diagnostics. A new innovative feature 

called Integrated Signal Equalization (ISE) is also included. ISE enhances 

the output jitter performance of the VSC837 by compensating for input 

jitter due to Inter Symbol Interference (ISI) generated by long, narrow PCB 

traces. 

Features: 

•Input Signal Monitoring (ISA) 

•Integrated Signal Equalization (ISE) for Deterministic Jitter Reduction 

•Selectable On-Chip I/O Termination 

•Hard and Soft Power-Down Modes for Unused Channels 

•TTL/2.5 V CMOS Control I/O (3.3 V Tolerant) 

•Non-Blocking Architecture with Broadcast and Multi-Cast Capabilities 

•Single 2.5 V Supply 

•High Performance 37.5 mm 480 TBGA Package 

A0 

2 

2 

Y0 

A2 

Y2 

S1, S2 

A1 

Y1 

A67 

2 

2 

Y67 

A2 

Y2 

P Control 

ASYNCHRONOUS CROSSPOINT SWITCHING PRODUCTS 

3 

SECTION ONE

VSC838 

3.2 Gb/s 36x36 Crosspoint Switch 

Supporting data rates to 3.2 Gb/s, the VSC838 is a cost-effective member 

of the industry’s broadest crosspoint switch family. In addition to 

leading edge performance, the VSC838 provides enhanced flexibility with 

multiple programming modes, user-selectable input and output termination 

configurations, programmable output levels and Input Signal Activity 

monitoring to allow in-system diagnostics. A new innovative feature 

called Integrated Signal Equalization (ISE) is also included. ISE enhances 

the output jitter performance of the VSC838 by compensating for input 

jitter due to Inter Symbol Interference (ISI) generated by long, narrow PCB 

traces. 

Features: 

•36x37 Switch Matrix 

•3.2 Gb/s NRZ Data Bandwidth 

•Integrated Signal Equalization (ISE) for Deterministic Jitter Reduction 

•Input Signal Activity (ISA) for in System Diagnostics 

•Programmable on Chip I/O Termination 

•Single 2.5 V Supply 

•6 W Typical Power (Low Drive Mode) 

– High Performance 37.5mm, 480 TBGA Package 

A0 

A35 

2 

2 

2 

2 

Y0 

Y35 

VSC3138 

3.6 Gb/s 40x40 Asynchronous Crosspoint Switch 

The VSC3138 is part of Vitesse’s latest crosspoint switch family designed 

to carry asynchronous broadband data streams. The fully non-blocking 

switch core is programmed through a multi-mode port interface that 

allows random access programming of each input/output port. Each 

high-speed output is a source-terminated fully differential switched current 

driver for maximum signal integrity. Data inputs are self-biasing and 

terminated on-die through 100 Ω resistors between true and complement, 

facilitating AC-coupling to the switch inputs. Unused channels can 

be powered down to allow efficient use of the switch in applications that 

require only a subset of the channels. A secondary access port allows 

asynchronous readback and configuration control to take place while the 

primary programming port is in use. 

Features: 

•40 Input by 40 Output Crosspoint Switch 


•Global and Per-Channel Programmable Input Signal Equalization (ISE) 

•On-board PRBS Generator/Detector 

•2.5 V / 3.3 V CMOS/TTL Control I/O 

•Differential CML Data Output Driver with Programmable Drive Level 

•Software Power-Down for Unused Channels 

•Secondary Access Port for Configuration and Monitoring 

•125 MHz Multi-Mode Program Port 

•Multi-Cast and “Striping” Programming Modes 

•On-Chip Input and Output Terminations 

•Single 2.5 V Supply, 3.3 V Option for Control Port 

•4.4 W Typical Power in Nominal Mode 

•Integrated Temperature Sensor/Alarm 

•High Performance BGA Package with PC Board Layout-Friendly Pinout 

P Control 

A0 

2 

2 

Y0 

A39 

2 

2 

Y39 

P Control 


4 

SECTION ONE

VSC3139 





allows random access programming of each input/output port. Each highspeed 

output is a source-terminated fully differential switched current 

driver for maximum signal integrity. Data inputs are self-biasing and terminated 

on-die through 100 Ω resistors between true and complement, 

facilitating AC-coupling to the switch inputs. Unused channels can be 

powered down to allow efficient use of the switch in applications that 




Features: 







•Software Power-Down for Unused Channels 




•On-Chip Input and Output Terminations 


•8 W/10 W Typical Power in Nominal/High-drive Mode 

•Integrated Temperature Sensor/Alarm 


A0 

2 

2 

Y0 

VSC3140 





allows random access programming of each input/output port. Each highspeed 

output is a source-terminated fully differential switched current 

driver for maximum signal integrity. Data inputs are self-biasing and terminated 

on-die through 100 Ω resistors between true and complement, 

facilitating AC-coupling to the switch inputs. Unused channels can be 

powered down to allow efficient use of the switch in applications that 




Features: 







•Software Power-down for Unused Channels 




•On-chip Input and Output Terminations 



A0 

2 

2 

Y0 

A71 

2 

2 

Y71 

A143 

2 

2 

Y143 

P Control 

P Control 


5 

SECTION ONE

Using Vitesse Crosspoint Switches: Example Configurations 

Rx 

Tx 

East 

SFF 

Rx 

Tx 

A1 

A2 

Y1 

Y2 

East Rx 

VSC830 

Y1 

Y2 

A1 

A2 

East Tx 

Processing and 

Conversion 

Functions 

Rx 

Tx 

West 

SFF 

Rx 

Tx 

A1 Y1 

A2 Y2 

VSC830 

Y1 A1 

Y2 A2 

Control 

West Rx 

West Tx 

Physical 

Media 

Interface 

1x/2x 

Fibre Channel 

Receiver 

1x/2x 

Fibre Channel 

Transmitter 

P 

Memory 

Automatic Protection Switching (APS) 

Line Cards 

Physical 

Media 

Interface 

1x/2x 

Fibre Channel 

Receiver 

1x/2x 

Fibre Channel 

Transmitter 

VSC837 

VSC838 

VSC3139 

VSC3140 

Physical 

Media 

Interface 

1x/2x 

Fibre 

Channel 

Receiver 

1x/2x 

Fibre 

Channel 

Transmitter 

Backplane 

Drivers 

VSC7216 

VSC7226 

Backplane 

Drivers 

VSC7216 

VSC7226 

Controller Cards 

VSC837 

VSC838 

VSC3139 

VSC3140 

Physical 

Media 

Interface 

1x/2x 

Fibre Channel 

Receiver 

1x/2x 

Fibre Channel 

Transmitter 

Power 

Supply 

Memory 

P 

VSC837 

VSC838 

VSC3139 

VSC3140 

SAN – Switch Application 

Power Supply Cards 

SAN – Director Application 


6 

SECTION ONE

Ethernet MAC Family 

Vitesse offers an array of superior MAC devices optimized for today's Ethernet customer. To fulfill customer applications ranging from switches and 

uplinks to point-to-point embedded applications and server adapters, Vitesse offers Ethernet MAC devices with differentiating factors ranging from line 

rate and port count to power and capacity. Today, this product family spans an impressive range from 10 Mb/s and 100 Mb/s to 10 Gigabits per second. 

VSC7320 Meigs I 

10 Gigabit Ethernet MAC 

Features: 

•10 Gigabit Ethernet Port with Non-Blocking Wire-Speed Performance 

•1024 Kbit Ingress FIFO and 768 Kbit Egress FIFO 

•10 Gb/s Operation via XGMII Interface 

•CSIX-64 FPGA-Friendly Host Interface 

•Advanced Aggregation/Trunking Based on SMAC/DMAC, MPLS and 

Preamble Information 

•Jumbo Frame Support 

•RMON, 802.3 and SNMP Statistics 

Targeted at high performance enterprise Ethernet LAN rack-based equipment, 

VSC7320 provides 10 Gigabit connectivity for switch/router uplink 

applications. 

The VSC7320 provides access to one 10 Gigabit full-duplex Ethernet port 

(XGMII) through a FPGA/ASIC-Friendly, fully standard-compliant, CSIX 

host interface. 

On-chip FIFOs capable of handling short-haul flow control are located 

between the Ethernet port and the CSIX-64 interface, eliminating the 

need for external memory. 

The advanced and flexible link aggregation and trunking functionality in 

Meigs-I (based on SMAC/DMAC and MPLS labels), allows the 10 GbE 

port to behave like ten separate virtual 10/100/1000 Mb/s connections 

on the CSIX host interface side. 

A comprehensive set of statistics counters are built into VSC7320 and the 

design takes into account the latest developments in emerging 10 Gigabit 

standard. 

Test features include cyclic replay of frames at a user-definable rate - 

either generated by the external CPU or captured from incoming traffic. 

XGMII 

VSC7322 Lansing 

10 Port Gigabit Ethernet MAC 

Features: 

•10 x 1 Gigabit Ethernet Ports with Non-Blocking Wire-Speed 

Performance 

•1024 Kbit Ingress FIFO and 1024 Kbit Egress FIFO 

•Tri-Speed (10/100/1000 Mb/s) Operation via RGMII/RTBI Interface 

•CSIX-64 FPGA-Friendly Host Interface 

•Advanced Aggregation/Trunking Based on SMAC/DMAC, MPLS and 

Preamble Information in Conjunction with VSC7320 

•Jumbo Frame Support 

•RMON, 802.3 and SNMP Statistics 

Targeted at high performance enterprise Ethernet LAN rack-based equipment, 

VSC7322 provides Gigabit line card connectivity for switch/router 

applications integrating 10 ports for reduced cost. 

VSC7322 is an advanced Ethernet MAC chip, allowing a system with a 

standard CSIX-64 host interface access to 10 tri-speed (10/100/1000 

Mb/s) Ethernet ports. 

On-chip FIFOs capable of handling short-haul flow control are located 

between the Ethernet port and the CSIX-64 interface, eliminating the 

need for external memory. 

VSC7322 can be used together with VSC7320 in a flexible port aggregation 

or port trunking mode. The scheme can be based on MAC addresses 

or MPLS tags. 

These features allow a 10 GbE connection to behave like ten separate trispeed 

connections, which make integration of 10 GbE into existing 

designs simpler. 

A comprehensive set of statistics counters supports the RMON 1, 

IEEE802.3, and SNMP standards. Test features include cyclic replay of 

frames at a user definable rate - either generated by the external CPU or 

captured from incoming traffic. 

10GbE MAC 

RGMII/RTBI 

FIFOs 

Tri-speed MAC 

10 x 1GbE 

FIFOs 

Dual 

MIIM 

CSIX-64 

Statistics 

CPU 

Serial I/F 

MIIM 

CSIX-64 

Statistics 

CPU 

Serial I/F 

ETHERNET MAC PRODUCTS 

7 

SECTION TWO

VSC2800 

Octal 10/100 Ethernet MAC for IQ2000 Family NPUs 

The VSC2800 OctalMAC is a single chip high-speed packet concentrator 

designed to communicate via the FOCUS16 Interface with Vitesse’s 

IQ2000 Architecture. The OctalMAC combines high performance packet 

transfer features, comprehensive packet-handing capabilities, and automated 

statistics gathering for network management support. The 

OctalMAC provides a cost effective solution with excellent performance 

when used in conjunction with Vitesse’s IQ2000 family processors. The 

integrated features of the OctalMAC offload the functions of the Network 

Processor while simplifying the design and lowering overall design costs. 

Vitesse’s OctalMAC allows the network processor to concentrate on providing 

next-generation services such as DissServ and IPSec while delivering 

wire-rate performance. The OctalMAC also reduces host processing 

requirements by providing automated gathering of RMON and SNMP network 

management statistics. 

Features: 

•8 10/100 Ethernet MAC Ports 

•Communicates via the FOCUS16 Interface—a Compact 80 MHz, 

16-Bit Dual Unidirectional Interface 

•Burst-Oriented Data Streaming 

•Standard MII or RMII Connections—Port Selectable 

•Statistics Gathering in Hardware 

•Jumbo Packet Support 

•Control, Statistics and Data Provided over the FOCUS16 Interface 

Gigabit and 10 Gigabit Ethernet MAC 

Application Examples 

CSIX-64 

VSC7320 

Meigs-1 

O/E 

10G Ethernet 

Application using VSC7320 directly to CSIX switch fabric to create 

10G switching connectivity 

10x1G 

VSC7322 

Lansing-1 

CSIX-64 

VSC7320 

Meigs-1 

O/E 

10G Ethernet 

Chipset application using the VSC7320 and VSC7322 back-to-back to 

aggregate 10 x 1G into 10G Ethernet 

CSIX-64 

VSC7322 

Lansing-1 

VSC7316 

Quad PHY 

VSC7316 

Quad PHY 

VSC7316 

Quad PHY 

10x1G 

Application using the VSC7322 and VSC7216 quad Copper-PHYs to 

create a gigabit switching line card 

FOCUS interface 

MII/RMII 

Interface (x8) 

FCS_TXD (15:0) 

FCS_TX_CLK 

FCS_TX_REQ 

FCS_RXD (15:0) 

FCS_RX_CLK 

FCS_RX_RDY 

FCS_RX_EXTCLK 

FOCUS 

Transmit 

Controller 

FOCUS 

Receive 

Controller 

x8 

x8 

x8 

x8 

Transmit 

FIFO 

Transmit 

Dataflow 

Controller 

Receive 

Dataflow 

Controller 

Receive 

FIFO 

MAC 

Control 

Sublayer 

10/100 

Transmit 

MAC 

TX stats 

10/100 

Receive 

MAC 

RX stats 

Mlln_TXD (3:0) 

Mlln_TX_EN 

Mlln_COL 

Mlln_TX_CLK 

RMll_CLK 

Mlln_RXD (3:0) 

Mlln_RX_DV 

Mlln_RX_ER 

Mlln_CRX 

Mlln_TX_CLK 

x8 

x8 

x8 

JTAG (5) 

Scan (2) 

SYS_RST_N 

JTAG, 

Scan, 

Reset 

Aux Channel 

Handler & 

Chip Registers 

SNMP/RMON 

Statistics 

Accumulator 

Statistics 

RAM 

Serial 

MII 

Mgmt. 

MDC 

MDIO 

ETHERNET MAC PRODUCTS 

8 

SECTION TWO

Ethernet Switching Family 

Since developing some of the industry's first commercial Gigabit Ethernet devices over a decade ago, Vitesse has focused on solving the needs 

of equipment manufacturers by delivering cost-effective, superior products that exploit the Company's broad system-level expertise and superior 

device technologies. 

The Vitesse family of Ethernet switching products are no exception to Vitesse's long history of delivering superior devices. In fact, our Ethernet 

Switching products lead the industry in price/performance while delivering a robust feature set to the OEM. 

Based on an internally developed, high-performance, scaleable architecture, Vitesse switching products are ideal for use in Enterprise, Access, 

and Metro networking equipment. 

Vitesse's Ethernet Switching product line is targeted at desktop/workgroup LAN connectivity that includes advanced tri-speed (10/100/1000 

Mb/s) Ethernet technology. 

VSC7301 Heathrow-II 

16-Port Gigabit Ethernet Switch 

The new 16-port Gigabit Ethernet Switch, Heathrow-II, is designed for 

ease of integration and has a modular design that offers a wide range of 

potential applications including tri-speed desktop switches, tri-speed 

access/aggregation switches, and as backplane or control plane fabric. 

This device provides a very high performance, flexible solution that meets 

not only today's, but tomorrow’s challenges in networking and communication 

technology without the time-to-market constraints, fixed-function 

limitations, and short product life cycles usually associated with ASIC 

technology. As such, the architecture of Heathrow-II is designed to take 

advantage of emerging and future technologies; effectively allowing you 

to “future-proof” your switching applications. 

Features: 

•16 Gigabit Ethernet Ports with Non-Blocking Wire-Speed Performance 

•32 Gb/s Internal Switching Bandwidth, 24 Mp(packets)/s Forwarding Rate 

•Tri-speed (10/100/1000 Mbit/s) Operation via MII/(R)GMII/(R)TBI 

Interface 

•4-Wire Low Cost Serial Microcontroller Interface for Unmanaged 

Switches 

•16-Bit Parallel CPU Interface for SNMP and Web-Based Management 

•272 KB On-Chip Frame Buffer 

•Programmable Classifier for QoS (Layer 4/Multi-Media) 

Targeted at desktop/workgroup LAN connectivity, Heathrow-II offers new 

levels of integration and performance for Gigabit Ethernet switch applications. 

The Heathrow-II architecture enables both unmanaged and managed 

designs using two different CPU interfaces. 

protocols such as GxRP, STP, and IPMC. This makes Heathrow-II an ideal 

choice for future switch applications. 

Heathrow-II provides non-blocking, wire-speed Gigabit performance on 

all ports. The switching engine with filtering/forwarding functions and 

queuing capabilities eliminates any requirements for external memory 

devices in the system design, enabling low cost, high-performance solutions. 

The modular design eases integration and offers a wide range of potential 

applications including tri-speed desktop switches, access/aggregation 

switches, a plane back controller, or as control plane controller. 

Additionally, the device is scalable making it possible to build a 16-port 

switch using one chip, or a 24-port switch using two chips. 

Rx 

FIFO 

Categorizer 

Tx 

FIFO 

10/100/1000 MAC 

Port Block 

MII/(R)GMII/ 

(R)TBI 

0 . . . 15 

Rx 

FIFO 

Categorizer 

Tx 

FIFO 

10/100/1000 MAC 

Port Block 

Frame Bus 

MII/(R)GMII/ 

(R)TBI 

Analyzer/Arbiter 

CPU Interfaces 

MII Management 

Intefaces 

Control/Status 

Registers 

PI 

MIIM 

SI 

In addition to the inexpensive serial interface, Heathrow-II features a 

high-bandwidth, 16-bit parallel interface to enable web-based or SNMP 

management as well as allowing for CPU control over a range of routing 

ETHERNET SWITCHING PRODUCTS 

9 

SECTION THREE

Applications 

VSC7303 


10 

SECTION THREE 

Stapleford—High Service 24-Port Gigabit Ethernet Switch 

Standalone 16-Port Gigabit Ethernet Switch 

This is how simple it is to build an unmanaged 16-port gigabit Ethernet 

switch with Heathrow-II: 

4-wire 

Built using the same extensible technology as Heathrow-II, Stapleford 

provides unparalleled price/feature/density in the Ethernet switching silicon 

market today. 

Features: 

8051 

Serial I/F VSC7301 

Heathrow-II 

24-port Single Chip Solution 

GMII 

•Wire-Speed, Non-Blocking Design 

TBI 

GMII 

•Integrated 400 KB frame buffers (eliminates the need for external memory) 

GMII 

Automatic Address Learning 

Quad Cu 

Quad Cu 

Quad Cu 

Quad Cu 

PHY 

PHY 

PHY 

PHY 

•Wire Speed 

VSC7316 VSC7316 VSC7316 VSC7316 

•8 K MAC address table 

RMGII/TBI Interfaces Support 10/100/1000 Mb/s Operation 

Jumbo Frame Support 

The diagram shows a complete 16-port switch with 12 copper ports, and 

•Configurable Up to 9 K Bytes 

four optical ports that could be used for longer cabling, or uplink purposes. 

In this example the low cost 8051 microcontroller is utilized. Typical 

Per-Port Bandwidth Policing and Shaping 

•Leaky Bucket Based 

applications for such a system are Desktop Switches and Access 

•0-1 Gb/s Linear Granularity 

Switches. 

Broadcast Storm Control 

•Broadcast and Multi-Cast 

Heathrow-II Control Plane Solution 

Gigabit Ethernet is also well suited for controlling chassis-based systems. 

This is how such a solution could be realized: 

Flexible Control Interfaces 

•Four-Wire Serial CPU Interface (unmanaged configuration) 

•16-Bit parallel CPU Interface (managed configuration) 

•MII Management (MIIM) Interface 

Optional Control Port 

Robust Quality of Service Support 

16-bit 

•Based on Layer 2-4 Information and IEEE 802.1p Tags 

Parallel IF 

CPU 

VSC7301 

Heathrow-II 

•802.2 DSAP, UDP/TCP Port ID, 64 DSCPs per Port 

IEEE Standard 802.3q VLAN and VMAN Support (Double Tags) 

4x TBI 

•Full 4K VLAN Table 

•Priority-Based VMAN Labeling 

Quad 

Quad 

Quad 

Quad 

SerDes 

SerDes 

SerDes 

SerDes 

VSC7216 VSC7216 VSC7216 VSC7216 

Flexible Link Aggregation 

•802.3ad 

•2-12 Port Link Aggregation Groups (up to 16 ports per group) 

Protocols Supported 

•Spanning Tree (STP) and MSTP 

The use of serial interconnects via the VSC7216 Quad SerDes makes signal 

distribution across a chassis simple. The line cards could be fitted 

•IGMP Snooping 

with the VSC7212 single SerDes. Depending on the CPU used, an optional 

Control Port (e.g., Ethernet or RS-232) can be implemented for remote, •LACP (802.3ad), EFM OAM 

•GARP, GVRP, GMRP 

out-of-band (and, therefore secure) management.

Applications with Stapleford 

Comparing Heathrow-II and Stapleford 

Quad 

PHY 

CPU 

16-bit 

CPU IF 

RGMII / RTBI 

Quad 

PHY 

Quad 

PHY 

VSC7303 

Stapleford 

Quad 

PHY 

24-port Tri-Speed GbE Switch Example 

Quad 

PHY 

Managed and unmanaged desktop/workgroup switches 

Layer 2 wire-speed non-blocking operation 

Fully integrated designs with on-chip memories 

Scalability for 16/24/32 GbE ports 

Quad 

PHY 

Features Heathrow-II Stapleford 

Number of 10/100/1000M 16 24 

Onchip buffer 272 Kbytes 400 Kbytes 

Architecture Non-Blocking Non-Blocking 

wirespeed wirespeed 

MAC interfaces R/G/MII, R/TBI RGMII, RTBI 

MAC addresses 4K 8K 

Policing/Shaping No Yes (per port) 

Jumbo Pkt support No Yes (9Kbytes) 

Link aggregation Yes (2 to 8 Port) Yes (2 to 12 Port) 

SNMP, RMON stats Yes Yes 

Flow control, STP, GxRP, Yes Yes 

& IGMP 

QoS (Layer 4 classification) Yes (2 Priorities) Yes (2 Priorities) 

VMAN support (Double VLAN tag) No Yes 

VLAN 4K 4K 

Package 680 TBGA 680 TBGA 

(40x40mm) (40x40mm) 

Power dissipation 6 Watts TBD 

Unmanaged solution 8 bit µC (e.g 8051) 8 bit µC (e.g 8051) 

Managed solution e.g 8051 or CPU e.g 8051 or CPU 


11 

SECTION THREE

Network Processors 

Change is afoot in the network hardware manufacturing marketplace as demands for very high-speed, service-enabled products eclipse those for 

more traditional Layer 2/3 routing and switching offerings. The combination of hardware acceleration needs, direct support for IP services/features, 

and demands for longer product life cycles with reduced time-to-market has given birth to the Programmable Network Processor. 

Hardware vendors are in need of an "adjunct" processing solution that addresses both current and future challenges in network evolution; successfully 

meeting these challenges through standard products is key to maintaining a competitive edge. 

The IQ2x00 family of network processors enable innovation by providing a high-performance, flexible solution that meets today's challenges in networking 

and communication technology without the time-to-market constraints, fixed function limitations, and short product life cycles associated 

with ASIC technology. 

IQ2000 

Packet Inputs 

Features: 

•Four Integrated 200 MHz, Fully Programmable, Multi-Context Packet 

Processing Engines 

•Flexible, High Bandwidth I/O Interface Capability (from DS-0 to OC-48) 

•High Performance, Patented Internal Architecture (50 Gb/s) 

•Control Plane Processor Independence (native support for MIPS, 

PowerPC, and other RISC implementations) 

•Specialized Co-Processors for Lookup, Order Management, Multicast 

Support, DMA Management, and Context Management 

•Optimized Instruction Set for Network Operations 

•Per Flow Queuing Support for Up to a Half-Million Flows 

•Hardware Support for Quality (QoS) of Service Building Blocks 

•Comprehensive Development Tools 

•Next-Generation Service Acceleration: MPLS, DiffServ, IPSec, 

Provisioning, AAA, Server Load Balancing, and More 

IQ2000 Feature and Part Selection Guide 

Host 

Interface 

Standard 

CPU 

CPU 

A 

Classification Engines 

Order Management 

Input Streaming Bus 

CPU 

B 

CPU 

C 

Output Streaming Bus 

Queue Management 

Qos Engines 

CPU 

D 

Lookup Bus 

SRAM Bus 

SRAM 

Interface 

Rambus 

Memory 

Controller 

RDRAM 

IQ2000 Part No. 

FOCUS Port Configuration 

VSC2100 VSC2102 VSC2132 FOCUS A FOCUS B FOCUS C FOCUS D 

• • • 

FOCUS 16 FOCUS 16 FOCUS 16 FOCUS 16 

• • • 

FOCUS 16 FOCUS 16 FOCUS 32 

- • • 

GigaMAC FOCUS 16 FOCUS 16 FOCUS 16 

- • • 

GigaMAC FOCUS 16 

FOCUS 32 

- • • 

GigaMAC GigaMAC FOCUS 16 FOCUS 16 

- 

GigaMAC GigaMAC 

FOCUS 32 

• • 

- - • 

FOCUS 32 

FOCUS 16 FOCUS 16 

- - • 

FOCUS 32 

FOCUS 32 

• = featured configuration - = featured not available 

Packet Outputs 

(provisioned and forwarded) 

IQ2x00 Internal Diagram 

Optional 

SRAM 

* FOCUS C & FOCUS D ports also serve as the CSIX-L1 Interface 

NETWORK PROCESSOR PRODUCTS 

12 

SECTION FOUR

IQ2200 

Features: 

•Fully Firmware-Compatible and Pin-Compatible with IQ2000 

•Double the IQ2000 Performance at Half the Power with Four Fully 

Programmable, Multi-Context Packet Processing Engines 

•Flexible, High Bandwidth I/O Interface Capability 

•High Performance, Patented Internal Architecture (100 Gb/s) 

•CSIX-L1 Fabric Interface 

•Control Plane Processor Independence (native support for MIPS, 

PowerPC, and other) 

•RISC Implementations 

•Specialized Co-Processors for Lookup, Order Management, Multi-Cast 

Support, DMA 

•Management and Context Management 

•Optimized Instruction Set for Network Operations 

•Per-Flow Queuing Support for up to a Half-Million Flows 

•Hardware Support for Quality (QoS) of Service Building Blocks 

•Comprehensive Development Tools 

•Next Generation Service Acceleration: MPLS, DiffServ, IPSec, 

Provisioning, AAA 

•Server Load Balancing, and More 

IQ2200 Feature and Part Selection Guide 

IQ2200 Part No. FOCUS Port Configuration 

VSC2200 VSC2201 VSC2232 FOCUS A 

• • • 

• • • 

FOCUS 16 FOCAS 16 FOCUS 32 

- • • 

- • • 

GigaMAC FOCAS 16 

FOCUS 32 

- • • 

- • • 

GigaMAC GigaMAC 

FOCUS 32 

- - • 

FOCUS 32 

- - • 

FOCUS 32 

FOCUS 32 

• = featured configuration - = featured not available 

FOCAS B FOCUS C FOCUS D 

FOCAS 16 FOCAS 16 FOCAS 16 FOCAS 16 

GigaMAC FOCAS 16 FOCAS 16 FOCAS 16 

GigaMAC GigaMAC FOCAS 16 FOCAS 16 

* FOCUS C & FOCUS D ports also serve as the CSIX-L1 Interface 

FOCAS 16 FOCAS 16 

Fabric Interface 



CSIX/ 

FOCUS32 

FOCUS32 

IQ2200 

VSC2232 

Programmable 

Network 

Processor 

Optical Interface 

(up to OC-48) 

CSIX/ 

FOCUS16/32 

IQ2200 

VSC2202 

Programmable 

Network 

Processor 

Gigabit 

PHYs 

Gigabit 

PHYs 

CSIX/ 

FOCUS16/32 

FOCUS16 

IQ2200 

VSC2200 

Programmable 

Network 

Processor 

10/100 

OC-3 to OC-12 

Low Speed Aggregation 

FOCUS16 

A 

g 

g 

r 

e 

g 

a 

t 

i 

o 

n 

N 

e 

t 

w 

o 

r 

k 

DSL 

ATM 

DS3 

POS 

DS3 

ATM 

OC3 

POS 

OC3 

ATM 

OC12 

POS 

OC12 

DS3 

Framer 

SAR/Framer 

SAR/Framer 

SAR/Framer 

MUX 

Data Path 

Software 

Network 

Processor 

IP 

Control Path 

Software 

Standard 

Processor 

Frabric 

IQ Family Application 

Programmable 

Network 

Processor 

Framer 

Programmable 

Network 

Processor 

OC48 

POS 

B 

a 

c 

k 

b 

o 

n 

e 

N 

e 

t 

w 

o 

r 

k 

IQ2200 Internal Diagram 


13 

SECTION FOUR

Vitesse NPU Developer's Workbench 

Delivering Performance and Flexibility 

The Vitesse NPU Developer's workbench is a comprehensive engineering 

environment that enables rapid OEM development of communications 

systems solutions. 

A combined hardware, development tools, and reference software offering, 

the Developer's Workbench enables engineers to rapidly develop, 

simulate, characterize, and optimize code for the IQ family of intelligent 

network processors. This flexible facility provides a robust execution path 

for system-level prototyping and greatly accelerates product time-to-market 

and increases product time in market. 

The Workbench is comprised of highly integrated elements, including: 

•The Vitesse NPU Software Development Kit 

•The Vitesse NPU MACRO Function Library 

•The VISIONS Network Application Software Suite 

•The Vitesse NPU Tool Kit of Specialty Networking Algorithms 

•The IQ2000 Hardware Development System 

•The IQ2200 Hardware Development System 

Developers can choose individual elements or the entire offering 

depending on their particular product or specialty application needs. 

The Vitesse NPU Software Development Kit 

The NPU Software Development Kit (SDK) brings together all the tools 

and code sources needed to successfully develop applications for the 

IQ2000 and IQ2200 families of intelligent network processors. 

The SDK includes: 

•IQ-C Optimizing Compiler—an open-source C/C++ optimizing 

compiler for the IQ family of network processors. Based on a superset 

of ANSI 'C', the compiler incorporates language extensions and a set 

of specialty intrinsics (built-in functions that do not incur the overhead 

of traditional function calls) that take advantage of the IQ-optimized 

architecture and support all on-chip hardware acceleration features for 

networking operations. To preserve customer investment in assembly 

code, an in-line assembly capability is provided to maximize re-use. 

•Red Hat GNUPro Tools—standards-based, open-source tools for the IQ 

family of network processors. Includes assembler, linker, and binary 

utilities. 

•The Vitesse Debugger (VDB)—a visual source-level debugger that 

supports IQ-based assembly programs and 'C' programs running under 

the Vitesse simulation framework, on the Vitesse IQ2x00 family of 

Hardware Development Systems, or customer hardware. 

•IQ2x00 Simulation Framework (Simumatic)—an open, cycle-based, 

data-accurate simulation framework for the IQ2x00 family of network 

processors and peripheral devices. 

•Simulation Models—comprehensive (end-to-end, not just CPU-centric) 

simulation models of the IQ2000, IQ2200, OctalMAC, FOCUS CON- 

NECT, and certain partner devices that run under the Simumatic 

simulation framework. 

•IQ-Traffic – a graphical utility for creating packet traffic to drive the 

simulation framework. 

•IQ-Audit – a graphical debugging utility for analysis and reporting of 

chip buffer state. 

•IQ-Sherlock –a graphical, rules-based expert system that analyzes 

customer core files, OEM hardware configurations, Vitesse hardware 

configurations, and simulation target configurations for common 

development mistakes. Significantly reduces OEM debug time while 

providing comprehensive advice on solving error conditions as well as 

optimizing hardware/software configurations. 

•IQ-Profile—a graphical performance profiler that helps developers 

locate and correct inefficient NPU code. Supported in simulation, on 

Vitesse hardware, and OEM hardware. 

•IQ-Example—complete example implementations for Layer-2 and 

Layer-3 packet forwarding designed to run on the Vitesse simulation 

framework or on Vitesse hardware. 


14 

SECTION FOUR

The Vitesse NPU MACRO Function Library 

The IQ2000 Hardware Development System (HDS) 

The Vitesse MACRO function library is an extendable series of virtual 

tomes designed to make packet processing easier for the developer. 

These highly optimized routines may be referred to for learning purposes 

or incorporated directly into OEM applications. Routines implemented in 

the MACRO function library include the following: 

•Packet Management 

•Header Management 

•Host Management 

•Counter Management 

•Queue Management 

•Initialization 

•Interrupts 

•Exception Handling 

Flash 

PROM 

optional 

MIPs 

Microprocess 

or on 

Daughter 

32 or 64 bit 

MIPS SYAD bus 

Boot 

PROM 

RDRA 

SRA 

Debugger Connection 

(Serial Port/10BT Port) 

Network 

Processor 

Gigabit 

PHY 

Optics 

Gigabit 

PHY 

Optics 

FOCUS 

Multi-Agent 

option 

OctalMAC 

Network 

Processor 

OctalMAC 

10/100 PHYs 

Flash 

PROM 

RDRA 

SRA 

Boot 

PROM 

MIPs 

Microprocess 

or on 

Daughter 

32 or 64 bit 

MIPS SYAD bus 

EVB21002 

The VISIONS Network Application Software Suite 

Describing individual network processor capabilities in OEM networking 

terms has been a difficult task for silicon vendors in the NPU space. The 

VISIONS program provides integrated, real-world hardware and software 

implementations for customer consumption (either for evaluation and 

testing or for incorporation into their product offerings). The VISIONS 

packages include specialty hardware, application notes, reference board 

schematics, software specifications, code offerings, and independent 

test metrics in the following areas: 

•IPv4 Routing and Switching With IETF Differentiated Services, 

Per-Flow Policing, and Network Address Translation 

•IPv4 Routing and Switching With MPLS LER and LSR Functions 

(including CR-LDP) 

•IPv4 Routing and Switching With L2TP and IPSec VPN Support 

The IQ2000 is the one of the hardware components of the Vitesse 

Developer's Workbench. The HDS provides a high-performance environment 

that enables rapid prototyping and architectural validation of OEM 

networking applications. The IQ2000 HDS is powered by a pair of IQ2000 

Intelligent Network Processors and comes configured at a 2 GbE x 16 

10/100 Ethernet routing switch. Complete specifications or a demonstration 

are available from your Vitesse sales associate. 

The IQ2200 Hardware Development System 

The IQ2200 Hardware Development System is on the cutting edge of 

integrated design. Demonstrating the Vitesse PHY to Fabric story like no 

other vendor, the IQ2200 HDS comes in a variety of configurations 

depending on the evaluation requirements of the OEM. Complete specifications 

or a demonstration can be arranged through your Vitesse sales 

associate. 


15 

SECTION FOUR

Optical Switching Products 

Enabling the “All-Optical” Network 

The demand for the “all-optical” network has created an emerging segment of transport equipment that requires integrated circuits with new and 

innovative architectures. Optical components and devices with performance monitoring and forward-error-correction (FEC) are needed for Dense 

Wavelength Division Multiplexing (DWDM) transponders and optical cross-connects. For terabit routers, Vitesse has the most highly integrated, 

lowest power, space efficient mappers, framers and packet/cell switching fabrics for clear channel data streams and the most efficient use of bandwidth 

in the core network. Vitesse is also actively leading the way in creating devices that will support the requirements of emerging standards 

in the optical transport network. 

VOS8 

All-Optical Switch Engine 

VOS8 is an 8x8 all-optical non-blocking switch that enables cost-effective, 

scalable network architectures in an efficiently packaged case. 

Vitesse’s VOS8 is a bit-rate and format-independent switch with one of 

the lowest insertion loss ratings (1dB typical) in the 8x8 switch category. 

VOS8 incorporates unique real-time active optical alignment circuitry 

(Versalign) to compensate for operating environment changes, such as 

temperature, humidity and vibrations. 

The VOS8 offers fast optical switching in less than 10 ms, necessary for 

SONET protection applications. VOS8 also has a wide input signal 

dynamic range from -16 dBm to +20 dBm. 

As part of the VOS8s management and control capabilities, both data 

and control/management functions are integrated into the same connector. 

Features: 

•All-Optical 8x8 Non-Blocking Switch 

•Very Low Insertion Loss (

Packet & Cell Switching Fabric Products 

Vitesse has been a pioneer in merchant silicon switch fabric solutions, releasing to production its first family of devices in 1999. Since then, we 

have continued to provide customers with the highest performance fabric solutions with exceptional features and price. Vitesse is currently supplying 

its third generation of switch fabric products and can provide fabric solutions for enterprise, access, metro and core equipment. 

VSC870 & VSC882 

CrossStream E Intelligent Switch Fabric 

The CrossStream E chipset is a complete high performance synchronous 

switch fabric solution composed of the VSC870—a scalable synchronous 

serial transceiver, and the VSC882—a 16x16 serial crosspoint 

switch. Together, the VSC870 transceiver and the VSC882 switch support 

architectures of up to 16 OC-48 ports a with a fully redundant configuration. 

The VSC870 transceiver and VSC882 switch are optimized for use in both 

distributed-controlled packet-based switching systems (packet mode) 

and centrally controlled cell-based switching systems (cell mode). The 

VSC870 parallel interface supports automatic packet retransmission, 

multicast with retransmission, and camp-on as well as supporting virtual 

output queuing structures. The CrossStream E solution can switch either 

self-routing, variable length packets or fixed length cells, making the 

architecture ideal for applications using IP or ATM. 

Features: 

•Three Operational Modes: Packet, Cell, and Direct 

•High Bandwidth Serial Links (2.125 Gb/s) Minimize Backplane 

Complexity 

•Word Synchronous Backplane Eliminates Lock Time After Switch 

Reconfigurations 

•Configurable for Self-Routing of Variable Length Packets or Centrally 

Controlled Switching of Fixed Length Cells 

•Packet Mode Supports Virtual Output Queues to Maximize Backplane 

Utilization 

•Packet Mode Supports Multicast with Automatic Recast 

•Redundant Serial I/O in Transceiver Supports Redundant Switch Card 

•Designed for Fault Isolation and Hot Swap 

VSC872 & VSC882 

GigaStream Intelligent Switch Fabric 

The GigaStream chipset is a high performance, multi-protocol switch 

fabric consisting of two integrated circuits: the GigaStream Queuing 

Engine (VSC872) and the GigaStream Crossbar Switch (VSC882). Targeted 

at both the access and metropolitan markets, GigaStream enables networking 

equipment manufacturers to build routing and switching systems 

capable of providing a maximum of 80 Gb/s of aggregate user bandwidth 

with up to 320 Gb/s of highly available backplane bandwidth. 

GigaStream provides support for sophisticated Quality of Service (QoS) 

algorithms, distinct handling for both uni-cast and multi-cast traffic, as 

well as multi-services. 

Features: 

•Highly-Integrated, Two-Chip Set 

•Aggregate User Bandwidth of up to 80 Gb/s 

•Single-Stage Aggregate Backplane Bandwidth of up to 320 Gb/s 

•Maximum Port Configurations of Up to 32x32 OC-48 or 64x64 Gigabit 

Ethernet 

•Flexible N+1 and N+N “Active Redundancy Schemes” 

•Integrated Queuing, Central Scheduling and Crossbar Switching 

•Sophisticated QoS with Eight Priorities 

•Advanced Uni-cast and Multi-Cast Support 

•Field Proven, High-Speed 2.644 Gb/s Serial Link Technology 

2 x GbE 

2 x GbE 

PHY 

O/E 

PHY 

O/E 

NPU/ 

TM 

NPU/ 

TM 

CSIX 

CSIX 

VSC872 

Queuing 

Engine 

Primary 

Switch Card 

VSC882 

Fabric 

Switch 

VSC882 

Fabric 

Switch 

OC 48 

OC 48 

PHY 

O/E 

PHY 

O/E 

NPU/ 

TM 

NPU/ 

TM 

CSIX 

CSIX 

VSC872 

Queuing 

Engine 

VSC882 

Fabric 

Switch 

VSC882 

Fabric 

Switch 

Typical GigaStream Configuration 

Secondary 

Switch Card 

P ACKET & CELL SWITCHING FABRIC PRODUCTS 

17 

SECTION SIX

VSC871 & VSC881 

TeraStream Intelligent Switch Fabric 

The TeraStream product is a third generation Intelligent Switch Fabric 

using Vitesse's proven high-speed serial link technology. This product 

consists of the VSC871 Queuing Engine and the VSC881 Packet Exchange 

Matrix, and supports aggregate user bandwidths of up to 160 Gb/s with 

port speeds reaching 10 Gb/s. 

The TeraStream chipset integrates advanced queuing and scheduling, a 

synchronous serial crossbar, and multiple SerDes in a dual-chip fabric 

architecture. Transmission between each line card and one or more 

switch cards is conducted entirely in-band via the integrated SerDes. This 

results in a high-performance, cost-effective switch fabric with a low 

overall chip count to minimize power, design complexity and board space 

requirements. 

2 x GbE 

OC-48 

OC-48 

2 x GbE 

OC-192 

CSIX 

CSIX 

CSIX 

CSIX 

CSIX 

SPI-4.2 

Line Card 1 

VSC871 

Queuing 

Engine 

VSC871 

Queuing 

Engine 

The TeraStream Packet Exchange Matrix supports 32x32 high-speed, selfclocking 

serial links, each operating at a maximum user data rate of 2.5 

Gb/s. Multiple chips can be combined to increase the overall port bandwidths 

to support dense system configurations such as 64x64 OC-48 and 

Line Card N 

16x16 OC-192. In addition, the TeraStream switch fabric protects the 

Typical TeraStream Application 

user’s line card investment with a seamless upgrade option to future 

members of the TeraStream family of switch fabrics. 

Features: 

•Highly-Integrated, Two-Chip Set for Reduced Implementation Cost 

•Integrated SerDes 

•Single-Stage Aggregate User Bandwidth of Up to 160Gb/s 

•2x backplane speedup 

•Maximum Configurations of Up to 16x16 OC-192, 64x64 OC-48, or 

Any Combination of OC-192/OC-48 

•High Availability with Zero Loss of Traffic During Redundant 

Switchover 

•Field-Proven, High-Speed Serial Link (HSSL) Technology 

P ACKET & CELL SWITCHING FABRIC PRODUCTS 

18 

SECTION SIX 

Working 

Switch Card 

VSC881 

Fabric 

Switch 

VSC881 

Fabric 

Switch 

Protection 

Switch Card

Traffic Management Products 

VSC2400-30 

PaceMaker 

The PaceMaker device, with its state of the art Quality of Service (QoS) 

features, supports full OC-48 data rate while delivering packet and cell 

classification, policing, wire speed AAL5 SAR, a dual leaky bucket 

shaper, and an optimum “Earliest Deadline First” (EDF) scheduler that 

provides new capabilities in traffic management. The PaceMaker 3.0 also 

supports an unrestricted number of multicast leaves, VC merging, and 

label swapping. 

Driven by the demand for enhanced services for the Internet infrastructure, 

PaceMaker 3.0 was developed to provide new QoS and Class of 

Service (CoS) capabilities to systems that make up the Internet infrastructure. 

Based upon leading research into congestion management theory 

and traffic modeling, PaceMaker 3.0 is the first device to address the 

immediate problem of QoS for Internet users. 

Control Memory 

Packet Memory 

VSC2401-30 

OSCAR 

The OC-48 Segmentation and Reassembly (OSCAR) device is a highly integrated 

cell and packet processing engine that integrates two of the most 

common functions found inside today’s high-speed networking equipment. 

OSCAR supports a full OC-48 data rate while delivering packet and cell 

classification and policing, as well as wire speed AAL5 SAR functions. 

OSCAR delivers flexible policing and packet and cell conversion, according 

to industry standards including ATM AAL5. 

Features: 

•Complete Interworking Capabilities: OSCAR provides complete packet 

and cell interworking capabilities for multiservice applications 

•AAL5 SAR: Unified Packet and Cell buffer and traffic management 

architecture for integrated voice, video and data 

Host PCI Interface 

RDRAM Interface 


Backpressure 

Interface 

UTOPIA/POS PHY 

Interface 

Traffic Classifier 

Traffic Policer 

Traffic 

Manager 

OC-48 

AAL5 

SAR 

Traffic Shaper 

Traffic Scheduler 

Label Swapper 

UTOPIA/POS PHY 

Interface 

SRAM Interface SRAM Interface SRAM Interface 

Features: 

Overview 

•OC-48 Throughput 

•Manages 256 K Output Queues 

•1 M Buffer Shared Memory 

Policer 

•GCRA-Compliant Dual Leaky Bucket Policer 

•Weighted Random Early Discard (WRED) 

•Early Packet Discard/Partial Packet Discard 

AAL5 SAR 

•OC-48 AAL5 SAR Supporting 256 K Sessions 

Traffic Management 

•Dual Leaky Bucket Shaper 

•Per-Session Output Queuing for up to 256 K Sessions 

•EDF Scheduler Provides Guaranteed Delay and Rate Services 

•Per-Port Backpressure 

•Deficit Round Robin (DRR) Scheduler That Supports IP Precedence 

Classes 

•GFR Service for Cell/Frame/Packet Traffic 

Statistics 

•Per-Port and Per-Session Statistics Collection 

•Statistics Collection for Billing and Monitoring 

TRAFFIC MANAGEMENT PRODUCTS 

19 

SECTION SEVEN

VSC2450-00 

Monitor 4.8 

The Monitor 4.8 is a single chip device that provides a comprehensive set 

of ATM Layer functions. It is a hardwired implementation of the ITU I.610 

Operations, Administration, and Maintenance (OAM), I.630 Protection 

Switching (PS) and I.371 GCRA Policing specifications and provides support 

for 256 K bi-directional independent ATM VCs at an aggregate rate 

of OC-48 full duplex. 

The Monitor 4.8 provides full support for all 256 K connections for OAM 

Fault Management processing (AIS/RDI/CC), Performance Management 

(forward and backward cell generation) and ATM Layer Protection 

Switching processing (1:1 and 1+1 configurations). A standard GCRA dual 

leaky bucket policer (or GFR policer) with Partial Packet discard capability 

for non-compliant AAL5 frames is also provided. The Monitor 4.8 maintains 

a comprehensive set of per connection/per port statistics and provides 

a standard 32-bit PCI CPU interface port for configuration, statistics 

gathering and non-intrusive monitoring for any of the OAM/PS cell flows 

by the host CPU. 

Cell Control Memory 

Features: 

Overall 

•Full Duplex OC-48 Operations, Administration, Maintenance 

(OAM) and Protection Switching (PS) Processing 

•Source/sink Operations for up to 256 K Bi-Directional Connections 

Simultaneously 

•Supports VP, VC, VP-to-VC, and VC-to-VP Switching 

•Compliant with ITU I.610, I.371 and I.630 Recommendations 

Operations, Administration, Maintenance (OAM) 

•AIS, RDI, CC Cell Generation Timers 

•AIS, RDI, CC Cell Receive Timers 

•Performance Management (PM) Forward Monitoring Cell Generate and 

Receive Processes 

•Loopback Cell Processing 

•PM Backward Reporting Cell Generation 

•Activation/Deactivation Protocol State Machine 

•All OAM Capabilities are Available on a Per-Connection Basis 

Protection Switching 

•Individual or Group Protection on a Per-Connection Basis 

•1+1 and 1:1, Revertive/Non-revertive Architectures 

•On-chip Global Priority Logic and APS Cell Generation Process 

SRAM Interface 

UTOPIA3 

Interface 

GRCA 

Policer 


OAM 

Ingress 

Processor 

SRAM Interface 

Protection 

Switching 

Protection 

Switching 

UTOPIA3 

Interface 

UTOPIA3 

Interface 

UTOPIA3 

Interface 

OAM 

Ingress 

Processor 

Policer 

•ITU I.371 Compliant 

•Dual Leaky Bucket 

•Guaranteed Frame Rate 

•Partial Packet Discard for Nonconforming AAL5 Frames 

Host PCI Interface 


Cell Control Memory 

TRAFFIC MANAGEMENT PRODUCTS 

20 

SECTION SEVEN

Time Slot Interchange (TSI) Switching Products 

Vitesse’s Time Slot Interchange devices groom multiple SONET/SDH and PDH tributaries at the STS-1/VC-3 and VT/TU levels. They interface 

directly to the Vitesse SONET/SDH and PDH framers, mappers, and pointer processors. 

VSC9182 

40 Gb/s STS-1 Time Slot Interchange 

The VSC9182 is a 64x64 STS-12/STM-4 Time Slot Interchange Switch IC. 

A single device provides 40 Gb/s of non-blocking STS-1 connectivity 

(768x768 STS-1) with support for concatenated tributaries. All STS- 

12/STM-4 inputs and outputs are differential serial signals running at 622 

Mb/s for efficiency in switch card and system backplane design. 

Backplane BER monitoring and deskew are integrated, and the connection 

matrix can be hitlessly reconfigured. 

Features: 

•64x64 STS-12/STM-4 TSI Switch with Non-Blocking 768x768 STS-1 

Switch Matrix 

•Supports Both Multi-Cast and Broadcast 

•Serial LVDS 622 Mb/s High-Speed Interface with PECL/CML 

Compatibility and Retiming 

•Integrated Clock Synthesis with a Choice of Two Reference 

Frequencies 

•LOS Detection, Input Parity Checking and Output Parity Insertion; 

Scrambling and Descrambling 

•Hitless Reconfiguration of TSI Mapping 

SYNCP/N 

FOSYNCP/N 

RXD[63..0]+/- 

SYSCLKP/N 

Indexer 

STS-12 

Backplane 

Input 

Interfaces 

(64) 

CKBYP 

Clock 

Clock 

Synthesis 

PLL 

CKSEL 

PLOCK 

Data 

Control 

RSTB 

MODE8 

PARITYON 

SCRMBL 

768x768 STS-1 

Interconnection Matrix 

and Storage 

CPU 

Interface 

D[9:0] 

A[10:0] 

ALE 

CSB 

WRB 

RDB 

CONFIG 

INTB 

Control 

Data 

IDDQ1 

IDDQ2 

STS-12 

Backplane 

Output 

Interfaces 

(64) 

Test 

Interface 

TDI 

TCK 

TMS 

TRSTB 

TDO 

TXD 

[63:0]+/ 

VSC9185 

64x64 STS-48/STM-16 TSI Switch Fabric 

The VSC9185 is a 64x64 Time Slot Interchange Switch IC supporting STS- 

48/STM-16 and STS-12/STM-4 on every input and output independently. 

A single device provides 160 G of non-blocking STS-1 connectivity 

(3072x3072 STS-1) with support for concatenated tributaries. All inputs 

and outputs are differential serial signals running at 2.488 Gb/s or 0.622 

Gb/s for flexibility in switch card and system backplane design. 

Backplane BER monitoring and deskew are integrated, and the service/protection 

connection maps can be manually selected on an individual 

output time slot basis or driven by in-band signaling for hardware protection 

switching. Path AIS or UNEQ can be optionally inserted into all 

3072 outgoing STS-1 tributaries. A standard asynchronous CPU interface 

with event interrupts is also supported. 

Features: 

Interconnection Matrix 

•Time and Space Switches any STS-(n) [n=1,3c,12c,48c,192c] Signal of 

an Incoming STS-48 into Any Byte Position of Any STS-48 Output 

•3072 x 3072 STS-1 Switch Matrix 

•Single Stage Non-Blocking Structure of the Switch Allows for 

Unrestricted Multi-Cast and Broadcast 

•Programmable Service/Protection Map (with Shadow Memory) can 

be Manually Selected on an Individual Output Time Slot Basis or 

Driven by In-Band Signaling for Hardware Protection Switching 

•New Connection Maps Take Effect on the Next Frame Boundary After 

User Intervention or In-Band Reconfiguration Signal 

Input Backplane Interface 

•Serial 2.488 Gb/s and 0.622 Gb/s Differential CML STS-48/STM-16 

and STS-12/STM-4 inputs 

•Includes Optional Analog Equalization Circuitry for Deterministic Link 

Jitter Reduction 

•Receives 64 Serial Line Channels Frequency Synchronous and Frame 

aligned to within +/-24 Time Slots for STS-48 frames, or +/-12 Time 

Slots for STS-12 Frames 

•Provides on-chip data recovery de-skewing functionality to Bit align, 

Byte align, and Frame-align all incoming signals (within the above 

tolerance) to the local clock 

•Flags Out-of-Frame (OOF), Loss-of-Signal (LOS), Out-of-Alignment 

(OOA), and Parity Errors 

•Checks B1 Parity of Incoming Data Versus B1 Byte of Following Frame 

•Accumulates received B1 errors over a provisionable sample period 

with programmable threshold event 

•Inserts Unequipped or AIS When channel is in OOF, LOS, or 

Unprovisioned State and Inhibits Alarms 

Continued on page 22 

TIME SLOT INTERCHANGE SWITCHING PRODUCTS 

21 

SECTION EIGHT

VSC9185—64x64 STS-48/STM-16 TSI Switch Fabric 

VSC9187 

(continued from page 21) 

•Optionally descrambles Incoming SONET data using one of two 

Polynomials 

•Monitors the received TOH bytes from a single row-column location 

across all input channels 

Output Backplane Interface 

•Serial 2.488 Gb/s and 0.622 Gb/s Differential CML STS-48/STM-16 and 

STS-12/STM-4 Outputs 

•Optionally Pre-Emphasizes Electrical Signals for Deterministic Link 

Jitter Reduction 

•Optionally Inserts Byte-Interleaved Parity into B1 Byte of Following 

Frame 

•Originates In-Band Messages to Port Cards for Switching Purposes 

•Optionally Scrambles Outgoing SONET Data Using One of Two 

Polynomials 

•Optionally inserts AIS or UNEQ on a Per-Channel, Per-Time Slot Basis 

In-Band Signaling and Hardware Protection Switching 

•Observes In-Band Alarm-Status (ASB) Bytes and Performs Hardware 

Comparison 

•Uses Result of Hardware Comparison to Drive Selection of 

Service/Protection Connection Map 

•Provides True Hardware Support for 1+1 Protection Switching 

•Utilizes ASB Byte Generation Capabilities of VSC9186 10G Pointer 

Processor and Frame Aligner 

CPU Interface 

•Generic Microprocessor (CPU) Interface Used for Device Configuration 

and Status Checking 

•16-Bit Data Bus and 16-Bit Address Bus 

•Interrupt Output Pin to Signals Status Changes of Internal Alarms 

•Flexible Interrupt Masking Features 

•Eight Provisionable GPIO 

Test Interface 

•IEEE P1149.1 Test Access Port Controls External Boundary Scan 

LEG_DI_S[5:0] 

RefSyncl P/N 

TEMPANODE 

Sync 

RefSyncO P/N 

LEG_RCLK_S 

Manager 

TEMPCATHODE 

TDM 

MUX 

LEG_RSYN_S 

Auto 

Protection 

TSI_SW 

Switch 

9 x 622Mb/s 

STS-12 

Mode_622 

STS_DI_[8:0] Serial 

Backplane 

ACC_Mode Input 

Inputs 

Data Interconnection 

Output 

Backplane 

Data 

(Service) 

RxD[63:0]P/N 

Matrix and 

Backplane 

Interfaces 

TxD[63.0]P/N 

Storage 

Interfaces 

(64) 

(64) 

RstN 

IScE 

LEG_DI_P[5:0] 

TriStatE N 

TDI 

LEG_RCLK_P TDM 

SysClkS P/N 

TCK 

MUX 

LEG_RSYN_P 

SysClkP P/N 

Clock 

CPU 

Synthesis 

JTAG TMS 

TestClk1 P/N 

Interface 

PLL 

TRSTN 

TestClk2 P/N 

TDO 

9 x 622Mb/s 

STS-12 

STS_DI_[17:9] Serial 

Backplane 

Inputs 

(Protection) 


22 

SECTION EIGHT 

PIIByp 

ClkSel[1:0] 

PLock 

D[15:0] 

A[15:0] 

GPIO[7:0] 

Intrpt N 

DIAck_Rdy N 

CSN 

CI_Mode[2:0] 

CiClk 

AS_ALE N 

DS_WR N 

RD_RW N 

CICDI 

CIRDO 

PMTick 

MemBIST 

SHORT 

The VSC9187 is a VT1.5 Time Slot Interchange (TSI) device. It provides 

a fully non-blocking connect cross for 3024 VT1.5’s that are all frequency, 

phase and column aligned in addition to a pre-grooming 2:1 UPSR 

selection. 

The device receives 9 x 622 Mb/s STS-12 working and protection backplane 

inputs and performs all necessary functions to retime and align 

these signals from the backplane. VT1.5 tributaries are then pre-selected 

with a hardware 2:1 UPSR switch from the working and protection timeslot 

with programmable holdover and pre-hold switch timers. The results 

of the 2:1 hardware selection are then made available to an internal 

3024x3024 VT1.5 non-blocking grooming switch, allowing a 5G UPSR 

ring to be terminated. Alternatively, the nine protection STS-12 backplane 

inputs can remain unused and the VSC9187 can act as a 5 G VT1.5 

switch. Output STS-1 delay management following the crossconnect 

allows the VSC9187 to be used in subtended switch applications with 

large scale STS-1 crossconnects such as the VSC9182 40G STS-1 TSI. 

Features: 

• (5 G) Non-Blocking VT1.5 TSI, 6048x6048 (10 G) VT1.5 TSI with 2:1 

UPSR Input Pre-Selection 

•2 x 9 x 622 Mb/s STS-12 LVDS Backplane Inputs with Integrated 

Retiming and Alignment 

•Working and Protection 2 x 9 x 622 Mb/s STS-12 LVDS Outputs 

•Supports 2:1 Hardware VT1.5 UPSR Selection When Used in 

Conjunction With VSC9188 VT1.5 Pointer Processor and Column Aligner 

•6 Service and 6 Protection STS-1-Like Serial 51.84 Mb/s Interfaces for 

Local Drop Interfaces 

•Integrated STS-1 Frame Delay Management on Output for Use in 

Subtended STS-1 Switch Fabrics 

•Compliant with SONET Requirements as Stated in ANSI T1.105 and 

Bellcore GR-253-CORE 

•Facillitates Hardware-Based UPSR Switching in Accordance with 

Telcordia GR-1400-CORE 

•Thermally-Enhanced 360 CCGA Package 

•2.5 V / 1.8 V Power Supply; 0.18µm Technology 

•IEEE P1149.1 Test Access Port 

[8] 

MUX 

[7:0] 

LASB Extraction 

[8:0] 

LASB 

Low-Order Alarm Status Byte (LASB) 

Inserted by VSC9188 

(contains VTI.5 PM summary) 

[17] 

JTAG Interface 

MUX 

[16:9] 

[17:9] 

LASB 

VT1.5 Hardware UPSR Selection 

(Manual or LASB-based) 

System Interface and PLL 

3024 x 3024 VT1.5 TSI 

HS-CLK LS-CLK SYNC M-SYNC 

CLKREF 

LASB Extraction 

SYNCREF 

STS-1 A1/A2 Output Delay Mgmt (H1/H2) 

[8:0] 

[8:0] 

CPU Interface 

TDM 

DEMUX 

GPO[7:0] 

GPI[7:0] 

INTB 

RSTB 

RDB 

WRB 

CSB 

ALE 

A[15:0] 

D[7:0] 

CPU_CLK 

LEG_DO_S[5:0] 

LEG_TCLK_S 

LEG_TSYN_S 

9 x 622Mb/s 

STS-12 

Serial STS_DO_[8:0] 

Backplane 

Inputs 

(Service) 

TDM 

DEMUX 

LEG_DO_P[5:0] 

LEG_TCLK_P 

LEG_TSYN_P 

9 x 622Mb/s 

STS-12 

Serial STS_DO_[17:9] 

Backplane 

Outputs 

(Protection)

VSC9188 

The VSC9188 is a VT1.5 Pointer Processor and Column Aligner, which provides 

column alignment and the VSC9188 is a VT1.5 Pointer Processor 

and Column Aligner. The primary application for this device is to provide 

column alignment and performance monitoring for VT1.5 payloads and 

interface these tributaries to a large-scale VT1.5 crossconnect. The 

VSC9188 receives four serial STS-12 622 Mb/s signals from a VSC9186 

10 G Pointer Processor or VSC9182 STS-1 grooming crossconnect. These 

signals are terminated at the path level, monitored at the VT1.5 level, and 

column-aligned at the VT1.5 level in a deterministic fashion to a local 

SYNC signal. GR-1400 UPSR performance information is aggregated and 

placed in the VT overhead for use in the VT crossconnect. The four 

processed serial STS-12 622 Mb/s signals are duplicated on working and 

protection STS-12 622 Mb/s outputs for fan-out to protected VT fabrics. 

Four serial STS-12 622 Mb/s signals are received from the switch and the 

Path Overhead (POH) is reconstructed prior to transmission. Various loopback 

and test modes are also available. 

DL12I[3:0] 

Line Side Backplane 

Rx Direction 

4x622Mb/s 

STS-12 

Serial 

Backplane 

Inputs 

STS-1 Pointer 

Interpreter 

STS-1 Path 

Overhead 

Monitoring 

M-SYNC 

VT Pointer 

Processor and 

Column Aligner 

VT1.5 Path 

Overhead 

Monitoring 

FEBE & RDI 

Alarm 

Status 

Byte 

Insertion 

Switch 

Loopback 

Switch Side Backplane 

4x622Mb/s 

STS-12 

DL12O[3:0] Serial 

Backplane 

Outputs 

4x622Mb/s 

STS-12 

Serial 

Backplane 

Inputs 

DS12I[3:0] 

STS-12 Line 

Loopback 

VT PP 

Loopback 

HS-CLK LS-CLK SYNC M-SYNC 

JTAG Interface 

System Interface and PLL 

CPU Interface 

TDO 

TDI 

TCK 

TMS 

TRSTB 

CLKREF 

SYNCREF 

TRIST 

PLLBYP 

ISCEN 

SHORT 

RTSN 

CIRDO 

CICDI 

RD_RWN 

DS_WR 

AS_ALE 

CICLK 

CI_MODE[1:0] 

CS 

DTACK_RDY 

INTRPT 

A[15:0] 

D[7:0] 

GPO[7:0] 

GPI[7:0] 

GR-1400 UPSR 

Performance 

Information 

VSC9188 

(2) 

4x622Mb/s DS12O[3:0] 

STS-12 

Serial 

Backplane 

Outputs DS12O[3:0] 

Tx Direction 

Features: 

•Bi-Directional 2.5G VT1.5 Pointer Processor, Path Terminator and 

Column Aligner 

•VT1.5 Pointer Processing on 4 x 336 VT1.5 Groups Within 4 x STS-12 

Backplane Signals 

•Path Termination and Generation of STS-1 Traffic 

•4 x 622 Mb/s STS-12 LVDS Backplane Interface Inputs With 

Integrated CDR and Realignment 

•Two 4 x 622 Mb/s STS-12 LVDS Backplane Interface Outputs for 

Working and Protection Fan-out 

•Interfaces With VSC9186 10G Pointer Processor and VSC9187 

3024 x 3024 VT1.5 TSI 

•Generates In-Band VT Signaling of UPSR Performance Monitoring 

Information for Hardware-based Protection Switching in VSC9187 

3024 x 3024 VT1.5 TSI 

•2.5 V/1.8 V Power Supply, 0.18µm Technology 

•Compliant with SONET Requirements as Stated in ANSI T1.105 and 


•Facilitates Hardware-Based UPSR Switching in Accordance with 


•Provides JTAG TAP Controller Conforming to the IEEE 1149.1 Standard 

•Thermally-Enhanced 552-pin CCGA Package Switch Side Backplane 

STS-1 Path 

Overhead 

Insertion 


23 

SECTION EIGHT

Sales Offices 

Vitesse corporate headquarters is located in Camarillo, 

California, USA. Please contact any of our offices for additional 

information or visit our website at www.vitesse.com. 

Sales Headquarters 

Vitesse 

741 Calle Plano 

Camarillo, CA 93012 

TEL: (805) 388-3700 

FAX: (805) 987-5896 

Richard Riker, Vice President Sales & Marketing 

Email: rriker@vitesse.com 

Worldwide Channel & Partner Sales 

Vitesse 



TEL: (805) 388-3700 

FAX: (805) 987-5896 

Phil Richards, Vice President Channel & Partner Sales 

Email: philr@vitesse.com 

Customer Service 

Vitesse 



TEL: (805) 388-3700 

FAX: (805) 987-5896 

Cozy Darby, Director of Customer Service 

Email: darby@vitesse.com 

US National Sales Office 

Vitesse 

488 Schooley’s Mt. Road 

Hasting’s Commons, Bldg. 1B 

Hackettstown, NJ 07840 

TEL: (908) 979-0990 

FAX: (908) 979-0992 

Mike Logan, Vice President of Sales 

Email: logan@vitesse.com 

Western Vitesse Sales Office 

Vitesse 

55 Vista Montana 

San Jose, CA 95134 

TEL: (408) 474-4070 

FAX: (408) 888-7380 

Burt Hadlock, Western Area Sales Director 

Email: hadlock@vitesse.com 

Southwest Regional Sales Office 

Vitesse 

5655 Lindero Canyon Road, Suite 521 

Westlake Village, CA 91362 

TEL: (818) 889-3145 

FAX: (818) 889-3151 

Ryan McCaskill, Field Sales Engineer 

Email: ryanm@vitesse.com 

North Central Regional Sales Office 

Vitesse 

2300 N. Barrington Road. Suite 400 

Hoffman Estates, IL 60195 

TEL: (847) 490-8425 

FAX: (847) 884-9423 

Mike Hansen, District Sales Manager 

Email: mhansen@vitesse.com 

Central Regional Sales Office 

Vitesse 

997 Hampshire Lane, Suite 200 

Richardson, TX 75080 

TEL: (972) 669-9797 

FAX: (972) 669-2266 

Jerry Quam, Regional Sales Manager 

Email: quam@vitesse.com 

Southeast & Mid-Atlantic Regional Sales Office 

Vitesse 

1000-G Perimeter Park Drive 

Morrisville, NC 27560 

TEL: (919) 465-2100 

FAX: (919) 465-2171 

Brian Thorpe, Regional Sales Manager 

Email: briant@vitesse.com 

Northeast Regional Sales Office 

Vitesse 

161 Worcester Road, Suite 401 

Framingham, MA 01701 

TEL: (508) 628-0501 

FAX: (508) 628-0504 

Shawn Fennelly, Regional Sales Manager 

Email: shawnf@vitesse.com 

International Sales Offices 

Vitesse GmbH & Co. KG 

Borussiastrasse 112 

D-44149 Dortmund, Germany 

TEL: +49-231-6560145 

FAX: +49-231-6560199 

Siegmar Hausberger, EMEA Sales Director 

Email: siegmarh@vitesse.com 

Vitesse A/S 

Hoerkaer 16-18 

DK-2730 Herlev, Denmark 

TEL: +45-4485-5958 

FAX: +45-4485-5909 

Lars Haagh, 

Northern European Sales Manager 

Email: lha@vitesse.com 

Vitesse GmbH 

Altstadt 296 

D-84028 Landshut, Germany 

TEL: +49-871-966-3344 

FAX: +49-871-966-3343 

Hermann Helmbold, 

Eastern European Sales Manager 

Email: hermannh@vitesse.com 

Asia-Pacific Vitesse Sales Office 

39/F, Tower 1 Pacific Place 

Queensway, Hong Kong 

TEL: +852-2273-5132 

FAX: +852-2273-5999 

Mitchell Tang, Sales Director of Asia-Pacific 

Email: mtang@vitesse.com 

China Vitesse Sales Office 

Room 9C, 9F, NEPTUNUS Bldg 

Nan You Road, Nan Shen Qu 

Shen Zhen 518054, P.R. China 

TEL: +86-755-664-3119 

FAX: +86-755-664-3117 

Heng Zeng, District Sales Manager-China 

Email: zeng@vitesse.com 

Japan Vitesse Sales Office 

Mitsugi Kotobuki-cho, Bldg 7F 

1-1-3, Kotobuki-cho, Fuchu 

Tokyo 185-0056 Japan 

TEL: +81-42-336-6133 

FAX: +81-42-354-1205 

Yuzo Tsukui, Sales Director - Japan 

Email: yuzo@vitesse.com 

SALES OFFICES 

24 

Hiroshi Hayashida, 

Regional Sales Manager-Japan 

Email: hiroshi@vitesse.com

About Vitesse 

Vitesse Semiconductor Corporation is a leading designer and supplier 

of innovative, high-performance integrated circuits (ICs) and optical 

modules used in next generation networking and optical communications 

equipment. The Company's products address the needs of 

Enterprise, Access, Metro, Core, and Optical Transport network equipment 

manufacturers who demand a robust combination of high-speed, 

high-service delivery and low-power dissipation in their products. In 

concert with its broad communications product portfolio, Vitesse also 

develops ICs for storage area networking and enclosure management. 

Vitesse is headquartered in Camarillo, California, and operates two 

fabrication facilities; one in Camarillo and one in Colorado Springs, 

Colorado. 

Company and product information is available by calling 

1-800-VITESSE or on the web at www.vitesse.com. 

Trademarks 

Vitesse, ASIC-Friendly, FibreTimer, TimeStream and Snoop Loop are trademarks of Vitesse Semiconductor 

Corporation. All other products or service names used in this publication are for identification purposes only, 

and may be trademarks or registered trademarks of their respective companies. All other trademarks or registered 

trademarks mentioned herein are the property of their respective holders. 

©2002 Vitesse Semiconductor Corporation

Vitesse Semiconductor Corporation 

741 Calle Plano, Camarillo, CA 93012 

tel: 805.388.3700 

fax: 805. 987.5896 

www.vitesse.com

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