Mirrorcle Technologies, Inc. BDQ PicoAmp 4.x-025 User Guide

Mirrorcle Technologies, Inc.
BDQ PicoAmp 4.x-025 User Guide
© 2012 - 2014 Mirrorcle Technologies, Inc. All rights reserved.
Dr. Veljko Milanović
Abhishek Kasturi
Mirrorcle Technologies, Inc.
January 2014

Overview
2
Bias Differential Quad-channel (BDQ) PicoAmp 4.x is a
compact high voltage amplifier with two analog inputs
and four high voltage analog outputs which also includes
programmable low-pass filters for smoothing of the
output voltages. It is designed and
optimized for the driving of
Mirrorcle Technologies MEMS
mirrors at voltages up to 140V.
© 2012 - 2014 Mirrorcle Technologies, Inc. All rights reserved.

Features
3
Low voltage supply and low power consumption (

Board Dimensions with Mounting Hole and Connector Locations
4
0
2.54
5.72
0
2.24 mm
J2 – Digikey Part ID: 609-3078-ND
J1 – Digikey Part ID: 609-3530-ND
32.72
38.10
40.64
2.54
10.31
50.95
58.42
60.96
All dimensions are in mm
© 2012 - 2014 Mirrorcle Technologies, Inc. All rights reserved.

Input Connector Pinout and Functions
5
Input: 8 - Pin Header
J1-Pin Name Description
1 EN High Voltage Enable
2 FCLK Filter Clock (60x filter cut-off)
3 GND Ground
4 XIN Analog Input X
5 GND Ground
6 YIN Analog Input Y
7 +5V VDD ( + 5VDC)
8 +5V VDD ( + 5VDC)
© 2012 - 2014 Mirrorcle Technologies, Inc. All rights reserved.

Output Connector Pinout and Functions
6
Output: 8 - Pin Header
J2-Pin Name Description
1 HV_A (X+) High Voltage Output for Channel X+
2 GND Ground
3 HV_B (X-) High Voltage Output for Channel X-
4 GND Ground
5 HV_C (Y-) High Voltage Output for Channel Y-
6 GND Ground
7 HV_D (Y+) High Voltage Output for Channel Y+
8 GND Ground
© 2012 - 2014 Mirrorcle Technologies, Inc. All rights reserved.

Specifications - General
7
Inputs:
VDD: +5VDC
High Voltage Enable: Digital enable/disable for the high voltage supply
Filter Clock:
User must provide filter clock for the 5 th Order Bessel low pass filters
The clock (FCLK) can be driven by 3V logic, 50% duty cycle or close
Set clock frequency to the desired filter cut off frequency x 60
• E.g.: Device datasheet states cut off freq. of 1kHz, then FCLK Input = 60kHz
Analog Input X and Y: 0V to 2.5V input
User applies 1.25V bias input on X and Y as MEMS mirror origin (no tip/tilt)
Deviation from 1.25V results in mirror rotation in positive or negative direction.
Outputs:
HV_A (X+), HV_B (X-), HV_C (Y-), HV_D (Y+): 0V-140V
Low current capability, 100pF) or long cables
© 2012 - 2014 Mirrorcle Technologies, Inc. All rights reserved.

Output Definition
8
HV_A = XIN*56
HV_B = 140-(XIN*56)
HV_C = YIN*56
HV_D = 140-(YIN*56)
Differential Pairs – see next page
© 2012 - 2014 Mirrorcle Technologies, Inc. All rights reserved.

Bi-Directional Driving with Unipolar Voltages
9
HV_B is high
HV_A is low
Mirror rotates in
X- direction
HV_A is high
HV_B is low
Mirror rotates in
X+ direction
Analog Input X
© 2012 - 2014 Mirrorcle Technologies, Inc. All rights reserved.

Specifications - DC Characteristics
10
Supply Current (at VDD = +5VDC)
High Voltage Disabled (Vcc = ~4.5V)
DC Current Supply: ~10mA
High Voltage Enabled (Vcc = ~146V)
DC Current Supply: ~20mA
Supply Voltage
VDD of +5VDC +- 0.4V is required for proper operation
High Voltage Output at 1.25V analog input: ~70V
High voltage stage gain: 56X
Overall High Voltage Output Range: 0V-140V
© 2012 - 2014 Mirrorcle Technologies, Inc. All rights reserved.

Specifications - AC Response
11
AC response for this amplifier is determined by the usercontrolled
setting of the low pass filters. The limits for the
embedded 5 th order Bessel filter are 10Hz to 15kHz
frequency-cutoff setting.
The underlying high voltage amplifier circuit has a 25kHz
large signal bandwidth.
© 2012 - 2014 Mirrorcle Technologies, Inc. All rights reserved.

12
SPECIFIC INSTRUCTIONS
BDQ PicoAmp4.x

Bringing up BDQ PicoAmp 4.x
13
1. Turn on the BDQ PicoAmp by providing VDD and GND to J1.
2. Set the FCLK frequency to control the filter cut-off per recommended
settings for the MEMS mirror connected to the BDQ PicoAmp.
3. Prior to enabling high voltage, send mirror origin voltage of 1.25V to
analog inputs X and Y.
4. To enable the high voltage, user sends a Digital High through Pin 1 on J1.
WARNING: DO NOT ENABLE HIGH VOLTAGE IF THE X AND Y INPUTS ARE AT NOT SET
AT OR NEAR 1.25V. SUDDEN VOLTAGE DIFFERENCE ON OUTPUT PAIRS MAY
DAMAGE MEMS MIRROR.
5. Now all high voltage outputs X+, X-, Y-, Y+ should be biased at
70V. MEMS mirror may move slightly to a new, ‘biased origin.’ This is
now the new ZERO position for the MEMS mirror.
6. BDQ PicoAmp is now ready to drive the MEMS mirror to new positions,
waveforms, etc. Although signals are filtered, user should avoid
discontinuous waveforms, steps, and impulses.
WARNING: SEE NEXT PAGE FOR SAFE RANGE OF INPUT VOLTAGES WHEN USING
MIRRORCLE MEMS MIRRORS
© 2012 - 2014 Mirrorcle Technologies, Inc. All rights reserved.

Shutting down BDQ PicoAmp 4.x
14
1. Send mirror origin voltage of 1.25V to analog inputs X and Y.
2. Disable the high voltage by sending a Digital Low through Pin 1 on J1.
WARNING: DO NOT UNPLUG OR DISABLE ANALOG INPUTS PRIOR TO THIS STEP TO
AVOID APPLYING 0V TO ACTIVE ANALOG INPUTS.
3. Remove power as needed, unplug cables or disable inputs, etc.
© 2012 - 2014 Mirrorcle Technologies, Inc. All rights reserved.

Safe Range of Input Voltages
15
1. Each Mirrorcle MEMS Mirror datasheet specifies the
maximum voltage rating (V max ) for a given device on page
1, e.g. 125V.
2. To obtain analog input voltage range:
1. Maximum V in = V max / 56
2. Minimum V in = 2.5 - V max / 56
3. For example above, the maximum input voltage for this
MEMS mirror will be 2.23V
4. The minimum input voltage for this MEMS mirror will be
0.27V
Exceeding these limits may damage the MEMS mirror.
© 2012 - 2014 Mirrorcle Technologies, Inc. All rights reserved.