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What is DSP - Hardware Conference 2013

What is DSP - Hardware Conference 2013

MATLAB for FPGA Design

MATLAB for FPGA Design ‣ Algorithms described in MATLAB can be targeted directly to Xilinx FPGAs ‣ AccelDSP includes powerful algorithmic synthesis ‣ Floating to fixed-point conversion ‣ IP insertion ‣ Design exploration ‣ Algorithmic scheduling ‣ Integration with System Generator ‣ System Generator MCode Block generates RTL from MATLAB descriptions of control and state machine logic AccelDSP BRINGING YOU THE NEXT LEVEL IN EMBEDDED DEVELOPMENT _ 23 Hardware Acceleration ‣ Hardware co-verification removes simulation bottleneck ‣ Up to 1000x simulation performance improvement ‣ Automates FPGA and board setup process OFDM BER Test DUC CFR Design Beamformer Color Space Converter Video Scalar Simulation Time (Seconds) Software 113 742 731 277 10422 HW Co-Sim 2.5 .75 23 4 92 Increase 45X 989X 32X 69x 113X BRINGING YOU THE NEXT LEVEL IN EMBEDDED DEVELOPMENT _ 24

Increasing Productivity System Generator is an algorithm capture, exploration, simulation, and implementation environment based on Simulink. ‣ Implementation leverages optimized Xilinx IP ‣ Custom RTL integration ‣ High-level MATLAB algorithmic synthesis with AccelDSP ‣ Automated verification flows Custom RTL Highly optimized Xilinx IP High-level MATLAB algorithmic block BRINGING YOU THE NEXT LEVEL IN EMBEDDED DEVELOPMENT _ 25 Xilinx Optimized IP Functional and implementation options are easily accessible FIR Compiler – 1 of over 90 Xilinx optimized IP blocks available today BRINGING YOU THE NEXT LEVEL IN EMBEDDED DEVELOPMENT _ 26

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