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CPSC 2105
Computer Organization
Homework Set 3 Due Thursday, October 7, 2010
NOTE: SHOW ALL OF YOUR WORK. YOU MUST DEMONSTRATE THAT YOU
UNDERSTAND THE PROCESS OF OBTAINING AN ANSWER.
DO NOT PUT ANY ANSWERS ON THIS QUESTION SHEET.
1. Exercise 4 on page 237 of the textbook.
How many bits are required to address a 4M x 16 main memory if
a) main memory is byte addressable
b) main memory is word addressable
ANSWER: 1M = 2 20 , so 4M = 42 20 = 2 22 and 8M = 2 23 .
One 16–bit word will contain two 8–bit bytes. To convert from word count to byte
count in a byte addressable memory, multiply the word count by the number of bytes
per word. Here there are two bytes per word.
a) If memory is byte addressable, there are 2 23 bytes. This requires 23 bits to address.
b) If memory is word addressable, there are 2 22 words. This requires 22 bits to address.
NOTE:
Individual bits are not addressable. Admittedly, the memory contains
4M 16 = 2 22 2 4 = 2 26 bits, but it is the byte or word count that is
used for the addressing.
2. Exercise 5 on page 237 of the textbook.
How many bits are required to address a 1M x 8 main memory if
a) main memory is byte addressable
b) main memory is word addressable
ANSWER: 1M = 2 20 , 512K = 2 19 , and 256K = 2 18 .
a) If memory is byte addressable, there are 2 20 bytes, requiring 20 address bits.
b) 2 20 8–bit bytes is the same as 2 19 16–bit words or 2 18 32–bit words.
I view this question as ambiguous, and will give credit for 18, 19, or 20.

3. Exercise 7 on page 238 of the textbook.
Suppose that a 16M x 16 main memory is build using 512K x 8 RAM chips.
a) How many RAM chips are necessary
b) How many RAM chips are there per memory word
c) How many address bits are needed for each RAM chip
d) How many address bits are needed for all of memory
e) If high–order interleaving is used, where would address 14 (which is E in hex)
be located
f) If low–order interleaving is used, where would address 14 (which is E in hex)
be located
ANSWER: 1M = 2 20 , 512K = 2 19 , and 16M = 2 4 2 20 = 2 24 .
a) The number of bits in the main memory is 16M16 = 2 24 2 4 = 2 28 .
The number of bytes in the main memory is 16M2 = 2 24 2 1 = 2 25 .
The number of bits in each RAM chip is 512K8 = 2 19 2 3 = 2 22 .
The number of bytes in each RAM chip is 512K = 2 19 .
The chip count is either 2 28 / 2 22 = 2 6 , or 2 25 / 2 19 = 2 6 . In either case, it is 64 chips.
b) Each memory word is spread into two RAM chips.
One stores bits 15 – 8, and the other bits 7 – 0 of the memory word.
c) Each RAM chip is 512K = 2 19 , so it requires 19 address bits.
d) Each 512K x 8 RAM chip is a part of a 512K x 16 memory bank.
The number of memory banks is 16M / 512K = 2 24 /2 19 = 32 memory banks.
Five bits are required to select the memory bank.
e) Main memory has 16M = 2 24 addressable units, so 24 address bits are needed.
5 bits go to select the memory bank, and 19 bits are sent to each memory bank.
f) In high–order interleaving, the first 512K addresses are placed in bank 0.
That is the location of address 14.
g) For low–order interleaving, we must examine the structure of the 24–bit address.
Address 0x0E is 0000 1110 in binary.
Bit 23 – 8 7 6 5 4 3 2 1 0
0000 0000 0000 0000 0 0 0 0 1 1 1 0
19–bit offset in the bank
5–bit bank number
The address is in bank 0x0E or bank 14.

4. Exercise 13 on page 239 of the textbook.
List the hexadecimal code for the following program (hand assemble it).
Address Label Instruction
100 Load A
101 Add One
102 Jump S1
103 S2, Add One
104 Store A
105 Halt
106 S1, Add A
107 Jump S2
108 A, HEX 0023
109 One, HEX 0001
ANSWER: Here I elect to do the assembly in the fashion of a two–pass assembler.
The first pass identifies the labels and associates an address with each.
Here is the symbol table produced by the first pass of the assembler.
Label Address
A 108
One 109
S1 106
S2 103
At this point, the partially assembled code would appear as follows.
Address Label Instruction Result So Far
100 Load A Load 108
101 Add One Add 109
102 Jump S1 Jump 106
103 S2, Add One Add 109
104 Store A Store 108
105 Halt Halt
106 S1, Add A Add 108
107 Jump S2 Jump 103
108 A, HEX 0023 0023
109 One, HEX 0001 0001

Using the modified opcodes, we have
Load 01 Add 03 Halt 00
Store 02 Jump 09
Address Label Instruction Result So Far
100 Load A 1108
101 Add One 3109
102 Jump S1 9106
103 S2, Add One 3109
104 Store A 2108
105 Halt 0000
106 S1, Add A 3108
107 Jump S2 9103
108 A, HEX 0023 0023
109 One, HEX 0001 0001
NOTE:
The full assembly listing should be given in the exact order in which the
instructions appear in the program.
5. Consider the following memory contents.
Hex Address Contents
200 220
220 240
If the accumulator has value 1 at the start of each instruction, then
a) What value does the AC have after executing the instruction AddM 200
This is the immediate add instruction.
b) What value does the AC have after executing the instruction Add 200
This is the standard (direct address) add instruction.
c) What value does the AC have after executing the instruction AddI 200
This is the indirect address add instruction.
ANSWER: The AC initially has a value of 1.
a) AddM is an add immediate. It adds 200 to the value to get 201 in the AC.
b) The effect of the Add instruction is depicted by AC AC + M[200].
The value at location 200 is 220, so the AC gets 1 + 220 = 221 in the AC.
c) The effect of this Add instruction is depicted by AC AC + M[ M[200] ].
The value M[200], in address 200, is the address of the value to add to the
AC. As M[200] = 220, the effect is AC AC + M[220].
The value at location 220 is 240, so the AC gets 1 + 240 = 241 in the AC.
NOTE: The result is the same in octal, decimal, or hexadecimal arithmetic.