17.05.2015 Views

DATA 620/i SYSTEM REFERENCE MANUAL . - Al Kossow's Bitsavers

DATA 620/i SYSTEM REFERENCE MANUAL . - Al Kossow's Bitsavers

DATA 620/i SYSTEM REFERENCE MANUAL . - Al Kossow's Bitsavers

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

W bus. The memory word (W) register is directly connected<br />

to all memory modules through the W bus. The bus is<br />

bidirectional and time-shared among memory modules.<br />

L bus. The memory address (L) register is directly connected<br />

to all memory modules through the L bus. The bus is<br />

unidirectional.<br />

2.1.5 Input/Output Bus<br />

The standard <strong>DATA</strong> <strong>620</strong>/i is provided with a bidirectional<br />

input/output (I/O) bus that permits programmed data transfers<br />

between periphera I devi ces and the computer.<br />

2.1.6 Memory<br />

The internal storage of the computer consists of 4096-word<br />

modules connected to the Land W buses. The mainframe<br />

can accommodate one 4096-word module. Additiona I<br />

modules are added in an additional frame that is attached to<br />

the mainframe. The computer memory can be expanded to<br />

a maximum of 32,768 words using 4096-word modules.<br />

I nstruction words read from memory are transferred to the<br />

control section for execution. Words may be transferred,<br />

under program control, from memory to the arithmetic/logic<br />

section, to the operational registers, or to the I/O bus.<br />

Words may be transferred, under program control, to memory<br />

from the operational registers or the I/O bus. When the<br />

direct memory access option is used, the system is capable<br />

of direct transfer between memory and peripheral devices<br />

on the I/O bus, concurrent with computations.<br />

2.1.7 Direct Memory Access<br />

The direct-memory-access (DMA) option allows data transfer<br />

into or out of memory modules without disturbing the contents<br />

of the operational registers. Only the Land W registers<br />

are altered. Access to memory using the DMA facility is<br />

on a IIcycle-steal" basis and requires 2.7 microseconds of<br />

processor ti me per tra nsfer .<br />

2. 1 .8 Mi era-EXEC<br />

The Micro-EXEC option is a unique hardware technique for<br />

microstep sequencing of the computer. This option provides<br />

hardware logic in which all computer control signals are<br />

2-5

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!