Scios Instruction Set

SciOS 

Family Tablet 

SPC Specifications 

Publication # 31338 

Revision: 2.01 

Issue Date: March 2012

© 2011 – 2012 Sciteek, Inc. All rights reserved. 

The contents of this document are provided in connection with Sciteek, Inc. 

(“SciOS”) products. Sciteek makes no representations or warranties with 

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and reserves the right to make changes to specifications and product 

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FOR SALES USE ONLY 

Trademarks SciOS, SciPad are trademark of Sciteek, Inc.

INTRODUCTION TO SPC 

SPC (StrengthPC) is the latest architecture family developped by 

SciTeek labs. After eight years of intensive development and 

failed experiments, Sciteek engineers are proud to announce the 

release of five successive processors that finally bring together 

low power consumption and extremely high performances. 

The first processor will soon be released under the brand name 

Palladium. It will embed four SPC cores with an incredible CPU 

clock frequency of 3.4GHz, powering desktop applications as well 

as latest multimedia and gaming programs. 

QUICK REFERENCE 

Architecture family SPC – StrengthPC 

Architecture type Register based 

Registers 8 x 16bits registers 

Direct memory addressing 16bits - immediate or register based 

Direct addressable memory 64kB 

Indirect addressing type XPAE – eXtreme PAE 

XPAE addressing bits 42bits 

Extended addressable 

memory 


64GB 

FSB speed 1GHz-2GHz 

Minimum ft. size 66nm 

Product code 01337 

Supported sockets SciTeek SocketX 

L1 cache size 1MiB 



Idle power consumption 4.2W 

Charge power consumption 13.37W 

Endianness Little endian 

Instruction set SPC 

Notice : first released processors, including Palladium series will 

not implement XPAE features.

SPC MEMORY MANAGEMENT 

Direct access memory management only is detailed in the 

current section. For XPAE specifications, please refer to future 

detailed architecture documentation. 

64kB of memory are available for direct access. First 32kB are 

reserved for local stack, next 32kB are dedicated to binary 

code sections. Maximum binary size is 0xfffe. 

Stack is up-down-addressed while code is read in the bottomtop 

order. Operating system designers are kindly asked to 

provide program arguments at the very top of the stack, 

according to IA32 usual recommandations. 

Have a look at the memory map for graphical representation of 

SPC memory management. 


0x0000 

0x7fff 

0x8000 

0xffff 

Stack 

Program 

arguments 

Code 

XPAE (outer) 

space

SPC INSTRUCTION SET 

The following specifications include references to : 

• the instruction opcode 

• 8bits flag 

• 8bits register id 

• or 16bits memory offset index 


REG_REG 0x00 

REG_DIRECT8 0x01 

REG_DIRECT16 0x02 

REG 0x03 

DIRECT16 0x04 

DIRECT8 0x05 

REGINDIRECT_REG 0x06 

REGINDIRECT_DIRECT8 0x07 

REGINDIRECT_DIRECT16 0x08 

REGINDIRECT_REGINDIRECT 0x09 

REG_REGINDIRECT 0x0a 

Available flags 

REG0 to REG7 0x00 to 0x07 

REG_SP 0x08 

REG_BP 0x09 

Available registers

ADD 

General syntax : 

Opcode : 0x06 

Flag : REG_REG, REG_DIRECT8, REG_DIRECT16 

Operation : accumulates over the first register 

AND 


Opcode : 0x0d 


Operation : logical and, output in the first register 

CALL 


Opcode : 0x19 

Flag : REG, DIRECT16 

Operation : routine call, return address is pushed 

CMP 


Opcode : 0x18 


Operation : 8bits or 16bits comparison 

DEC 


Opcode : 0x0b 

Flag : no flag 

Operation : register decrementing 

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DIV 


Opcode : 0x09 


Operation : divides, output in the first register 

INC 


Opcode : 0x0a 


Operation : register incrementation 

JMPL 


Opcode : 0x1b 


Operation : jump to long address 

JMPS 


Opcode : 0x16 


Operation : jump to short address 

JNZ 


Opcode : 0x11 


Operation : jump if non zero 

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JZ 


Opcode : 0x10 


Operation : jump if zero 

JA 


Opcode : 0x1e 


Operation : jump if above 

JB 


Opcode : 0x1f 


Operation : jump if below 

MOV 


 

Opcode : 0x04 

Flag : any flag 

Operation : copy from/to memory and registers 

MUL 


Opcode : 0x08 


Operation : multiplies, output in the first register 

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NOP 


Opcode : 0x02 


Operation : nop 

NOT 


Opcode : 0x0f 


Operation : negation of a register 

OR 


Opcode : 0x0c 


Operation : logical or, output in the first register 

POP 


Opcode : 0x03 


Operation : 16bits pop from stack to register 

PUSH 


Opcode : 0x01 

Flag : REG, DIRECT8, DIRECT16 

Operation : push from register/memory to stack 

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RET 


Opcode : 0x1a 


Operation : routine return 

SUB 


Opcode : 0x07 


Operation : substraction, output in the first register 

SYSCALL 


Opcode : 0x30 


Operation : system call, syscall number in REG0, arguments in 

REG1 to REG4. 

TEST 


Opcode : 0x17 


Operation : 

XCHG 


Opcode : 0x1d 


Operation : exchange registers 

FOR SALES USE ONLY

XOR 


Opcode : 0x0e 


Operation : logical xor, output in the first register 

SciOS Syscalls 

The following system calls are available to SciOS users. Other 

operating system implentation may match those signatures. 

Please notice that system calls signature is similar to Linux 

system calls. 

sys_open 0x02 REG1, REG2, REG3 

sys_exit 0x01 REG1 

sys_read 0x03 REG1, REG2, REG3 

sys_write 0x04 REG1, REG2, REG3 

sys_close 0x05 REG1 

sys_setuid 0x06 REG1 

sys_setgid 0x07 REG1 

sys_dup2 0x08 REG1, REG2 

sys_send 0x09 REG1, REG2, REG3, REG4 

sys_recv 0x0a REG1, REG2, REG3, REG4 

sys_socket 0x0b REG1, REG2, REG3 

sys_listen 0x0c REG1, REG2 

sys_bind 0x0d REG1 (socket), REG2 (port) 

sys_accept 0x0e REG1 (socket) 

sys_chdir 0x0f REG1 

sys_chmod 0x10 REG1, REG2 

sys_lseek 0x11 REG1, REG2, REG3 

sys_getpid 0x12 

sys_getuid 0x13 

sys_pause 0x14 

Available syscalls 

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Scios Instruction Set

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