Curriculum Vitae - Lamar University Electrical Engineering

lamar.edu

Curriculum Vitae - Lamar University Electrical Engineering

TECHNICAL REPORTS, DISSERTATION1. Sayil, S., “Space Radiation Effects on Technology and Human Biology and Proper MitigationTechniques”, Texas Space Grant Consortium (TSGC) Higher Education Grant Final Report, July 20102. Sayil, S., “The Impact of Radiation Induced Single Event Upsets on Cross-talk Noise for Today’sAdvanced Microchip Technologies”, Lamar Research Enhancement Grant Final Report, August 2008.3. Sayil, S., “Modeling the Impact of Cross-Coupling Noise on Wire Delay for Today’s MicrochipTechnologies”, Lamar Research Enhancement Grant Final Report, August 2007.4. Sayil, S., “Modeling the Impact of Cross-Coupling Noise on Wire Delay for Today’s MicrochipTechnologies”, Lamar Research Enhancement Progress Report, April 2007.5. Sayil, S., “Evaluation of Existing Test Sets for Crosstalk Test Coverage using VHDL HardwareDescription Language”, Lamar Research Enhancement Grant Final Report, August 2005.6. Sayil, S., “Evaluation of Existing Test Sets for Crosstalk Test Coverage using VHDL HardwareDescription Language”, Lamar Research Enhancement Progress Report, April 2005.7. Sayil, S., “A New Accurate and Time-Efficient Method for Cross-talk Noise Estimation on MultilineCircuits”, Lamar Research Enhancement Grant Final Report, August 2004.8. Sayil, S., “A New Accurate and Time-Efficient Method for Cross-talk Noise Estimation on MultilineCircuits”, Lamar Research Enhancement Progress Report, April 2004.9. Sayil, S., “All-Silicon Optical Contactless Testing Of Integrated Circuits", Ph.D. Dissertation,Vanderbilt University, Nashville, TN, USACONFERENCE AND PROCEEDINGS ARTICLES AND PRESENTATIONS• Sayil, S., Boorla, V. K., “Modeling Single Event Crosstalk in Nanometer Technologies”, Proceedingsof the International Conference on Electrical and Electronics Engineering, ELECO'11, 7-11 Nov, Bursa,TURKEY.• Sayil, S., Patel, N., “Soft Error and Soft Delay Mitigation using a Dynamic Threshold Scheme”,Nuclear and Space Radiation Effects Conference, NSREC, 2010.• Sayil, S., Rudrapati, M. S., Borra, U. K., "An Improved Multiline model for Precise Estimation ofCrosstalk", Proceedings of the 2007 IEEE Region 5 Technical Conference, pp. 239-245, April 20-21,Fayetteville, AR, U.S.A.• Sayil, S., "On the Use of Silicon Photonics for Optical Interconnect and Contactless Logic Testing”,Proceedings of the 2007 IEEE Region 5 Technical Conference, pp. 42-48, April 20-21, Fayetteville, AR,U.S.A.• Sayil, S., Kerns, D.V., Kerns, Sherra E., "All-Silicon Optical Technology For Contactless TestingOf Integrated Circuits", Proceedings of the International Conference on Electrical and ElectronicsEngineering , ELECO'01, 7-11 Nov, Bursa, TURKEY.


• Sayil, S. Lee, K.Y. "An Hybrid Neighborhood Training and Maximum Error Algorithm forCMAC", Proceedings of the 2002 World Congress on Computational Intelligence, 5, 31 2002,Honolulu,HI, U.S.A.• Sayil, S., “A Novel Contactless Scheme for IC Testing”, Pamukkale University, Denizli, Turkey,2001GRANTS:• “Low Power Radiation Tolerant VLSI Design for Advanced Spacecraft”, Texas Space GrantConsortium (TSGC)/ NASA New Investigations Program (NIP), October 2010, PI, $9,000.• “Studying the Impact of Power Optimizations on Microchip Radiation Tolerance”, Lamar ResearchEnhancement Grant, Spring 2010, PI, $5,000.• “Space Radiation Effects on Technology and Human Biology and Proper Mitigation Techniques”,Texas Space Grant Consortium (TSGC) / NASA Higher Education, March 2008, PI, $15,000.• “Modeling the Effect of Ionizing Radiation on Circuit Delay for Today’s Advanced MicrochipTechnologies”, Lamar Research Enhancement Grant, Spring 2009, PI, $5,000.• “The Impact of Radiation Induced Single Event Upsets on Cross-talk Noise for Today’s AdvancedMicrochip Technologies”, Lamar Research Enhancement Grant, Spring 2007, PI, $5,000• “Modeling the Impact of Cross-Coupling Noise on Wire Delay for Today’s MicrochipTechnologies”, Lamar Research Enhancement Grant – Spring 2006, PI, $5,000.• “Evaluation of Existing Test Sets for Crosstalk Test Coverage using VHDL Hardware DescriptionLanguage”, Lamar Research Enhancement Grant – Spring 2004, PI, $5,000.• “A New Time-Efficient Method for Precise Estimation of Cross-talk Noise on Multi-line Circuits”,Lamar Research Enhancement Grant – Fall 2003, PI, $5,000.EDITORSHIP:(1) Associate Editor for International Journal of Electronics, October 2008-Present.


PROFESSIONAL ACTIVITIES:IEEE Lamar University Student Branch AdvisorManuscript reviewer for Microelectronics Engineering JournalManuscript Reviewer for CSICC'08 ConferenceManuscript Reviewer for Measurement Science and TechnologyManuscript reviewer for IET Circuits and Systems.Manuscript reviewer for Journal of Vacuum ScienceManuscript reviewer for IEEE Transactions on C. A. D. of Circuits and SystemsManuscript reviewer for IEEE Transactions on Neural NetworksManuscript reviewer for IEEE PotentialsManuscript Reviewer for Journal of Lightwave Technology.Manuscript reviewer for IEEE Design&TestTHESES (MSEE) SUPERVISEDPartivkumar B. Prajapati, “A Comparison of Radiation Tolerance of Different Logic Styles”,Graduated in May, 2011.Vinaychawdary Singamaneni, “Crosstalk Mitigation Using Varying Transmission Gate Voltage”,Graduated in Aug. 2011.Priyank Nerurkar, “Radiation Tolerance of Low Power Design Techniques”, Graduated in Dec.,2011.Harikrushna H. Dhameliya, “Radiation Induced Soft Error Mechanisms in Nanoscale CMOS”,Graduated in Dec., 2011.Bo Sun, “Transmission Gate Technique for Soft Error Mitigation in Nanometer CMOS Circuits”,Graduated in Dec., 2011.


Juyu Wang, “Comparison on various Combinational Logic Related Soft Errors”, Graduated in May,2010.Vijay K. Boorla, “Closed form modeling for Single Event Crosstalk and mitigation techniques”,Graduated in May, 2010.Nareshkumar B. Patel, “Soft Error Mitigation using Dynamic Threshold”, Graduated in Aug., 2010.Abhishek Balaji Akkur, Single Event Crosstalk Noise Contamination in Nanoscale Circuits,Graduated in August 2008.Selcuk Belek, High Altitude Simulation of Fuel Cell, Drs. Sayil†, Myler and Reddy, August 2008.Srinivas Achanta, Comparison of Circuit Level Hardening Techniques for CMOS CombinationalLogic, August 2008.Uday K. Borra “An Analytical Model For Crosstalk Delay Estimation In Deep Sub-Micron VLSICircuits”, Graduated on December 2007.Merlyn Rudrapati, “An improved model for crosstalk noise and sensitivity to parametervariations”, Graduated on May, 2006.Michael Anita, “An Accurate and Time Efficient Cross-talk Noise Model for Multi-line Circuits andits use in Interconnect Optimization” , Graduated on May 2005,

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