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DCP Series Maintenance Software Test Level 3: Partition and Line Module Tests Operations Guide 

(7431 8080–202) 

IMPORTANT 

This hardcopy version of the document (–202) replaces all earlier versions and includes updates that are not 

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Site at http://www.support.unisys.com/. 

This Product Information Announcement announces the revision of the DCP Series Maintenance Software Test 

Level 3: Partition and Line Module Tests Operations Guide. 

Changes to this version include: 

• On page 7–1, inserted the following after step 1: 

2. Terminate all active runs. Example: 

@@CONS TERM CSSRVR 

• On page 7–2, added the following after step 6: 

7. Restart desired runs that you previously terminated. CSSRVR must be restarted. Execute: 

@@CONS ST CSSRVR 

• On page D–10 and D–13, added these two steps after step 2: 

3. Check to see what runs are currently active: 

@@CONS T 

4. Terminate all active runs (with the exception of your own): 


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Announcement only: Announcement and attachments: System: DCP Series 

Date: November 1999 

Part number: 7431 8080–202

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DCP SERIES 

Maintenance Software Test 

Level 3: Partition and Line 

Module Tests 

Operations Guide 

November 1999 

Printed in USA 

Priced Item 7431 8080–202

Format these characters as “white” to force printing of blank page.

DCP SERIES 

Maintenance Software Test 

Level 3: Partition and Line 



Copyright � 1999 Unisys Corporation. 

All rights reserved. 

Unisys is a registered trademark of Unisys Corporation. 

November 1999 

Printed in USA 

Priced Item 7431 8080–202 

Unisys

NO WARRANTIES OF ANY NATURE ARE EXTENDED BY THIS DOCUMENT. Any product or related information 

described herein is only furnished pursuant and subject to the terms and conditions of a duly executed agreement to 

purchase or lease equipment or to license software. The only warranties made by Unisys, if any, with respect to the 

products described in this document are set forth in such agreement. Unisys cannot accept any financial or other 

responsibility that may be the result of your use of the information in this document or software material, including 

direct, special, or consequential damages. 

You should be very careful to ensure that the use of this information and/or software material complies with the laws, 

rules, and regulations of the jurisdictions with respect to which it is used. 

The information contained herein is subject to change without notice. Revisions may be issued to advise of such 

changes and/or additions. 

Notice to Government End Users: The software and accompanying documentation are delivered and licensed as 

“commercial computer software” and “commercial computer software documentation” as those terms are used in 48 

C.F.R. § 12.212 and 48 C.F.R. § 227.7202-1 through 227.7202-4, as applicable. The Government shall receive only those 

rights provided in the standard commercial software license, or where applicable, the restricted and limited rights 

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not be regarded as affecting the validity of any trademark or service mark.

DCP Series 

Maintenance 

Software Test Level 

3: Partition and Line 



DCP Series 

Maintenance 

Software Test 

Level 3: Partition 

and Line Module 

Tests 

Operations 

Guide 

7431 8080–202 7431 8080–202 

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blank page.

Contents 

About This Guide ....................................................................................... xi 

Section 1. Introduction 

Maintenance Software Test Level 3 Overview ...................... 1–1 

Testing Line Modules and Exiting TL3 .................................. 1–3 

Determining Port Assignments .................................. 1–3 

Downing Telcon Lines or DCP/OS Devices ................. 1–3 

Downing DCP/OS Devices ................................ 1–4 

Downing Lines Assigned to Telcon .................... 1–5 

Loading TL3 ............................................................ 1–6 

Loading From a DCP/OS Console ..................... 1–6 

Loading From a DCP/OS Virtual Workstation ...... 1–7 

Exiting TL3 .............................................................. 1–8 

Using the DCP/OS Console ................................................... 1–9 

Function Keys .......................................................... 1–9 

Interactive Mode ...................................................... 1–9 

Test Mode ............................................................... 1–10 

TL3 Menus Overview ................................................ 1–10 

Section 2. Configuring Ports 

Enable Ports Procedure ........................................................ 2–1 

Parameter Line ........................................................ 2–4 

Option Parameter .................................................... 2–6 

Test Chain Options .................................................. 2–7 

UDLC Primary Chain ........................................ 2–8 

UDLC Secondary Chain .................................... 2–9 

Sync Primary Chain ......................................... 2–10 

Sync Secondary Chain ..................................... 2–10 

Async Primary Chain ........................................ 2–11 

Async Secondary Chain ................................... 2–11 

ASCII Bisync Primary Chain .............................. 2–12 

ASCII Bisync Secondary Chain .......................... 2–12 

EBCDIC Bisync Primary Chain ........................... 2–13 

EBCDIC Bisync Secondary Chain ...................... 2–13 

REM1 Primary Chain ........................................ 2–14 

REM1 Secondary Chain .................................... 2–14 

1100 FDX Primary Chain .................................. 2–15 

4X1 Sync Primary Chain .................................. 2–15 

4X1 Sync Secondary Chain .............................. 2–16 

7431 8080–202 iii

Contents 

4X1 UDLC Primary Chain .................................. 2–16 

4X1 UDLC Secondary Chain ............................. 2–16 

4X1 Async Primary Chain ................................. 2–17 

8X1 Async Primary Chain ................................. 2–17 

4X/8X Async Secondary Chain ......................... 2–17 

Ethernet LAN Primary Chain .............................. 2–18 

Ethernet LAN Secondary Chain ......................... 2–18 

4X1 Async and Video Text Chain ....................... 2–18 

Multiple Device Line Module Partial Chain ........... 2–19 

Multiple Device Line Module Complete Chain ...... 2–19 

Multiple Device Line Module Floppy Chain .......... 2–20 

SU57 Back-to-Back Chain ................................. 2–20 

16-Bit Parallel Back-to-Back Chain ..................... 2–21 

BDBI Winchester .............................................. 2–21 

FEPI ................................................................ 2–22 

PLM FEPI ........................................................ 2–22 

Twisted Pair Terminal Emulation Chain ............... 2–22 

Host-Block Mux Chain ....................................... 2–23 

Host-Word Channel Chain ................................. 2–23 

ILM20 High Speed ........................................... 2–24 

ILM-40 FDDI Chain ........................................... 2–24 

ILM-40 Ethernet Chain ...................................... 2–25 

ILM-40 TR Chain .............................................. 2–26 

ILM-40 MS Chain .............................................. 2–26 

ILM-60 4X Ethernet Chain ................................. 2–26 

ILM-60 4X High Speed Chain ............................. 2–27 

ILM-60 Coprocessor ........................................ 2–27 

ILM L-Bus Loopback Chain ................................ 2–27 

Basic Test Chain .............................................. 2–27 

Auto Enable Ports .................................................................. 2–28 

Retrieve Port Configuration ................................................... 2–30 

Disable Ports .......................................................................... 2–30 

Section 3. Specifying Port Controls 

Enable/Disable Port Monitor ................................................. 3–1 

Select Dual-Bus Commands .................................................. 3–1 

Save Port Configuration ........................................................ 3–2 

Section 4. Display Status Information 

Display Errors ........................................................................ 4–1 

View Port Status ...................................................... 4–3 

Display Test Statistics .............................................. 4–5 

Section 5. Specifying Test Conditions 

Clear Error Log ...................................................................... 5–1 

Set Message Length .............................................................. 5–1 

iv 7431 8080–202

Contents 

Enable/Disable Data Checking ............................................. 5–2 

Set Multiple Task Control ...................................................... 5–2 

Configure Files ...................................................................... 5–3 

Section 6. Miscellaneous Options 

Run Debugger ....................................................................... 6–1 

Exit Test ................................................................................. 6–1 

Section 7. Mass Storage Subsystem Testing 

MDLM Port Assignments ....................................................... 7–1 

Testing the MDLM Port .......................................................... 7–1 

Appendix A. Acronyms and Abbreviations 

Appendix B. Error Messages and Fault Isolation 

Theory of Operation .............................................................. B–1 

Line Module Fault Isolation .................................................... B–2 

Error Messages ..................................................................... B–4 

Line Module Status Conditions .............................................. B–8 

UDLC Primary and Secondary Chains ........................ B–9 

Sync Primary and Secondary Chains ......................... B–13 

Async Primary and Secondary Chains ........................ B–15 

ASCII and EBCDIC Bisync Primary and Secondary 

Chains ................................................................ B–18 

REM1 Primary and Secondary Chains ........................ B–20 

1100 FDX Primary Chain .......................................... B–22 

Multiline Sync Primary and Secondary Chains ............. B–24 

Multiline UDLC Primary and Secondary Chains ........... B–28 

4X1 and 8X1 Async Primary and Secondary Chains .... B–32 

4X1 Async and Video Text Chain ............................... B–37 

Multiple Device Line Module (MDLM) Status ................ B–40 

Host Channel Status ................................................ B–43 

BDBI Winchester ...................................................... B–44 

FEPI and PLM FEPI ................................................... B–47 

Ethernet Primary and Secondary Chains .................... B–49 

ILM-20 High Speed .................................................. B–52 

ILM Status ............................................................... B–55 

Host-Block Mux Chain ............................................... B–58 

Appendix C. Line Module Identifiers 

7431 8080–202 v

Contents 

Appendix D. Installing DCP Maintenance Software 

Introduction ............................................................................ D–1 

Installation Instructions .......................................................... D–1 

DCP/5 Procedures ................................................... D–2 

DCP/15 and DCP/50/30 Series Procedures .............. D–6 

DCP200 Procedures ................................................ D–10 

DCP600 Procedures ................................................ D–13 

CAP Procedures ...................................................... D–16 

vi 7431 8080–202

Figures 

1–1. Six Tasks of Using TL3 to Test Line Modules .......................................... 1–2 

1–2. Main Menu ............................................................................................ 1–7 

1–3. Interactive and Test Mode ...................................................................... 1–9 

1–4. TL3 Menus Overview ............................................................................. 1–11 

2–1. Main Menu ............................................................................................ 2–2 

2–2. Enable Ports Menu ................................................................................ 2–2 

2–3. Port Parameter Menu ............................................................................ 2–3 

2–4. Enable Ports Menu ................................................................................ 2–3 

2–5. Sample Status Screen ........................................................................... 2–6 

2–6. Twisted Pair Configuration ..................................................................... 2–22 

2–7. Automatic Port Configuration Menu ........................................................ 2–29 

2–8. Disable Ports Menu ............................................................................... 2–30 

3–1. Enable/Disable Port Monitor Screen ....................................................... 3–1 

3–2. Select Dual-Bus Commands Screen ........................................................ 3–2 

4–1. Example Error Page .............................................................................. 4–1 

4–2. View Port Status Screen ........................................................................ 4–3 

4–3. Display Test Statistics Screen ................................................................ 4–5 

5–1. Set Message Length Screen .................................................................. 5–1 

5–2. Multiple Task Control Screen ................................................................. 5–2 

5–3. File Configuration Screen ....................................................................... 5–3 

B–1. Line Module Fault Isolation Procedures (Sheet 1 of 2) .............................. B–2 

B–2. Line Module Fault Isolation Procedures (Sheet 2 of 2) .............................. B–3 

7431 8080–202 vii

Figures 

viii 7431 8080–202

Tables 

1–1. TL3 Task Referral ................................................................................. 1–2 

1–2. Making Selections in Interactive Mode .................................................... 1–10 

2–1. Parameter Definitions ............................................................................ 2–4 

2–2. Status Screen Field Description .............................................................. 2–7 

2–3. UDLC Primary Chain Loopback Option Table ........................................... 2–8 

2–4. UDLC Secondary Chain Loopback Option Table ....................................... 2–9 

2–5. Sync Primary Chain Loopback Option Table ............................................ 2–10 

2–6. Sync Secondary Chain Loopback Option Table ........................................ 2–10 

2–7. Async Primary Chain Loopback Option Table ........................................... 2–11 

2–8. Async Secondary Chain Loopback Option Table ...................................... 2–11 

2–9. ASCII Bisync Primary Chain Loopback Option Table ................................. 2–12 

2–10. ASCII Bisync Secondary Chain Loopback Option Table ............................. 2–12 

2–11. EBCDIC Bisync Primary Chain Loopback Option Table .............................. 2–13 

2–12. EBCDIC Bisync Secondary Chain Loopback Option Table ......................... 2–13 

2–13. REM1 Primary Chain Loopback Option Table ........................................... 2–14 

2–14. REM1 Secondary Chain Loopback Option Table ....................................... 2–14 

2–15. FDX Primary Chain Loopback Option Table .............................................. 2–15 

2–16. 4X1 Sync Primary Chain Loopback Option Table ..................................... 2–15 

2–17. 4X1 Sync Secondary Chain Loopback Option Table ................................. 2–16 

2–18. 4X1 UDLC Primary Chain Loopback Option Table .................................... 2–16 

2–19. 4X1 UDLC Secondary Chain Loopback Option Table ................................ 2–16 

2–20. 4X1 Async Primary Chain Loopback Option Table .................................... 2–17 

2–21. 8X1 Async Primary Chain Loopback Option Table .................................... 2–17 

2–22. 4X/8X Async Secondary Chain Loopback Option Table ............................ 2–17 

2–23. Ethernet LAN Primary Chain Loopback Option Table ................................ 2–18 

2–24. Ethernet LAN Secondary Chain Loopback Option Table ............................ 2–18 

2–25. 4X1 Async and Video Text Chain Loopback Option Table .......................... 2–18 

2–26. Multiple Device Line Module Partial Chain Loopback Option Table ............. 2–19 

2–27. Multiple Device Line Module Complete Chain Loopback Option Table ......... 2–19 

2–28. Multiple Device Line Module Floppy Chain Loopback Option Table ............. 2–20 

2–29. SU57 Back-to-Back Chain Loopback Option Table .................................... 2–20 

2–30. 16-Bit Parallel Back-to-Back Chain Loopback Option Table ........................ 2–21 

2–31. BDBI Winchester Chain Loopback Option Table ........................................ 2–21 

2–32. FEPI Chain Loopback Option Table ......................................................... 2–22 

2–33. PLM FEPI Chain Loopback Option Table .................................................. 2–22 

2–34. Twisted Pair Terminal Emulation Chain Loopback Option Table ................. 2–23 

2–35. ILM20 High Speed Chain Loopback Option Table ..................................... 2–24 

2–36. ILM-40 FDDI Chain Loopback Option Table .............................................. 2–24 

2–37. ILM-40 Ethernet Chain Loopback Option Table ......................................... 2–25 

2–38. ILM-40 TR Chain Loopback Option Table ................................................. 2–26 

2–39. ILM-40 MS Chain Loopback Option Table ................................................ 2–26 

2–40. ILM-60 4X Ethernet Chain Loopback Option Table .................................... 2–26 

2–41. ILM60 4X High Speed Chain Loopback Option Table ................................ 2–27 

7431 8080–202 ix

Tables 

2–42. Basic Test Chain Loopback Option Table ................................................. 2–27 

2–43. Line Modules and Hardware IDs .............................................................. 2–28 

4–1. Console Errors ...................................................................................... 4–2 

4–2. Abbreviations Used in Error Messages ................................................... 4–2 

4–3. Fields on the View Port Status Screen ..................................................... 4–4 

4–4. Fields on the Display Test Statistics Screen ............................................. 4–6 

B–1. Sample Error Field Description ............................................................... B–1 

C–1. Line Module Identifiers .......................................................................... C–1 

x 7431 8080–202

About This Guide 

Purpose 

Audience 

This guide explains how to use the DCP Series Maintenance Test Level 3 (TL3) to test the 

line modules and mass storage. It allows the user to isolate a faulty DCP line module, and 

to test and verify its replacement. 

The audience for this guide includes the system operator, who may also be the network 

administrator or network analyst, and Unisys technical support personnel, including 

customer service engineers (CSEs). 

Prerequisites 

Persons unfamiliar with distributed communication processors (DCPs), or with the 

accompanying network software, may need to acquire some of the documents listed in 

Related Product Information for more information. 

How To Use This Document 

All users should read Section 1, which provides an introduction to the maintenance 

software features and provides load instructions. The book is organized so Sections 2 

through 6 describe the major tasks that can be completed from the Main Menu of the TL3 

software. 

The main menu is organized by tasks into four groups: port configuration (Section 2) and 

control (Section 3), status information (Section 4), test control options (Section 5), and 

miscellaneous options (Section 6). Section 7 provides procedures for testing mass 

storage. 

Users can selectively read Sections 2 through 7 according to the tasks they need to 

perform. Refer to Appendix A for definitions of technical terms and abbreviations used in 

the software. Refer to Appendix B for an explanation of maintenance software error 

messages. Refer to Appendix C for a list of line module identifiers, including hardware 

and microcode Ids. Refer to Appendix D for maintenance software installation. 

7431 8080–202 xi


Organization 

This guide is divided into the following sections and appendixes: 

Section 1. Introduction 

This introduction provides an overview of the maintenance software, including features, 

memory requirements and load instructions. This section also introduces the main menu 

and function keys used within menus. 

Section 2. Configuring Ports 

This section explains the port configuration options that allow the user to manually 

enable, automatically enable, and disable ports. This section also defines the parameter 

line options, which must be defined for line modules as part of the port configuration 

process, and describes allowable loopback options by line module type and hardware ID. 

Section 3. Specifying Port Controls 

This section describes port control options that allow the user to enable the port monitor, 

load and save the port table, and set dual bus functions. 

Section 4. Display Status Information 

This section explains the options that allow the user to display status and error messages, 

and test statistical information. This section also explains how to interpret status 

information. 

Section 5. Specifying Test Conditions 

This section describes the options that allow the user to enable data checking, clear error 

logs, set message length, and enable multiple task control. 

Section 6. Miscellaneous Options 

This section describes the DCP/OS debugger option and the TL3 maintenance software 

exit option. The DCP/OS debugger option allows an experienced programmer to inspect 

and change memory from the operator's console. This option should only be used by 

experienced programmers for debugging test software. 

Section 7. Mass Storage Subsystem Testing 

The procedures for testing mass storage are contained in this section. 

Appendix A. Acronyms and Abbreviations 

This appendix defines technical acronyms and abbreviations used throughout the 

maintenance software and operations guide. 

xii 7431 8080–202

Appendix B. Error Messages and Fault Isolation 


This appendix provides a listing of possible console error messages, as well as information 

for interpreting values that appear in the console error messages. The interpretation 

defines the set bit number, and provides a short explanation of the error. This section also 

includes a method for line module fault isolation and correction. 

Appendix C. Line Module Identifiers 

This appendix lists DCP Series line module types, their corresponding hardware IDs, and 

microcode IDs. It also provides the abbreviated and full name for all line modules. 

Appendix D. Installing DCP Maintenance Software 

Maintenance software installation procedures are provided in this appendix for the DCP/5, 

DCP/15, DCP/50/30, DCP200, DCP600, CAP, and ARCH processors. 

Related Product Information 

Following is a complete list of the DCP600 library, including the DCP Series books: 

DCP600 Series Distributed Communications Processors Installation and 

Servicing Guide (7431 8577) 

Provides information necessary for the customer service engineer to install and maintain 

the DCP600 processors and control station. 

DCP Line Modules and Cables Servicing Guide (7436 4506) 

Explains how to install and maintain line modules, and provides maintenance information 

for communication cables. 

DCP600 Series Capabilities and Planning Overview (7431 7769) 

Summarizes the hardware features and functions of the DCP600 Series system. Also 

presents installation planning criteria (product characteristics and environmental 

conditions) to be addressed in advance of DCP600 equipment arrival. 

DCP600 Series Operations Guide (7431 7777) 

Describes operator controls, system indicators, booting and loading procedures, and the 

interface to DCP/OS, Telcon and associated application programs, using the Control 

Station. 

DCP Series Maintenance Software Test Level 3: Partition and Line Module Tests 

Operations Guide (7431 8080 - this guide) 

Explains how to use the DCP Maintenance Test Level 3 (TL3) to test the active DCP 

partition and its line modules. 

7431 8080–202 xiii


DCP Series Configuration Reference Manual (UP–13329) 

Provides detailed DCP hardware configuration information required by field marketing 

personnel to produce complete and accurate equipment orders. Supplements the Unisys 

DCP price book for field marketing personnel. 

DCP Series Communications Processor Architecture Programming Reference 

Manual (7431 5805) 

Describes the instruction repertoire and architecture of the DCP family. 

Software manuals referred to directly in some of the DCP600 hardware manuals include 

the following: 

DCP Series Operating System (DCP/OS) Operations Reference Manual 

(7831 5702 current version) 

Covers booting and dumping the DCP; building, debugging, and editing programs; and 

executing utility programs from DCP/OS. 

DCP Series Telcon Operations Reference (7831 5728) 

Covers NMS and online configuration commands, provides procedures for running online 

hardware verification operations, file transfer commands, and parameters for hardware 

instrumentation. Lists general NMS and CENLOG console messages. 

DCP Series Telcon Operations Guide (7831 5785) 

Explains organization of a DCP network, using NMS consoles and commands, using 

Telcon online configuration, transferring files in a DCP environment, interpreting 

messages, turning on instrumentation, and controlling console and logged messages. 

DCP Series Telcon Installation Guide (7831 5645) 

Describes how to generate, install, and verify Communications Delivery Software on an 

OS 2200 host and its DCPs. 

DCP Series Telcon End Use Guide (7436 0736) 

Explains how to establish sessions through Telcon, establish sessions to IBM host 

applications, send and receive unsolicited messages in a Telcon network, use the terminal 

operations menu facility (TOMF), open and close sessions, and use TCP-IP Stack 

TELNET. 

Buyer's Guide to DCP Communication Products (7436 9828–000) 

This guide provides marketing personnel and clients with detailed information about DCP 

hardware, software, networking connectivity, and product migration. It fills the gap 

between marketing brochures and technical manuals. 

xiv 7431 8080–202


DCP/5 Installation and Operations Reference Manual (UP–14133 Rev. 1) 

This manual provides instructions for installing and operating a DCP/5. 

Notation Conventions 

This guide uses the following notation conventions: 

UPPERCASE UPPERCASE letters indicate a command name or a required 

keyword. Enter these UPPERCASE keywords exactly as they are 

shown. 

Lowercase italic Lowercase italic represents a variable value or parameter that you 

must enter as part of a command. This is a name or a number that 

you define. 

Key caps All markings on key caps are shown in UPPERCASE and spelled 

exactly as they appear on the keyboard. 

Brackets [ ] Brackets indicate optional parameters. 

7431 8080–202 xv


xvi 7431 8080–202

Section 1 

Introduction 

This section covers: 

• Maintenance Software Test Level 3 (TL3) 

• Loading and exiting instructions 

• Instructions for using the console 

Maintenance Software Test Level 3 Overview 

The Unisys Maintenance Software Test Level 3 (TL3) is the third in the series of DCP600 

test programs. However, it can also be used to test line modules in the DCP/5, DCP200, 

CAP, and the DCP/50/30 processors. TL3 is a full-partition test aimed at isolating DCP line 

module problems. It can also be used to verify operation of new line modules. 

TL3 tests line modules on the active partition by passing data through each DCP line 

module in a loopback test. TL3 software can test up to 256 ports simultaneously. Data 

checking can be enabled. 

TL3 software allows you to: 

• Display port status 

• Enable and disable ports 

• View and clear the error log 

• Enable and disable data checking 

• Save or load the port table 

• Configure ports automatically 

• Set message lengths 

• Display test statistics 

Note: Information on Maintenance Software Test Level 1 (POC self-test) and Level 2 

(which tests processor hardware and storage) is found in the DCP600 Series 

Processors Installation and Servicing Guide (7431 8577), available to Unisys 

Customer Service Engineers, only. 

7431 8080–202 1–1

Introduction 

Refer to Figure 1–1 for a simplified overview of the six tasks required for using TL3 to test 

line modules. Table 1–1 provides a reference to a description of the tasks. 

Figure 1–1. Six Tasks of Using TL3 to Test Line Modules 

Table 1–1. TL3 Task Referral 

IF you want to... THEN refer to... 

Determine port number and line module type Section 2, ”Configuring Ports” 

(Retrieve Port Configuration) 

Determine port assignments Section 1, ”Introduction” 

(Determining Port Assignments) 

Down DCP/OS devices Section 1, ”Introduction” 

(Downing DCP/OS Devices) 

Down lines assigned to Telcon Section 1, ”Introduction” 

(Downing Lines Assigned to Telcon) 

Load TL3 from a DCP/OS console Section 1, ”Introduction” 

(Loading From a DCP/OS Console) 

Load TL3 from a Telcon terminal Section 1, ”Introduction” 

(Loading From a DCP Virtual Workstation) 

Enable port tests Section 2, ”Configuring Ports” 

(Enable Ports Procedure) 

Exit TL3 Section 1, ”Introduction” 

(Exiting TL3) 

1–2 7431 8080–202

Testing Line Modules and Exiting TL3 

Introduction 

Before a line module can be tested with TL3, its port must not be assigned to Telcon or 

DCP/OS. If a port is assigned to either, you will have to down the line(s) or device(s) 

associated with the port before the line module can be tested by TL3. There are two 

consoles from which you can enter commands, either a DCP/OS console or a DCP/OS 

virtual workstation. 

Note: When commands are entered in Telcon or DCP/OS, the command must be 

preceded by a start-of-entry character ¾ (SOE). Telcon or DCP/OS normally 

provides the SOE; thus in the prompts to type commands in this guide, the SOE 

character is not shown. 

Determining Port Assignments 

1. Determine port assignment by using the FACILITY STATUS command. Type the 

command as follows at the SOE (start-of-entry character ¾) and press XMIT: 

@@CONS FS,PORTS 

For more information on the FS command, refer to the Distributed Communications 

Processor Operating System (DCP/OS) Operations Reference Manual (7831 5702). 

2. The screen displays a list of ports, their line modules, and assignments. The screen 

scrolls the information from bottom to top; you can halt the screen display by pressing 

the MSG WAIT key. To resume the screen scroll, press XMIT. 

3. At the end of each line, the word Asg'd: is displayed. If nothing appears after Asg'd:, 

the port is not assigned. 

• If *MON* appears, the port is assigned to DCP/OS and you must down the devices 

associated with the port before testing with TL3. 

• If a run ID appears (usually TELCON), the port is assigned and you must free the 

port before testing with TL3. To free a port assigned to Telcon, you must down all 

the lines associated with the port. 

For instructions on downing lines and devices, refer to the following subsection. 

Downing Telcon Lines or DCP/OS Devices 

If a port is assigned, you must down the DCP/OS devices or the Telcon lines before 

running TL3 on the line module. 

7431 8080–202 1–3

Introduction 

Downing DCP/OS Devices 

To down the DCP/OS devices, perform the following tasks before testing with TL3. 

1. You must first check to see what runs are currently active by entering the command: 

@@CONS T 

2. Terminate all active runs except your own. For example, to terminate the run 

CSSRVR, type the command: 


3. You must determine the device name that is associated with the port, using the 

FACILITY STATUS command. Type the following command: 

@@CONS FS,ALL 

4. Next you must down the device associated with the port using the DCP/OS DOWN 

facility command as follows: 

@@CONS DN device-name 

where device-name is the name of the DCP/OS configured device. 

Caution 

Make sure you don’t execute the DN command on the port you are currently using! 

For more information on the DN console command, refer to the Distributed 

Communications Processor Operating System (DCP/OS) Operations Reference 

Manual (7831 5702). 

5. After all devices associated with the port are downed, DCP/OS frees the port. 

1–4 7431 8080–202

Downing Lines Assigned to Telcon 

To down lines assigned to Telcon, perform the following steps before loading TL3. 

Introduction 

1. From a DCP/OS console with Telcon running, press the MSG WAIT key to display a 

start-of-entry character (¾). 

2. Use the LIST command to determine the run-number. At the SOE, type the following 

command: 

run-number LI 

The Telcon run number is usually displayed in the upper lefthand corner of the 

DCP/OS console. The Telcon run-number can also be determined by using the 

DCP/OS RUN CHECK command as follows: 

@@CONS RC run-name 

For more information on the RC console command, refer to the Distributed 

Communications Processor Operating System (DCP/OS) Operations Reference 

Manual (7831 5702). 

3. A list of all Telcon line names and their port numbers is displayed. Determine the line 

identifiers for all Telcon ports to be downed. All lines assigned to a port to be tested 

must be downed. Press the MSG WAIT key. An SOE character is displayed. 

Caution 

Make sure you don’t execute the DOWN command on the port you are currently 

using! 

4. At the SOE, type the following command: 

run-number DOWN LINE line-name 

Repeat this step for all lines associated with all ports to be tested. 

For more information on the DOWN console command, refer to the DCP Series Telcon 

Operations Reference (7831 5728). 

5. After all lines associated with the port are downed, Telcon frees the port, unless the 

port is an ILM port. To free ILM ports after the lines have been downed, use the ILM 

command as follows to enter ILM mode: 

run-number ILM 

6. Then use the FREE command as follows to free the port: 

run-number FREE PORT xx 

Where xx is the port number. 

7431 8080–202 1–5

Introduction 

Loading TL3 

There are two consoles from which you can load TL3: a DCP/OS console and a DCP/OS 

virtual workstation. Refer to the instructions for your console type. 

Loading From a DCP/OS Console 

When loading TL3 from a DCP/OS console, follow these steps: 

1. First, press the MSG WAIT key on your terminal keyboard. 

2. To sign on, enter the following command at the prompt and press XMIT: 

@RUN[,D] run-name,,SYS$ 

where: 

D is required to run the DCP/OS debugger. 

run-name is up to six alphanumeric characters and identifies the run. 

SYS$ is the default file qualifier. 

3. To run TL3, enter the following command at the prompt and press XMIT: 

@TL3[,options] 

Options: 

E causes TL3 to notify the control station when a fault is detected. 

F allows operation of TL3 without the use of Function keys. When this option is 

selected, regular screen updates do not occur. This option may be useful when 

running TL3 from a remote console. 

H displays a Help information screen at the beginning of TL3. 

Q allows queuing of input to TL3. Normally TL3 ignores unexpected input. 

However, if the Q option is specified, unexpected input is placed on a queue. 

This input is then used when TL3 solicits input. This option is required when 

running TL3 from an @ADD stream. 

The TL3 main menu (Figure 1–2) is displayed. This menu allows you to select line 

module test options for starting and stopping tests, specifying test conditions, and 

displaying status and error messages. TL3 remains loaded until you exit the main 

menu. 

Note: The command: 

@TL3,! 

can be used to force TL3 to be completely memory-resident. This option is 

used to perform disk testing and maintenance. For more information, refer 

to the Distributed Communications Processor Operating System (DCP/OS) 

Operations Reference Manual (7831 5702). 

1–6 7431 8080–202

Figure 1–2. Main Menu 

Introduction 

Main menu options are organized by task into four groups: port configuration and control, 

status information, test control options, and miscellaneous options. To select an option, 

type the number of the desired option and press the XMIT key. 

The main menu can be recalled at any time during testing by pressing the F2 key. 

Loading From a DCP/OS Virtual Workstation 

A DCP/OS Virtual Workstation is a terminal from which a session may be established with 

DCP/OS via a Telcon Network. TL3 may be run from a virtual workstation by the 

following steps: 

1. To run TL3, you must establish a session on the OS on the DCP you want to run TL3. 

Unless you are already directly connected to a DCP, enter the following Telcon OPEN 

command at the SOE and press the XMIT key: 

$$OPEN XEU–name 

where XEU–name identifies the XEU of the DCP node to which you are opening. 

If an OS session is already established, make sure you are not in @@CONS mode; if so, 

your keyboard input is not passed to the TL3 program. To terminate @@CONS mode, 

enter the following command at the SOE: 

@@END 

The following prompt appears: 

** Unisys DCP Operating System ** 

Enter RUN control statement -> 

7431 8080–202 1–7

Introduction 

Exiting TL3 

2. To initiate a run, enter the following command at the DCP/OS prompt and press the 

XMIT key: 

@RUN[,D] run-name,,SYS$ 

where: 

D is required to run the DCP/OS debugger. 

run-name is up to six alphanumeric characters and identifies the run. 

SYS$ is the default file qualifier. 

For more information on the @RUN (Initiate Run) command, refer to the DCP/OS 


3. After establishing a session, you are ready to load TL3. To load TL3, type the 

following command at the DCP/OS prompt and press the XMIT key: 

@TL3[,options] 

Options: 

E causes TL3 to notify the control station when a fault is detected. 

F allows operation of TL3 without the use of Function keys. When this option is 

selected, regular screen updates do not occur. This option may be useful when 

running TL3 from a remote console. 

H displays a Help information screen at the beginning of TL3. 

Q allows queuing of input to TL3. Normally TL3 ignores unexpected input. 

However, if the Q option is specified, unexpected input is placed on a queue. 

This input is then used when TL3 solicits input. This option is required when 

running TL3 from an @ADD stream. 

The main menu is displayed (refer to Figure 1–2). This menu allows you to select line 

module test options for starting and stopping tests, specifying test conditions, and 

displaying status and error messages. TL3 remains loaded until you exit the main 

menu. 

To exit TL3, select the Exit Test option (17) from the main menu and press the XMIT key. 

The DCP/OS prompt displays. 

1–8 7431 8080–202

Using the DCP/OS Console 

Function Keys 

Introduction 

TL3 runs in two modes: interactive mode and test mode. When TL3 is loaded, the console 

runs in interactive mode. While a test is running, the console runs in test mode. You 

switch between interactive mode and test mode using function keys. 

The following function keys have special meaning in TL3: 

Interactive Mode 

Function Key TL3 Function 

F1 Displays HELP information. 

F2 Returns to the Main menu and interactive mode. 

F3 Executes certain commands and switches to test mode. 

F9 Restarts TL3. 

When a menu is displayed, the console is running in interactive mode (see Figure 1–3). 

Interactive mode allows you to enter and edit data, and to select options and parameters 

that determine how a software test is performed. Illegal entries generate an error message 

at the menu prompt line; the message disappears when you enter a valid option or 

parameter. Table 1–2 describes how to make selections in interactive mode. 

Figure 1–3. Interactive and Test Mode 

7431 8080–202 1–9

Introduction 

Test Mode 

Table 1–2. Making Selections in Interactive Mode 

IF you want to ... THEN do this... 

Select an option from the main menu Type the number or letter of the desired option after 

the cursor and press the XMIT key. 

Enter a parameter on any menu Type the letter(s) or number(s) in the first parameter 

field. Press the TAB key to move to the next field. 

After all parameters are entered, press the XMIT key. 

Correct an entry on any menu Use the BACKSPACE key to delete the incorrect 

information, enter the correct data, TAB to the end of 

the line, and press the XMIT key. 

Return to the main menu at any time during 

the program 

Press the F2 key. 

While a test is running, the console runs in test mode. TL3 performs tests on the line 

modules according to the parameters you entered while in interactive mode. You can 

suspend test mode by pressing F2; the main menu displays and the console runs in 

interactive mode. To resume test execution, press F3 from the main menu. 

TL3 Menus Overview 

Figure 1–4 provides a block diagram of the various menus or screens accessible from the 

Main Menu screen. Each of the menu screens illustrated in the figure will be explained 

and illustrated in the sections and subsections that follow. 

1–10 7431 8080–202

Interactive Mode 

Figure 1–4. TL3 Menus Overview 

Test Mode 

Introduction 

7431 8080–202 1–11

Introduction 

1–12 7431 8080–202

Section 2 

Configuring Ports 

This section explains the TL3 options that allow you to: 

• Select ports to enable, enable selected ports, and specify which ports to list on the 

Enable Ports menu. 

• Specify a line module and parameters required to execute one or more test chains 

(programs) on a particular port or set of ports (Enable Ports option). 

• Specify a line module and certain parameters and direct the software to automatically 

select and run valid test chains on the specified port or ports. This option is valuable if 

you don't know which tests are valid for the ports to be tested. The software matches 

the hardware ID of the line module against a table of test chains to select the valid 

tests (Auto Enable Ports option). 

• Retrieve and use the same test configuration previously saved on mass storage. The 

test option, loopback parameter, and throttle value for each PP is restored and 

initialized (Retrieve Port Configuration option). 

• Disable one or more ports. Ports are defined individually or within a range until all 

ports to be disabled are selected (Disable Ports option). 

Enable Ports Procedure 

Note: Most line modules must be loaded in order to be operational. TL3 loads line 

modules from elements on mass storage. Refer to the subsection titled 

“Configure Files” in Section 5, “Specifying Test Conditions,” for more 

information on line module load files. 

To select and enable a port using the Enable Ports option, follow these steps; if you need 

help, press the H or F1 key. 

7431 8080–202 2–1


1. Select the Enable Ports option (1) from the Main menu (Figure 2–1) and press the 

XMIT key. 

Figure 2–1. Main Menu 

2. The Enable Ports menu (see Figure 2–2) is displayed. The lower portion of the screen 

displays port status for 16 ports. Use the List Ports option (3) at the top of the screen 

to specify which ports to display. Before enabling ports, you must select the ports to 

test. Enter (1) to select ports to enable. TL3 will prompt you for the port number. 

Enter the port number on the option line (denoted by the ¾ character) and press 

XMIT. 

Figure 2–2. Enable Ports Menu 

2–2 7431 8080–202


3. The Port Parameter menu (Figure 2–3) is displayed. The lower portion of the screen 

displays the valid line module options for the port selected. Near the top of the screen 

is the port parameter line, denoted by the ¾ (SOE) character. Enter a valid parameter 

for each field and then press XMIT. Table 2–1 provides a description and gives a valid 

range for each parameter. After the port parameters have been entered, TL3 prompts 

you for another port number. Enter another port number or exit. 

Figure 2–3. Port Parameter Menu 

4. Upon exiting, the Enable Ports menu (Figure 2–4) is displayed again. An asterisk (*) 

precedes the port number(s) that you selected. The test option selected is displayed 

following the port number, and is located under the option column. After all ports and 

test conditions have been defined, enter 2 (or press F3) on the options line of the 

Enable Ports menu and press XMIT to enable the ports and start the tests. 

Figure 2–4. Enable Ports Menu 

7431 8080–202 2–3


Parameter Line 

The parameter line on the Port Parameter menu (see Figure 2–3) lets you specify line 

module test conditions, including the test to be run, the port(s) to be tested, the time 

between data transmissions, and how data is looped back. Table 2–1 defines the 

parameters you must set before pressing F1 to enable ports and run tests. 

Table 2–1. Parameter Definitions 

Parameter Description Valid Range 

Option Specifies the test chain to be run on the line 

module port(s). A detailed explanation of 

Enable Ports options, including allowable 

loopback selections, is found in "Enable Ports 

Options" later in this section. 

Repeat When several ports are to be configured the 

same way, use the Repeat parameter to 

define how many consecutive ports beyond 

the first specified port will be enabled for the 

test. 

For example, if the SYNC option is selected, 

the Port parameter is 02, and the Repeat 

parameter is set to 0D, then port 02 and the 

thirteen ports following port 02 (i.e., port 03 

through port 0E) would be enabled to run a 

synchronous line module chain. 

If the range of selected ports includes any 

ports used by DCP/OS or other modules, the 

software prevents user interference. Errors 

will be logged on ports which are not 

enabled. 

Throttle Indicates the number of interface dependent 

time cycles (generally milliseconds) the port 

waits between data transmissions. 

The valid range is 

displayed in the Line 

Module Options portion 

of the screen (Figure 

2–2). 

Valid repeat values are 

00 through FF (hex). If 

the port range exceeds 

port FF, only valid 

ports are enabled. 

Default is 00. 

Valid throttle values are 

0000 to FFFF (hex). 

Normally the throttle is 

set to 0000. 

Default is 0000. 

continued 

2–4 7431 8080–202

Table 2–1. Parameter Definitions (cont.) 


Parameter Description Valid Range 

Loopback All primary port processor (PP) chains that 

are run with TL3 send data and then receive 

the same data. This requires that output 

data be looped back, so it can be received 

as input. You determine how the data is 

looped back by selecting one of four 

loopback modes: 

• Internal loopback - sets line module to 

loopback data through its own circuitry. 

• External loopback - sets line module to 

receive data from a connected device 

(either another line module, a modem, 

or a loopback connector) that loops 

back data. 

• Local loopback - sets line module to 

receive data from a directly connected 

modem that loops back data. This is 

required for V.35, RS449, V.54. 

• Remote loopback - sets line module to 

receive data from a modem linked to 

another modem that loops back the 

data. 

Any other Loopback parameter is interpreted 

as internal loopback. 

The loopback parameter has no effect on: 

• Line modules without loopback 

capability. 

• Line modules connected to external 

devices which do not support local or 

remote loopback capability. 

I - Internal 

X - External 

R - Remote 

L - Local 

Default is I. 

7431 8080–202 2–5


Option Parameter 

The Option parameter on the Port Parameter menu (see Figure 2–3) lets you select line 

module test chains to run on one or more ports. Each test chain is only valid for a certain 

set of line modules. If you select a test chain that is not valid for the specified line module 

port(s), an error is logged in the error log (see option 8 on the main menu). If you are 

unsure about which tests are valid for the specified ports, the Line Module Options portion 

of the Port Parameter menu displays the valid tests for the port selected. 

While port tests are running (Test mode), the status screen is displayed. If an error 

occurs, an error message displays in the middle of the status screen. The last error 

message remains displayed until the error log is cleared. An error log captures and 

maintains a list of all error messages so you can view them at a later time. The test status 

is updated every two seconds until you press the F2 key. Figure 2–5 shows a sample 

status screen. 

Figure 2–5. Sample Status Screen 

2–6 7431 8080–202

The fields on the status screen (see Figure 2–5) are defined in Table 2–2. 

Test Chain Options 

Table 2–2. Status Screen Field Description 

Status Field Description 


Total Cycles The total number of messages sent and received. 

Errors Total number of errors. 

2-Sec Count Number of messages sent and received in the last 

2-second period. 

Data Chk Flag indicating whether data is checked. 

Message Length The length of messages being sent. 

Elapsed Time Total test time. Does not include time spent in 

interactive mode. 

CPS: Total Number of CPs on the partition. 

Ports: Total Number of ports in the system. 

Ports: Active Number of ports that are actively communicating 

with the test software. 

Ports: Dormant Number of ports that are waiting to be switched to 

the active state. 

Error Field Displays the time and name of the last error 

recorded in the error history log. Clearing the 

error log is the only way to clear this error display. 

Port Monitor Field Displays port, hardware ID (HID), microcode ID 

(MID), option, loopback type, errors and cycles, 

for up to six ports (selected using option 5.) 

The following subsection describes each test chain option available on the Enable Ports 

menu, and lists allowable loopback options by line module type and hardware ID (HID). 

After you select the chain to run, enter the option number in the Option field on the 

parameter line. 

7431 8080–202 2–7


UDLC Primary Chain 

The Primary Chain sends and receives the same data. 

This table outlines the hardware configurations that can be used with the UDLC Primary 

Chain option. 

Line Module 

Type 

Table 2–3. UDLC Primary Chain Loopback Option Table 

Hardware ID Loopback Options 

Internal External Local Remote 

MSLLM 60 Y Y Y Y 

61 Y Y N N 

66 Y Y Y Y 

67 Y Y N N 

6F Y N N N 

HSLLM 70 Y Y Y Y 

71 Y Y N N 

7D Y Y N N 

7E Y Y Y Y 

7F Y N N N 

TPLM 65 Y N N N 

DCSS 64 Y Y N N 

2–8 7431 8080–202

UDLC Secondary Chain 


The Secondary Chain sends received data back to the sender. The line module must be 

externally connected with a line module running a UDLC primary chain. 

Line Module 

Type 

Table 2–4. UDLC Secondary Chain Loopback Option Table 

Hardware ID Loopback Options 


MSLLM 60 N Y N N 

61 N Y N N 

66 N Y N N 

67 N Y N N 

HSLLM 70 N Y N N 

71 N Y N N 

7D N Y N N 

7E N Y N N 

DCSS 64 N Y N N 

TPLM* 65 N Y N N 

* See Twisted Pair Terminal Emulation Chain described in this section. 

7431 8080–202 2–9


Sync Primary Chain 

This chain sends and receives the same data. 

Table 2–5. Sync Primary Chain Loopback Option Table 

Line Module Type Hardware ID Loopback Options 



61 Y N N N 

66 Y Y Y Y 

67 Y Y N N 

6F Y N N N 


7D Y Y N N 

7E Y Y Y Y 

7F Y N N N 

Sync LM 50 Y Y N N 

Sync Secondary Chain 

The secondary chain sends received data back to the sender. The line module must be 

externally connected with a line module running a Sync primary chain. 

Table 2–6. Sync Secondary Chain Loopback Option Table 




66 N Y N N 

67 N Y N N 


7D N Y N N 

7E N Y N N 

Sync LM 50 N Y N N 

2–10 7431 8080–202

Async Primary Chain 

This option sends and receives the same data. 

Table 2–7. Async Primary Chain Loopback Option Table 





62 Y Y N N 

63 Y Y N N 

67 Y Y N N 

Async LM 40 Y Y N N 

Sync LM 50 Y Y N N 

Async Secondary Chain 

This option loads a line module with asynchronous microcode, then sends received data 

back to the sender. The line module must be externally connected with a line module 

running an asynchronous primary chain. 

Table 2–8. Async Secondary Chain Loopback Option Table 




62 N Y N N 

63 N Y N N 

67 N Y N N 

Async LM 40 N Y N N 

Sync LM 50 N Y N N 

7431 8080–202 2–11


ASCII Bisync Primary Chain 

This option runs a line module loaded with ASCII bisynchronous microcode. 

Table 2–9. ASCII Bisync Primary Chain Loopback Option Table 




66 Y Y Y Y 

67 Y Y* N N 

6F Y N N N 


7D Y Y N N 

7E Y Y Y Y 

7F Y N N N 

* External loopback options can not be run on this line module using a loopback connector. It 

must be connected to a modem in test mode. 

ASCII Bisync Secondary Chain 

This option runs a line module loaded with ASCII bisynchronous microcode. The line 

module must be connected to a line module running an ASCII Bisync Primary chain. 

Table 2–10. ASCII Bisync Secondary Chain Loopback Option Table 




66 N Y N N 

67 N Y* N N 


7D N Y N N 

7E N Y N N 



2–12 7431 8080–202

EBCDIC Bisync Primary Chain 


This option runs a loadable line module loaded with EBCDIC bisynchronous microcode. 

Table 2–11. EBCDIC Bisync Primary Chain Loopback Option Table 




66 Y Y Y Y 

67 Y Y* N N 

6F Y N N N 


7D Y Y N N 

7E Y Y Y Y 

7F Y N N N 



EBCDIC Bisync Secondary Chain 

This option runs a loadable line module loaded with EBCDIC bisynchronous microcode. 

The line module must be connected externally to a line module running an EBCDIC Bisync 

Primary chain. 

Table 2–12. EBCDIC Bisync Secondary Chain Loopback Option Table 




66 N Y N N 

67 N Y* N N 


7D N Y N N 

7E N Y N N 



7431 8080–202 2–13


REM1 Primary Chain 

This option loads a loadable line module with REM1 microcode. 

Table 2–13. REM1 Primary Chain Loopback Option Table 




67 Y Y N N 

6F Y N N N 


REM1 Secondary Chain 

7D Y Y N N 

7E Y Y Y Y 

7F Y N N N 

This option loads a loadable line module with REM1 microcode. The line module must be 

connected externally to a line module running an REM1 Primary chain. 

Table 2–14. REM1 Secondary Chain Loopback Option Table 




66 N Y N N 

67 N Y N N 


7D N Y N N 

7E N Y N N 

2–14 7431 8080–202

1100 FDX Primary Chain 


This option loads a loadable line module with 1100 FDX microcode, then sends and 

receives the same data. 

Table 2–15. FDX Primary Chain Loopback Option Table 




66 Y Y Y Y 

67 Y Y N N 

6F Y N N N 


4X1 Sync Primary Chain 

7D Y Y N N 

7E Y Y Y Y 

7F Y N N N 

This option runs a multiline loadable line module loaded with synchronous microcode. 

Table 2–16. 4X1 Sync Primary Chain Loopback Option Table 



MLLM 54 Y Y N N 

55 Y Y N N 

7431 8080–202 2–15


4X1 Sync Secondary Chain 

This option runs a multiline loadable line module loaded with synchronous microcode. 

The line module must be connected externally with a line module running the Multiline 

Sync primary chain, or four MSLLMs running the sync primary chain. 

Table 2–17. 4X1 Sync Secondary Chain Loopback Option Table 



MLLM 54 N Y N N 

4X1 UDLC Primary Chain 

55 N Y N N 

This option runs a multiline loadable line module loaded with UDLC microcode. 

Table 2–18. 4X1 UDLC Primary Chain Loopback Option Table 




4X1 UDLC Secondary Chain 

55 Y Y N N 

This option runs a multiline loadable line module loaded with UDLC microcode. The line 

module must be connected externally with a line module running the multiline UDLC 

primary chain, or four MSLLMs running the UDLC primary chain. 

Table 2–19. 4X1 UDLC Secondary Chain Loopback Option Table 




55 Y Y N N 

2–16 7431 8080–202

4X1 Async Primary Chain 


This option runs a multiline loadable line module loaded with asynchronous microcode. 

Table 2–20. 4X1 Async Primary Chain Loopback Option Table 




8X1 Async Primary Chain 

This option runs on an ILM20-8B line module. 

55 Y Y N N 

Table 2–21. 8X1 Async Primary Chain Loopback Option Table 



ILM20-8B A8 Y Y N N 

4X/8X Async Secondary Chain 

This option runs a multiline loadable line module loaded with asynchronous microcode. 

The line module must be connected externally with a line module running the 4X1 

asynchronous primary chain, the 8X1 asynchronous primary chain, or MSLLMs running 

the async primary chain. 

Table 2–22. 4X/8X Async Secondary Chain Loopback Option Table 




ILM20-8B A8 N Y N N 

7431 8080–202 2–17


Ethernet LAN Primary Chain 

This option runs the 802.3 Ethernet line module in the primary mode. Internal loopback, 

local loopback or external loopback can be selected. If external loopback is requested, 

the line module must be connected externally to an Ethernet line module running the 

802.3 LAN secondary chain. Note that the line module maximum message length is 3960 

bytes or F78 (hex) bytes. 

Table 2–23. Ethernet LAN Primary Chain Loopback Option Table 



Ethernet 802.3 A0 Y Y Y Y 

For tests running on the ILM Ethernet, see "ILM Ethernet Chain." 

Ethernet LAN Secondary Chain 

This option runs the 802.3 Ethernet line module as a receiving line module which loops the 

data back to one or more Ethernet line modules running the 802.3 LAN primary chain 

connected to the same Ethernet LAN. 

Table 2–24. Ethernet LAN Secondary Chain Loopback Option Table 



Ethernet 802.3 A0 N Y N N 

4X1 Async and Video Text Chain 

This option selects the 4X1 asynchronous line module chain while accepting the hardware 

ID of the Video Text line module. It can be selected with the same options as the 4X1 

async. It does not support the two-way alternate mode of the Video Text LM. 

Table 2–25. 4X1 Async and Video Text Chain Loopback Option Table 



MLALM 44 Y Y N N 

Video Text LM 45 Y Y N N 

2–18 7431 8080–202

Multiple Device Line Module Partial Chain 


This option runs on a multiple device line module and an enhanced mass storage line 

module. The volume state table is checked for free blocks of media space. Then, the 

chain writes data to the free blocks of media space. Consequently, no data on the hard 

disk is destroyed by the test. The loopback parameter is always set to external. See 

Section 7, “Mass Storage Subsystem Testing,” for the procedure to test the mass storage 

subsystem. 

Table 2–26. Multiple Device Line Module Partial Chain Loopback Option 

Table 



MDLM 09 N Y N N 

Multiple Device Line Module Complete Chain 

This option runs on multiple device line modules (MDLMs) and an enhanced mass storage 

line module (with hardware ID 09). This chain writes data to the complete hard disk 

beginning with the first block. The data is read back and verified. The loopback 

parameter is always set for external loopback. See Section 7, “Mass Storage Subsystem 

Testing,” for the procedure to test the mass storage subsystem. 

Caution 

The data on the hard disk is destroyed. 

Table 2–27. Multiple Device Line Module Complete Chain Loopback Option 

Table 




7431 8080–202 2–19


Multiple Device Line Module Floppy Chain 

This option runs on the multiple device line module (MDLM) and an enhanced mass 

storage line module (with hardware ID 09). This chain writes data to a diskette in the 

diskette drive. The diskette must be formatted and write-enabled. The data is read back 

and verified. The loopback parameter is always set for external loopback. See Section 7, 

“Mass Storage Subsystem Testing,” for the procedure to test the mass storage subsystem. 

Caution 

The data on the floppy diskette is destroyed. 

Table 2–28. Multiple Device Line Module Floppy Chain Loopback Option 

Table 




SU57 Back-to-Back Chain 

This option is used with an SU00057 host word channel line module (F1946). The line 

module must be connected to the bulkhead and looped back with a loopback cable at the 

bulkhead. C card switch-pack settings must be set to the loopback setting (switches 1 and 

6 on). The loopback parameter is always set to external. 

Table 2–29. SU57 Back-to-Back Chain Loopback Option Table 



SU00057 12 N Y N N 

2–20 7431 8080–202

16-Bit Parallel Back-to-Back Chain 


This option is used with a 16-bit parallel line module. The line module must be connected 

to the bulkhead and looped back with a loopback cable at the bulk head (see Note). The 

switch settings on the C card must be set to the loopback setting (switches 1 and 6 on). 

The loopback parameter has no effect when this option is selected. 

Note: On DCP10/DCP15/DCP20 and DCP40 systems, a loopback card (part number 

2818884) can be plugged into the back plane (behind the B card) instead of 

using loopback cables at the bulkhead. 

Table 2–30. 16-Bit Parallel Back-to-Back Chain Loopback Option Table 


Inter-computer 

channel 

BDBI Winchester 


10 N Y N N 

This option is used with a BDBI (bi-directional byte interface) line module (F3878) 

connected to either an FDDS or Winchester disk. When running with a Winchester disk, 

the line module initially sends a mode clear command to the Winchester. This takes about 

15 seconds. No data is transferred until the mode clear has completed, and as a result, no 

cycles occur for approximately 15 seconds. When using an FDDS, both drives are used 

and the diskettes must be prepped with 256 bytes per sector. Since the BDBI line module 

has no internal loopback capability, the loopback parameter has no effect when this 

option is selected. 

TL3 supports internal loopback or writing and reading to a 5.25-inch Winchester. One 

block of incrementing data is written to address 0 of target 7, logical unit number (LUN) 0 

and read back and verified. 

Table 2–31. BDBI Winchester Chain Loopback Option Table 



BDBI 07 Y Y N N 

7431 8080–202 2–21


FEPI 

PLM FEPI 

TL3 only supports the FEPI line module (F3882) in the internal loopback mode. 

Table 2–32. FEPI Chain Loopback Option Table 



FEPI 19 Y N N N 

This option runs the FEPI chain on the programmable line module (PLM, F4325–01). This 

option will only support the PLM line module in the internal loopback mode. 

Table 2–33. PLM FEPI Chain Loopback Option Table 



PLM FEPI 29 Y N N N 

Twisted Pair Terminal Emulation Chain 

This option runs on a twisted pair line module using special microcode to emulate a 

twisted pair terminal. It is used to test Signal Distribution Modules (SDMs). The 

configuration is shown in Figure 2–6. 

Figure 2–6. Twisted Pair Configuration 

Table 2–34. Twisted Pair Terminal Emulation Chain Loopback Option Table 



TPLM 65 Y Y N N 

2–22 7431 8080–202

Host-Block Mux Chain 


This option runs a secondary PP chain. It runs with the 1100 Series diagnostic software 

called Universal Peripheral Test Sequencer (UPTS), using test SR1791. TL3 requires UPTS 

level 3R1 or higher. This software and the documentation reside on the Diagnostic 

Software for Peripherals (DSPER) tape. UPTS sends data to the DCP line module. TL3 

returns the data to UPTS, which verifies the data. 

Note: This option should be started before UPTS test SR1791 begins executing. While 

waiting for UPTS to begin transmitting, TL3 may return a "No Data XFERs in 

Last 2 Min." error. Ignore the message. 

Caution 

Do not exit test mode while UPTS is transmitting data. Otherwise, UPTS may 

generate false errors. 

Host-Word Channel Chain 

This option runs a primary PP chain. It runs with the 1100/2200 Series diagnostic software 

called Universal Peripheral Test Sequencer (UPTS), using test SRIOCT. TL3 requires 

UPTS level 3R1 or higher. This software and the documentation reside on the Diagnostic 

Software for Peripherals (DSPER) tape. The DCP sends a message to the host. The UPTS 

software checks the message and returns a response to the DCP. TL3 verifies the 

response. The parameters for the SRIOCT test are as follows: 

Parameter Description 

Program in DCP 4 (option PLMPM) 

Default Patterns N (no) 

Number of Cycles any value (large value recommended) 

Transfer word size 32 (32 bits) 

Number of patterns 4 (4 fixed patterns) 

Pattern 0 xFFFF (hex FFFF) 

Pattern 1 xAAAA (hex AAAA) 

Pattern 2 x5555 (hex 5555) 

Pattern 3 x0000 (hex 0000) 

Ripple Pattern N (no) 

Buffer Pattern S (short) 

Run Options B (both input and output) 

Notes: 

1. One cycle for SRIOCT corresponds to four cycles in TL3. 

7431 8080–202 2–23


2. This option should be started before UPTS test SRIOCT begins executing. While 

waiting for UPTS to begin transmitting, TL3 may return a “No Data XFERs in Last 

2 Min.” error. Ignore the message. 

ILM20 High Speed 

Caution 

Do not exit test mode while UPTS is transmitting data. Otherwise, UPTS may 

generate false errors. 

This option runs the ILM20 High Speed line module executing test microcode. This chain 

supports local, remote, and internal loopback. 

ILM-40 FDDI Chain 

Table 2–35. ILM20 High Speed Chain Loopback Option Table 



ILM20-HS A1 Y Y Y Y 

This option runs on the ILM40 Fiber Distributed Data Interface (FDDI) line module. The 

line module is loaded with the appropriate ILM platform software. The chain supports 

internal and external loopback. 

Table 2–36. ILM-40 FDDI Chain Loopback Option Table 



ILM40 FDDI A3 Y Y N N 

2–24 7431 8080–202

ILM-40 Ethernet Chain 


This option runs on the ILM40 Ethernet line module. The line module is loaded with the 

appropriate ILM platform software. The chain supports internal and external loopback. 

Table 2–37. ILM-40 Ethernet Chain Loopback Option Table 



ILM40 Ethernet A5 Y Y N N 

For tests running on the non-ILM Ethernet line module (Ethernet 802.3), see “Ethernet 

LAN Primary Chain.” 

7431 8080–202 2–25


ILM-40 TR Chain 

This option runs on the ILM40 Token Ring line module. The line module is loaded with the 

appropriate ILM platform software. The chain supports internal and external loopback. 

ILM-40 MS Chain 

Table 2–38. ILM-40 TR Chain Loopback Option Table 



ILM40-TR A2 Y Y N N 

This option runs on the ILM40 Medium Speed line module. The line module is loaded with 

the appropriate ILM platform software. The chain supports internal and external 

loopback. 

Table 2–39. ILM-40 MS Chain Loopback Option Table 



ILM40-MS A7 Y Y N N 

ILM-60 4X Ethernet Chain 

This option runs on the ILM60 4X Ethernet line module. The line module is loaded with 

the appropriate ILM platform software. The chain supports internal and external 

loopback. 

Table 2–40. ILM-60 4X Ethernet Chain Loopback Option Table 



ILM60-4E AF Y Y N N 

For tests running on the non-ILM Ethernet line module (Ethernet 802.3), see “Ethernet 

LAN Primary Chain” in this section. 

2–26 7431 8080–202

ILM-60 4X High Speed Chain 


This option runs the ILM60 High Speed (ILM60-HS) line module. The line module is 

loaded with the appropriate ILM platform software. This chain supports internal and 

external loopback. For this chain to run, a message length of less than 0200 hex must be 

set (refer to Section 5, “Specifying Test Conditions”). 

ILM-60 Coprocessor 

Table 2–41. ILM60 4X High Speed Chain Loopback Option Table 



ILM60-HS B0 Y Y N N 

Although TL3 does not support a specific chain for the ILM60 Coprocessor line module 

(COP60-LM), the ILM L-Bus Loopback and Basic Test chains, described in this section, run 

on the line module. The line module has a Hardware ID (HID) of B2 and requires no 

bulkheads, cables, or external connections. 

ILM L-Bus Loopback Chain 

This option runs on all ILM line modules. It does a loopback on the L-bus only, and does 

not drive data through the line module drivers and receivers. 

Basic Test Chain 

This option runs on all line modules and all Hardware IDs (HIDs). The line module must 

be able to raise chain requests for this chain to function properly. However, no data is 

transferred to the line module. 

Table 2–42. Basic Test Chain Loopback Option Table 



ANY ANY N N N N 

7431 8080–202 2–27


Auto Enable Ports 

This option directs TL3 to automatically enable and test ports. During auto configuration, 

the hardware ID of a line module is used to search a table of test chains. The appropriate 

microcode for the option selected by TL3 is loaded into the line module and the PP chain 

is started. The parameter line options (port, repeat count, throttle, and loopback) have 

the same functions as the Enable Ports option. TL3 can not automatically enable all line 

modules. A list of the line modules and their hardware IDs that can be automatically 

enabled by TL3 follows in Table 2–43. Figure 2–7 illustrates the Automatic Port 

Configuration menu. 

Table 2–43. Line Modules and Hardware IDs 

Hardware ID Line Modules 

19 FEPI 

40 Low Cost Async 

44 Multi-Line Async (4X1) 

45 Video Text 4X1 

50 Low Cost Sync 

54 Sync/Async RS-232 (4X1) 

55 Sync/Async RS-232 (4X1) Dual Bus 

60 Med SPD RS-449 (MSLLM) 

61 Med SPD X.21 Dual Bus 

64 DCSS 250K BPS CX 

65 Twisted Pair 

66 MSLLM V.35 

67 Med SPD RS-232 or Dual Bus 

6F Med SPD No Cable 

70 High SPD Loadable RS-449 

71 High SPD Loadable X.21 

7D High SPD Bell 303 

7E High SPD V.35 

7F High SPD No Cable 

A0 802.3 Ethernet LAN 

A1 4X1 HS T1/E1 (ILM20-HS) 

A2 Dual Bus Token Ring (ILM40-TR) 

Continued 

2–28 7431 8080–202

Table 2–43. Line Modules and Hardware IDs 

Hardware ID Line Modules 

A3 Dual Bus FDDI (ILM40-FD) 

A5 Dual Bus Ethernet (ILM40-EN) 

A7 Dual Bus Med Speed (ILM40-MS) 

A8 8X1 Async RS-232 (ILM20-8B) 

AF 4X Ethernet (ILM60-4E) 

B0 Dual Bus 4X High Speed (ILM60-HS) 

B2 Dual Bus ILM Coprocessor (COP60-LM) 


Notes: 

1. If a line module ID requires external hardware for testing, Auto Enable will not test 

those ports. 

2. If an attempt is made to automatically enable ports which do not contain line 

modules from the above list, errors will occur. 

3. Only line modules that are free will be enabled. Line modules assigned to other 

applications such as Telcon will not be enabled. 

Figure 2–7. Automatic Port Configuration Menu 

To run this option, follow these steps: 

1. Use option 1 to select the ports to auto enable. 

2. When all ports have been selected, return to the Auto Enable Ports menu. 

3. Use option 2 or press F3 to enable selected ports. 

7431 8080–202 2–29


Retrieve Port Configuration 

This option initializes the port table to the same configuration previously saved on mass 

storage. The internal/external loopback parameter, throttle value, and test chain option 

for each PP is restored and initialized. 

This option can be selected only if there are no ports active in TL3. Once a port is 

enabled, this option becomes invalid. 

The port configuration is retrieved from an omnibus element in a DCP/OS file. The default 

file and element is TL3$*CONFIG.CONFIG. You can specify a different file and element 

using the File Configuration option. 

Disable Ports 

The Disable Ports menu allows you to disable one or more ports (see Figure 2–8). The 

Port parameter specifies the port to be disabled, or in the case of a non-zero repeat 

parameter, the first port of the range of ports to be disabled. The Repeat parameter 

indicates the number of additional ports to be disabled. For example, if you want to 

disable ports 0E through 17, type 0E in the Port field, 09 in the Repeat field, and then press 

the XMIT key. (Note that Port and Repeat parameters are specified with hexadecimal 

numbers). Repeat this process until all ports to be disabled are selected, then press the F3 

key. Any ports assigned to other runs are not disabled. 

Figure 2–8. Disable Ports Menu 

2–30 7431 8080–202

Section 3 

Specifying Port Controls 

The main menu contains the following three options that allow you to specify port 

controls: enable/disable port monitor, select dual bus commands and save port 

configuration. These options are described below. 

Enable/Disable Port Monitor 

This option allows you to monitor up to six specific ports while TL3 is running in test 

mode. This option also allows you to disable the port monitor. When the port monitor is 

enabled, the port status is displayed on the status screen and is updated with each screen 

update. Figure 3–1 shows an Enable/Disable Port Monitor screen. 

Figure 3–1. Enable/Disable Port Monitor Screen 

Select Dual-Bus Commands 

This option allows you to direct dual-bus commands to a port. The port must not be 

owned by another run to issue these commands. A menu allows you to select which of the 

commands to send. 

7431 8080–202 3–1

Specifying Port Controls 

• Switch – the Switch command causes the dual-bus line module residing in the specific 

port to connect to the partition issuing the command. 

• Abort – the Abort command causes all LM activity to abort. The LM will be left 

executing in PROM. LM storage is preserved and a dump of the LM state is possible. 

• Hard Clear – the Hard Clear command causes LM hardware to reset. The LM will go 

to an unloaded state and execute POC. LM memory is not preserved and a DUMP of 

the LM state is not possible. 

Figure 3–2 shows the Select Dual-Bus Commands screen. 

Save Port Configuration 

Figure 3–2. Select Dual-Bus Commands Screen 

The Save Port Configuration option allows you to save the current TL3 port configuration. 

The port configuration is saved in an omnibus element in a file. The default file and 

element is TL3$*CONFIG.CONFIG. You can specify a different file and element using the 

File Configuration option. 

Caution 

Saving the port configuration will overwrite the contents of the port configuration 

file. Make sure the file specified does not contain needed elements. 

3–2 7431 8080–202

Section 4 

Display Status Information 

The main menu contains the following three options that allow you to display status 

information: display errors, view port status, and display test statistics. These options are 

discussed below. 

Display Errors 

This option displays errors on the console. Each error page contains up to 10 error 

messages. Prefacing each error message is the time the error occurred. The error 

message may be one or more lines that displays the following general information: 

• The failing port in hexadecimal or in the case of an SVC error, the port may not be 

displayed, but an SVC error code is given. Reference the DCP Series Operating 

System (DCP/OS) Operations Reference Manual (7831 5702) for the interpretation of 

the SVC error status code. 

• A short description of the error. 

• The expected and received status/data. For an interpretation of the status value, refer 

to Appendix B, “Error Messages and Fault Isolation.” 

An example error page is shown in Figure 4–1. 

Figure 4–1. Example Error Page 

7431 8080–202 4–1


Table 4–1 describes the error information given in the error message. 

Table 4–1. Console Errors 

Error Message Description 

First Line Time error occurred (elapsed time since start 

of test). 

Aditional Lines Failing port (hex), or in the case of an SVC error, 

the port may not be displayed, but an SVC error 

code is provided. 

Short description of error. 

Expected and received status/data (this area 

may be blank). 

Table 4–2 defines abbreviations used in error messages. 

Table 4–2. Abbreviations Used in 

Error Messages 

Abbreviation Meaning 

IN Input 

OUT Output 

XFER Transfer 

CNT Count 

STAT Status 

EI External Interrupt 

PROC Processor 

ID Identification 

PP Port Processor 

EXP Expected 

AC Actual 

4–2 7431 8080–202

View Port Status 


This option displays the status of all ports in the system. There may be many screens of 

port listings since only 16 can be displayed at one time. If a port number is entered, the 

next screen displays a port listing beginning with the selected port. Figure 4–2 shows the 

View Port Status screen. 

Figure 4–2. View Port Status Screen 

7431 8080–202 4–3


The following table describes each field on the View Port Status screen. 

Table 4–3. Fields on the View Port Status Screen 

Field Description 

Port Port number (hex). A 'P' in the port field indicates 

the LM has dual-bus access. 

HID Hardware ID. 

MID Microcode ID loaded into line module. 

PP-Owner PP-owner, identified by the run ID and run name 

which owns the port. If the port is owned by the 

opposite partition, the partition (Partition A or 

Partition B) which owns the port is displayed in this 

field. 

*Option Description of chain being executed on that port. 

*Thrtl Throttle value. 

*LPBK Loopback parameter: internal external, local or 

remote. 

*Errors Number of errors reported on port. 

*Cycles Number of cycles the port has executed. 

* These fields are only displayed if the port is enabled using TL3; otherwise, 

the fields are blank. If a port has been enabled by TL3 and then disabled, the 

option field displays "Port Disabled," and cycles and errors are displayed. 

4–4 7431 8080–202

Display Test Statistics 


This option displays the information about the system test. Figure 4–3 shows a Display 

Test Statistics screen that has been partially scrolled. 

Figure 4–3. Display Test Statistics Screen 

7431 8080–202 4–5


The following table describes each field of the screen. 

Table 4–4. Fields on the Display Test Statistics Screen 

Field Description 

Built The date and time the test was created. 

Test time Total time the test has run. 

Total cycles Total number of test cycles the test has run. 

Total bytes Total number of bytes transferred during the 

test. 

Average bytes/cycle Average number of bytes transferred for each 

cycle of the test. 

Cycles/sec Average number of cycles completed in one 

second of the test. 

Bytes/sec Average number of bytes transferred in one 

second of the test. 

Memory configuration Displays memory (by address) being used by 

the test. 

Control line Provides operator control of the display. Line 

denoted by the Ø (SOE) character. 

IOP Identifies IOPs in the system. 

IDLE (%) Percentage of time each IOP in system is idle. 

ZEROING (%) Percentage of time each IOP in system spends 

zeroing buffers. 

4–6 7431 8080–202

Section 5 

Specifying Test Conditions 

The main menu contains five options that allow you to specify test conditions: clear error 

log, set message length, enable/disable data checking, set multiple task control, and set 

file configuration. These options are described below. 

Clear Error Log 

This option allows you to clear the error log. The total error count for each port and the 

system error count are set to zero. 

Set Message Length 

This option allows you to set a specific message length, from 2 bytes to 16K bytes. If you 

enter a value of zero, the message lengths are random. Random length is the default. 

Some PP test options have maximum message lengths of less than 16K bytes. Also, for 

some PP options, header information is required in addition to message data. Because of 

these two factors, the actual number of bytes per cycle may vary from the message length 

specified. Figure 5–1 shows the Set Message Length screen. 

Note: When running long messages in a line-module to line-module test, time-out 

errors can occur if the data rate is less than 9600 bps. If the data rate is greater 

than 9600 bps, 16K byte messages are permissible in a line-module to linemodule 

test. 

Figure 5–1. Set Message Length Screen 

7431 8080–202 5–1


Enable/Disable Data Checking 

This option allows you to disable or enable data checking. When data checking is enabled, 

the test software checks the data returned against the data sent to see if they are the 

same. This option toggles the data checking on (enabled) and off (disabled). 

For PP options which interface with ILM platform software (ILM 8X1 Async, ILM FDDI, 

and ILM Ethernet), the data is not checked in secondary PP chains. 

Set Multiple Task Control 

In order to take advantage of multiple CPs, TL3 starts multiple tasks. The number of tasks 

started equals the number of CPs. This option allows the users to suspend and resume 

specific tasks. By suspending tasks, the overall impact TL3 has on system performance 

may be reduced. If all tasks are suspended, TL3 will not go into Test mode. 

In addition to suspending and resuming task execution, this option displays the number of 

cycles each task has processed. The Multiple Task Control screen (Figure 5–2) is shown 

below. 

Figure 5–2. Multiple Task Control Screen 

5–2 7431 8080–202

Configure Files 


The File Configuration option allows you to specify files containing line module 

microcode, ILM microcode, and the TL3 port configuration. Figure 5–3 shows the File 

Configuration screen. 

The microcode programs for standard line modules are held in omnibus elements in the 

line module (LM) load file. These elements are named LMC-xx where, xx = microcode ID. 

The default LM load file name is SYS$*SYSLMC. By specifying a different LM load file, 

you can load a line module with a different level of microcode. 

The microcode programs for intelligent line modules (ILMs) are held in omnibus elements 

in the ILM load file. The default ILM load file name is SYS$*ILMLOAD. Some of these 

elements are named as follows: 

ILMPLATA8 ILM 8X1 Async platform code 

SDLC-A7 ILM 4X1 medium speed SDLC platform code 

SDLC-A8 ILM 8X1 SDLC platform code 

FDDI-A3 ILM FDDI platform code 

ENET-A5 ILM Ethernet platform code 

TRNG-A2 ILM Token Ring platform code 

The port configuration for TL3 can be saved and retrieved. The port configuration is 

saved in an omnibus element in a file. The default file and element name for the TL3 port 

configuration is TL3$*CONFIG.CONFIG. Several different configurations can be saved on 

the DCP mass storage and retrieved for different test requirements. 

Figure 5–3. File Configuration Screen 

7431 8080–202 5–3


5–4 7431 8080–202

Section 6 

Miscellaneous Options 

Run Debugger 

Exit Test 

This option allows you to inspect and change memory and registers, and set and clear 

breakpoints from the operator console. 

To run the DCP/OS debugger, you must have used the D option on the run statement when 

you started your current run. For more information, refer to the DCP/OS Programmer's 

Reference Manual (7431 6894). 

To exit the utility, enter g and press the XMIT key at the prompt. 

This option allows you to exit the TL3 test software and return to the DCP/OS prompt. 

The option prompts you with a message to make sure you want to exit the TL3 test 

software. 

7431 8080–202 6–1

Miscellaneous Options 

6–2 7431 8080–202

Section 7 

Mass Storage Subsystem Testing 

The mass storage subsystem consists of a 3.5-inch diskette drive, a 3.5-inch hard disk, and 

a controller. The mass storage subsystem is tested by running the Multiple Device Line 

Module (MDLM) partial or complete test option and the MDLM diskette test option on the 

system. The PP chains write data to the hard drive or the diskette drive and then read the 

data back. The MDLM partial test option writes data to free blocks of media space, 

preserving the integrity of the hard drive. The MDLM complete test option writes on the 

complete surface of the hard disk, destroying the integrity of the data on the hard disk. 

The diskette drive test chain also destroys the data on the diskette. See the Cautions and 

Note on the next page. 

MDLM Port Assignments 

To test mass storage with TL3, the MDLM port must not be assigned to DCP/OS. If there 

are two MDLM ports in the system, you can assign one to DCP/OS, which leaves the other 

free for TL3 use. 

If there is one MDLM mass storage subsystem. DCP/OS and TL3 must be resident to test 

the mass storage subsystem. Once DCP/OS and TL3 are resident, all the devices on the 

MDLM port must be downed. 

Testing the MDLM Port 

Use the following procedure to test the MDLM port. 

Note: Start all other ports being tested before assigning the MDLM to TL3. Once the 

MDLM is assigned to TL3, DCP/OS can not load other line modules for testing. 

1. Boot the DCP using load path = 00. The DCP/OS loads and runs from local storage. 

2. Terminate all active runs. Example: 


3. Load and run TL3 from local storage by entering the following command and pressing 

XMIT. 

@TL3,! 

Reference the subsection “Loading TL3” in Section 1, “Introduction,” for information 

about the various TL3 load options. 

7431 8080–202 7–1

Mass Storage Subsystem Testing 

4. Start all ports to be tested, except the MDLM port. See Section 2, “Configuring Ports,” 

for information on configuring the ports. 

If you want to display the device names and status (up or down) of the device, enter 

the following command. 

@@CONS FS,ALL 

The information is displayed on the console screen. 

5. Down all the devices that are up on the MDLM port that are to be tested, by entering 

the following command and pressing XMIT. 

@@CONS DN 

Look for typical device names such as SW0, IF0, and SD0. Reference the subsection 

titled “Downing DCP/OS Devices” in Section 1, “Introduction,” for more information 

on downing devices. 

Caution 

The Multiple Device Line Module Complete Chain destroys all data on the hard 

disk. After using this chain, all DCP software will have to be loaded on to the disk. 

Caution 

Use a scratch diskette when using the Multiple Device Line Module Floppy Chain. 

That test destroys all previous data on the diskette. 

Note: The MDLM Partial Test Chain checks the volume state table on the hard 

drive for free blocks of media and writes on the free blocks, preserving the 

integrity of the hard disk data. 

6. Run the MDLM port test. The remaining procedures are the same as for all other line 

modules. Refer to subsection titled “Enable Ports Procedure” in Section 2, 

“Configuring Ports.” 

7. Restart desired runs that you previously terminated. CSSRVR must be restarted. 

Execute: 

@@CONS ST CSSRVR 

7–2 7431 8080–202

Appendix A 

Acronyms and Abbreviations 

This appendix defines line module acronyms and abbreviations used throughout the TL3 

software and this operations guide. 

16-bit 16-bit parallel line module 

ACK Acknowledge 

ADRD Automatic data rate detection 

Async LM Asynchronous line module 

BCC Block check character 

BDBI LM Bi-directional byte interface line module 

BIOC LM Byte I/O channel line module 

CENLOG Critical event notification and logging 

COP Coprocessor 

CP Communications processor 

CRC Cyclic redundancy check 

CTS Clear to send (RS-232 signal) 

DCSS Direct-connected single-station line module 

DLE Data link escape 

DSR Data set ready (RS-232 signal) 

DTR Data terminal ready (RS-232 signal) 

ENQ Enquiry 

EOM End of message signal 

EOT End of transmission 

7431 8080–202 A–1


ETX End of text 

FEPI LM Front-end processor interface line module 

FDX Full-duplex mode 

HID Hardware ID 

HSLLM High-speed loadable line module 

IDF Integrated flexible diskette 

ILM Intelligent line module 

LANLM Local area network line module 

LBI L-bus interface 

LM Line module 

LRC Longitudinal redundancy check 

LUN Logical unit number 

MCT Message control table 

MDLM Multiple device line module 

MLALM Multi-line asynchronous line module 

MLLM Multi-line line module 

MLSLM Multi-line synchronous line module 

MSLLM Medium-speed loadable line module 

NAK Not acknowledge 

NMS Network management services, a Telcon application 

PLM Programmable line module 

PP Port processor 

ROM Read-only memory 

RTS Request to send (RS-232 signal) 

RVI Reverse interrupt 

SDT Segment descriptor table 

A–2 7431 8080–202

STX Start of text 

Sync LM Synchronous line module 

SU00057 SU00057 host (word) channel line module 

TCP-IP Transmission control protocol/internet protocol 

TPLM Twisted pair line module 

TTD Temporary text delay 

UDLC Universal data link control 

Video Text LM Video text line module 

VRC Vertical redundancy check 

WACK Wait before transmit positive acknowledge 


XOFF A device control 3 (XOFF) code is used in host commands to control 

terminals. The code stops the terminal from transmitting data until a 

DC1 (XON) code is received. 

XON A device control 1 (XON) code is used in host commands to control 

terminals. The code turns on the terminal, enabling the terminals to 

transmit data. 

7431 8080–202 A–3


A–4 7431 8080–202

Appendix B 

Error Messages and Fault Isolation 

This appendix provides a list of error messages that may appear on the control station 

screen, as well as information that allows you to interpret values that appear in the 

console error messages. It also provides a method for line module fault isolation and 

correction. 

Theory of Operation 

There are two types of port chain tests: primary and secondary. Primary chain tests 

output data and then receive the same data. Secondary chain tests receive data and then 

retransmit the same data. When the data transfers are completed, the Message Control 

Tables are queued to the CP. The CP checks the status of the transfers, the transfer count, 

the port processor ID, and the data. If an error is found, the CP logs the error in the error 

log which can be displayed using TL3 software. 

A sample error message generated from the UDLC Primary Chain option might look like 

this: 

105:33:22.685 

Port 023 Input Status Error Expected 0000 Actual 0800 

The following table describes each field in the above error message. 

Table B–1. Sample Error Field Description 

Error Field Error Description 

105:33:22.685 Time Error Occurred (Elapsed Time since Start of Test) 

in the format HHH:MM:SS.TTT. 

Port 023 Failing Port (hex). 

Input Status Error Error Description. 

Expected 0000 

Actual 0800 

In the above example the elapsed time is 105 hours, 33 

minutes, 22 seconds, and 685 thousandths of a 

second. 

Expected and Actual Status (this field may be blank). 

7431 8080–202 B–1


Line Module Fault Isolation 

Use the fault isolation procedures outlined in Figures B–1 and B–2 if you experience 

problems installing a line module, or suspect you have a non-functioning line module. 

Figure B–1. Line Module Fault Isolation Procedures (Sheet 1 of 2) 

B–2 7431 8080–202


Figure B–2. Line Module Fault Isolation Procedures (Sheet 2 of 2) 

7431 8080–202 B–3


Error Messages 

This subsection lists Error Descriptions (such as “Input Status Error” shown in the 

previous example) that may appear in control station error messages. Descriptions are 

listed in alphabetical order by the first word in the message. Each listing includes a 

corrective action. 

Auto Configuration Not Supported HID=xx 

Auto configuration is not supported for the hardware ID (HID) of the specified port. 

Only hardware IDs which support internal loopback testing can be automatically 

configured. To test this port, use the Enable Ports option. 

Cannot Enable Port SVC Status = xxxx 

DCP/OS (Operating System) returned an error status when attempting to enable the 

specified port. To interpret the service vector call (SVC) status xxxx, consult System 

Error Codes in the DCP Series Distributed Communications Processor Operating 

System (DCP/OS) Operations Reference Manual (7831 5702). 

Cannot Load LM SVC Status = xxxx 

DCP/OS returned an error status when attempting to load line module microcode in 

the specified port. This error can be generated if the line is currently assigned to 

DCP/OS or Telcon; in this case you must down the line before you can successfully 

run TL3 on it. To interpret the service vector call (SVC) status xxxx, consult System 

Error Codes in the DCP Series Distributed Communications Processor Operating 

System (DCP/OS) Operations Reference Manual (7831 5702). 

Data Error 

The data received on input did not match the output data. This error usually indicates 

a line module or port problem. 

To check the line module hardware, retest the line module using an internal loopback 

test. 

• If the test is successful, the original error was probably caused by a faulty 

external element (for example, a modem) in the transmission path. To isolate the 

faulty element, progressively test each element in the path. 

• If the test failed, check the port. 

B–4 7431 8080–202


• To check the port, move the line module to a different port and repeat the internal 

loopback test. 

• If the repeat test is successful, there may be a problem with the original port. 

Perform TL2 tests on the original port to determine if IOP replacement is 

necessary. 

• If the repeat test fails, there may be a problem with the line module. Replacement 

should be considered. 

Disable Port Error SVC Status = xxxx 

DCP/OS returned an error status when attempting to disable the specified port. To 

interpret the service vector call (SVC) status xxxx, consult System Error Codes in the 

DCP Series Distributed Communications Processor Operating System (DCP/OS) 


Disabled - No Data XFERs in 30 Min. 

No input/output cycles have completed for the specified port in the previous 30 

minutes. TL3 logs an error every two minutes for ports that are not completing 

input/output cycles. To avoid logging redundant errors, TL3 disables ports that have 

not completed data input/output cycles in 30 minutes. For more information, refer to 

the “No Data XFERs in Last 2 Min.” error message. 

Line Module Not Supported HID = xx 

The specified hardware ID is not supported for the selected port chain. The line 

module cannot be tested with this level of TL3. Check to determine if a more current 

version is available. 

Illegal Option 

The selected port chain option was incompatible with the port line module hardware 

ID. Select a valid port chain option. 

Input External Interrupt 

An external interrupt (EI) was active on the input data lines and that the PP chain 

executed a Read EI command. Execution of Read EI forces an input operation in 

which two bytes of EI data are returned from the interface. This error applies only to 

the SU00057 and 16-bit Parallel options. 

7431 8080–202 B–5


Input Status Error Expect xxxx Actual xxxx [Other xxxx] 

The expected input status did not match the actual status. Other (if applicable) 

provides additional status information; for example, on a multiline line module Other 

might indicate the specific line where the error occurred. Refer to “Line Module Status 

Conditions” for information. 

Input Transfer Count Error 

The expected input transfer count did not match the actual transfer count. Usually 

this error will be associated with a status error; in this case, look at the status error 

and perform the corrective action. 

If this error is received by itself, there is likely a line module hardware or port 

problem. 


test. 





To check the port, move the line module to a different port and repeat the interval 




necessary. 



No Data XFERs in Last 2 Min. 

No input/output cycles have completed for the specified port in the previous two 

minutes. This error usually indicates either an initialization problem or a problem 

with the line module hardware. 

If the test running was an external loopback test, run the internal loopback test (if 

applicable). If the error reoccurs, try the test on a new port: 

• If the error reoccurs on the new port, replace the line module. 

• If the repeat test was successful on the new port, the problem may be with the 

IOP; run TL2 to further isolate the problem. 

B–6 7431 8080–202

Not Enabled After 15 State Items 


There are certain hardware and software exception conditions that will result in the 

port being disabled and a state item being posted. To avoid logging redundant errors, 

TL3 does not re-enable ports which have had 15 state items. For more information, 

refer to the “State Item” error message. 

Output External Interrupt 

An external interrupt (EI) was active on the output data lines and the PP chain 

executed a Read EI command. Execution of Read EI forces an input operation in 

which two bytes of EI data are returned from the interface. This error applies only to 

the SU00057 and 16-bit Parallel options. 

Output Status Error Expect xxxx Actual xxxx [Other xxxx] 

The expected output status did not match the actual status. Other (if applicable) 

provides additional status information; for example, on a multiline line module Other 

might indicate the specific line where the error occurred. Refer to “Line Module 

Status Conditions” in this section for information. 

Output Transfer Count Error 

The expected output transfer count did not match the actual transfer count. Usually 

this error will be associated with a status error; in this case, look at the status error 

and perform the corrective action. 

If this error is received by itself, there is likely a line module hardware or port 

problem. 


test. 





7431 8080–202 B–7


To check the port, move the line module to a different port and repeat the interval 




necessary. 



Port Processor ID Wrong 

The port processor ID returned in the message control table (Message Control Table) 

by the IOP is incorrect. This indicates an IOP problem. Perform TL2 to determine if 

IOP replacement is necessary. 

State Item PAO xxxx PAI xxxx Status xxxxxxxx Micro Addr xxxx 

A state item is 128 bytes of information, which is sent to a system queue when certain 

hardware and software exception conditions occur; this results in the port being 

disabled. Included in the state item is the program address of the output chain (PAO), 

the program address of the input chain (PAI), a four-byte status word, and the IOP 

micro address where the IOP detected the exception condition. 

When TL3 detects the state item, an error is logged and the port is reenabled. For 

more information, refer to the DCP Series Communications Processor Architecture 

Programmer's Reference Manual (7431 5805). 

Line Module Status Conditions 

The following error messages report line module status conditions: 

• Input Status Error Expect xxxx Actual xxxx [Other xxxx] 

• Output Status Error Expect xxxx Actual xxxx [Other xxxx] 

Status conditions are determined in the following manner. During the input or output of 

data, the line module accumulates status conditions. This status (2 bytes) is returned to 

the IOP upon termination of the data transfer and placed in the Message Control Table. 

The Message Control Table is queued to the CP where the status is checked. If the status 

is in error, the expected status and actual status are displayed. 

Interpretation of the status depends on the line module type and the port option. 

Following is a list of the port options and an interpretation of possible status conditions. 

B–8 7431 8080–202

UDLC Primary and Secondary Chains 

UDLC Output Status 


When Start Data Transmit (SDT) output instruction execution is initiated, status 

conditions are accumulated and, in some cases, may cause termination. The Read Status 

command, issued to the line module by the IOP on termination, causes two bytes of status 

to be returned to the IOP. The IOP adds the status bits for which it is responsible. The 

resulting status format, as stored in the Message Control Table, is as follows: 

�� 

�� 

�� 

�� 

�� 

� �� 

� �� 

�� 

Bit 20 Set if output response timer expires. This action causes unconditional 

termination. (If the response timer is loaded with zero, the timer is disabled and 

this bit is not set.) 

Bit 21 Set if output message timer expires. This action causes unconditional 

termination. (If the message timer is loaded with zero, the timer is disabled and 


Note: The response timer activates as soon as it is loaded with a non-zero 

value during Start Data Transmit execution. The switch from the 

response timer occurs when the first byte of the message is received 

from the IOP. The message timer stops when the message transmission 

(including CRC) has been completed. 

Bit 22 Set any time DSR turns off with DTR on. This action causes unconditional 

termination. This status bit remains set until a Clear Control instruction with the 

DTR bit set is issued or the line module is cleared. 

Bit 25 Set if underrun occurs. This action causes unconditional termination. It indicates 

the IOP is unable to keep up with the data rate required. If this occurs, the 

message is aborted, and no additional output data requests are presented to the 

IOP. 

Bit 31 The IOP sets this bit if a status bit is set and its corresponding chain flag is clear. 

This action occurs only after the LM status is passed to the IOP. The line module 

does not set this bit. 

7431 8080–202 B–9


UDLC Input Status 

When Start Data (input) instruction execution is initiated, status conditions are 

accumulated, and, in some cases, may cause termination (either unconditional or because 

a chain flag is set). The Read Status command, issued to the line module by the IOP on 

termination, causes two bytes of status to be returned to the IOP. The IOP adds the status 

bits for which it is responsible. The resulting status format, as stored in the Message 

Control Table, is as follows: 

�� 

�� 

�� 

�� 

�� 

�� 

� �� 

�� 

Bit 16 Set by the IOP when allocating input space and the zeroed buffer pool is empty. 

This action causes unconditional termination. The line module does not set this 

bit. 

Bit 17 Set by the IOP when the input limit is reached and input chain flag 17 is set. The 

line module does not set this bit. 

Bit 20 Set if input response timer expired. This action causes unconditional termination. 

(If the response timer is loaded with zero, the timer is disabled and this bit is not 

set.) 

Bit 21 Set if input message timer expires. This action causes unconditional termination. 

(If the message timer is loaded with zero, the timer is disabled and this bit is not 

set.) 


value during Start Data Transmit execution. The switch from 

response to message timer occurs when the first byte of the message is 

made available to the IOP. The message timer stops when the input is 

complete. 


termination. This status bit remains set until a Clear Control command with the 


Bit 23 Set if frame check error. This status can be generated only at the end of the 

message and, therefore, is not really a termination condition. 

Bit 24 Set if carrier went off during message. This is of interest only during message 

reception. 

B–10 7431 8080–202


Bit 25 Set if overrun. This message indicates the IOP is unable to keep up with the 

required input message data rate. 

Bit 27 Set if the input message is aborted. This action causes unconditional termination. 

Bit 28 Set if the input line is in the Idle state and termination occurs. It clears when the 

input line is not in the idle state. 


This action occurs only after the LM Status is passed to the IOP. 

DCSS Output Status 

When Start Data (output) instruction execution is initiated, status conditions are 

accumulated and, in some cases, may cause termination. The Read Status command, 

issued to the line module by the IOP on termination, causes two bytes of status to be 

returned to the IOP. The IOP adds the status bits for which it is responsible. The resulting 

status format, as stored in the Message Control Table, is as follows: 

�� 

�� 

�� 

�� 

�� 

� �� 

� �� 

�� 








value during Start Data Transmit execution. The switch from response 

to message timer occurs when the first byte of the message is 

transmitted. The message timer stops when the message transmission 

has been completed. 

Bit 23 Set if a transmitter overcurrent condition is detected. It indicates that a 

transmission was attempted at the same time that the DCSS was transmitting. 

This action causes unconditional termination. 

7431 8080–202 B–11



the IOP is unable to keep up with the data rate required. If this occurs, the 

message is aborted, and no additional output data requests are presented to the 

IOP. 

Bit 31 The IOP sets this bit if a status bit is set and corresponding chain flag is clear. 

This action occurs only after the LM status is passed to the IOP. 

DCSS Input Status 







�� 

�� 

�� 

�� 

�� 

� �� 

� � � � � � �� 

�� 



bit. 




(If the response timer is loaded with zero, the timer is disabled and this bit not 

set). 


(If the message timer is loaded with zero, the timer is disabled and this bit not 

set.) 



to message timer occurs when the first byte of the message is made 

available to the IOP. The message timer stops when the input is 

complete. 

Bit 23 Set if frame check error. This status can be generated only at the end of the 

message and, therefore, is not really a termination condition. 

B–12 7431 8080–202


Bit 25 Set if overrun. It indicates the IOP is unable to keep up with the required input 

message data rate. 

Bit 27 Set if the input message is aborted. This action causes unconditional termination. 

Bit 31 The IOP sets this bit if a Status bit is set and its corresponding chain flag is clear. 

This action occurs only after the LM Status is passed to the IOP. The line module 


Sync Primary and Secondary Chains 

Synchronous Output Status 


accumulated and, in some cases, may cause termination (either unconditional or because 





�� 

�� 

�� 

�� 

�� 

� �� 

� � � � � � � �� 

�� 









timer occurs when the first byte of the message is received from the 

IOP. The message timer stops when the message transmission 

(including BCC) has been completed. 

Bit 22 Set any time the DSR turns off with DTR on. This action causes unconditional 


DTR set bit is issued or the line module is cleared. 

Bit 27 Set if a Monitor 1 character, as defined in the character detect table, is detected in 

the output data stream. 

7431 8080–202 B–13





This action occurs only after the LM status is passed to the IOP. 

Synchronous Input Status 







�� 

�� 

�� 

�� 

�� 

�� 

� �� 

�� 



bit. 





set.) 



set.) 





complete. 


termination. This status bit remains set until a clear Control instruction with the 


Bit 23 Set if a VRC or LRC error is detected. 

B–14 7431 8080–202

Bit 24 Set if carrier went off during message reception. 


Bit 25 Set if overrun. It indicates the IOP was unable to keep up with the required input 


Bit 27 Set if a character defined in the character detect table as a Monitor 1 character is 

detected in the input message. 

Bit 28 Set if a character defined in the character detect table as a Monitor 2 character is 





Async Primary and Secondary Chains 

Asynchronous Output Status 

When Start Data Transmit (SDT) output instruction execution is initiated, status 

conditions are accumulated and, in some cases, may cause termination (either 

unconditional or because a chain flag is set). The Read Status command, issued to the line 

module by the IOP on termination, causes two bytes of status to be returned to the IOP. 

The IOP adds the status bits for which it is responsible. The resulting status format, as 

stored in the Message Control Table, is as follows: 

�� 

�� 

�� 

�� 

�� 

� �� 

� �� 

�� 









to message timer occurs when the first byte of the message is received 


(including BCC, if enabled) has been completed. 

7431 8080–202 B–15


Bit 22 Set any time. The DSR turns off with DTR on. This action causes unconditional 



Bit 24 Set if XOFF timer expires. 

Bit 26 Set if a break character (all zeroes with no stop bit) is detected or when a space to 

mark transition is detected following a break character. The break character is 

reported only once per long spacing signal. The two status conditions can be 

distinguished by bits 3 and 4 of the sense byte. 





Bit 31 The IOP will set this bit if a status bit is set and its corresponding chain flag is 

clear. This action occurs only after the LM status has been passed to the IOP. 

The line module will not set this bit. 

Asynchronous Input Status 


accumulated, and in some cases, may cause termination (either unconditional or because 





�� 

�� 

�� 

�� 

�� 

�� 

� �� 

�� 



bit. 



Bit 20 Set if input response timer expires. This action causes unconditional termination. 


set.) 

B–16 7431 8080–202




set.) 

Note: The response timer activates when it is loaded with a non-zero value 

during Start Data Transmit execution. The switch from response to 

message timer occurs when the first byte of the message is made 


complete. 


termination. This status bit remains set until a clear control instruction with the 


Bit 23 Set if a VRC/LRC, stop bit, or ADRD error is detected. The three status conditions 

can be distinguished by bits 5, 6, and 7 of the sense byte. 


Bit 25 Set if overrun. Indicates the IOP was unable to keep up with the required input 


Bit 26 Set if a break character (all zeros with no stop bit) is detected, or when a space to 



distinguished by bits 3 and 4 of the sense byte. 

Bit 27 Set if a character defined in the character detectable as a Monitor 1 character is 


Bit 28 Set if a character defined in the character detectable as a Monitor 2 character is 





7431 8080–202 B–17


ASCII and EBCDIC Bisync Primary and Secondary Chains 

BSC Output Status 


accumulated and, in some cases, may cause termination. The Read Status command, 



status format, as stored in the Message Control Table, follows: 

�� 

�� 

�� 

�� 

�� 

� � �� 

� � �� 

�� 











is completed. 


termination. This status bit remains set until a clear control command with the 



This action occurs only after the line module status is passed to the IOP. The line 

module does not set this bit. 

B–18 7431 8080–202

BSC Input Status 








�� 

�� 

�� 

�� 

�� 

�� 

� �� 

�� 


This action causes unconditional termination. The LM does not set this bit. 

Bit 17 Set by the IOP when the input limit is reached and chain flag 17 is set. The line 



(If the response timer is loaded with zero, the timer is disabled and never 

expires.) 


(If the input message timer is loaded with zero, the timer is disabled and this bit is 

not set.) 

Note: The response timer goes active as soon as it is loaded with a non-zero 




complete. 

Bit 22 Set any time DSR turns off with DTR on. This status bit remains set until a Clear 

Control command with the DTR bit set is issued or the line module is cleared. 

Bit 23 Set if a VRC, LRC, or CRC error is detected. 


Bit 25 Set if overrun. Indicates the IOP is unable to keep up with the required input 


7431 8080–202 B–19


Bit 27 Set if the input message is aborted. The abort sequence (EOT or DLE EOT) 

terminates the message. 

Bit 30 Set if the input is a supervisory sequence (ENQ, ACK 0, ACK 1, NAK, WACK, RVI, 

TTD, or input poll selection sequence). This does not cause termination. 




REM1 Primary and Secondary Chains 

REM1 Output Status 


accumulated, and, in some cases, may cause termination. The Read Status command, 



status format, as stored in the Message Control Table, is as follows: 

�� 

�� 

�� 

�� 

�� 

� � �� 

� � �� 

�� 


termination. (If the response timer is loaded with zero, the timer is not used.) 


termination. (If the message timer is loaded with zero, the timer is not used.) 









B–20 7431 8080–202





REMl Input Status 







�� 

�� · �� · �� · · �� · �� · �� · �� · 

�� ·�� · �� · · �� · �� · �� · �� · 

�� 

�� 

�� 

� �� 

�� 



bit. 




(If the response timer is loaded with zero, the timer is not used.) 


(If the message timer is loaded with zero, the timer is not used.) 





complete. 




Bit 23 Set if a VRC or LRC error is detected by the line module. 

Bit 24 Set if carrier goes off during message reception. 

7431 8080–202 B–21







1100 FDX Primary Chain 

1100 FDX Output Status 


accumulated and in some cases may cause termination. The Read Status command, 


returned to the IOP. The IOP adds in the status bits for which it is responsible. The 

resulting status format, as stored in the Message Control Table, is as follows: 

�� 

�� 

�� 

�� 

�� 

� � �� 

� � �� 

�� 


termination. (If the response timer is loaded with zero, the timer is not used.) 


termination. (If the message timer is loaded with zero, the timer is not used.) 









B–22 7431 8080–202



that the IOP is unable to keep up with the data rate required. If this occurs, an 

ETX is sent followed by bad LRC. No additional output data requests are 

presented to the IOP. 




1100 FDX Input Status 


accumulated and in some cases may cause termination (either unconditional or because a 

chain flag is set). 

The Read Status command, issued to the line module by the IOP on termination, causes 

two bytes of status to be returned to the IOP. The IOP adds the status bits for which it is 

responsible. The resulting status format, as stored in the Message Control Table, is as 

follows: 

�� 

�� 

�� 

�� 

�� 

�� 

� �� 

�� 



bit. 




(If the response timer is loaded with zero, the timer is not used.) 


(If the message timer is loaded with zero, the timer is not used. 





complete. 

7431 8080–202 B–23





Bit 23 A VRC or LRC error is detected by the LM. 




Bit 30 Set if the start character in the message is B9, indicating a sign-on message. If the 

start character is 01, this bit is left a zero. This is not a termination condition. 


clear. This action occurs only after the line module status is passed to the IOP. 

The line module does not set this bit. 

Multiline Sync Primary and Secondary Chains 

Multiline UNISCOPE Output Status 

When Start Data (output) instruction execution is initiated for a particular line, conditions 

that cause an output status bit to be set also terminate the burst transfer from the IOP. 

The Read Status command, issued to the line module by the IOP after the burst transfer is 

terminated, causes 2 bytes of status to be returned to the IOP. The IOP adds the status 

bits for which it is responsible. The resulting status format, is as follows: 

�� 

�� 

�� 

�� 

�� 

� �� 

� � �� 

�� 

Bit 20 Set if the burst transfer timer expires. This action causes unconditional 

termination. (If the burst transfer timer is loaded with zero, the timer is disabled 

and this bit is not set. 

Note: The burst transfer timer goes active as soon as it is loaded with a nonzero 

value during Start Data Transmit execution. The timer is stopped 

when the burst transfer of the output message to the line module is 

completed. 

B–24 7431 8080–202


Bit 22 Set if DSR OFF status was set at the time of the Start Data Transmit. The output 

message accompanying this Start Data Transmit is discarded. This status bit 

remains set until the line is disabled, a clear control instruction with the DTR bit 

set is executed for the affected line, or the line module is cleared. 

Bit 23 Set if an output Start Data Transmit execution is attempted before output line 

status for a previous output on this line was stored. The output message 

accompanying this Start Data Transmit is discarded. 

Bit 29 Set if an output Start Data Transmit execution is attempted while idle polling is 

active. The output message accompanying this Start Data Transmit is discarded. 

Bit 30 Set if the line selected for output is disabled. The output message accompanying 

this Start Data Transmit is discarded. 


clear. This action occurs only after the output status is passed to the IOP. The 


UNISCOPE Input Status 

The Read Status command, issued to the line module by the IOP after the burst transfer of 

a buffered message to the IOP, causes two bytes of status to be returned to the IOP. The 

IOP adds the status bits for which it is responsible. The resulting status format, as stored 

in the Message Control Table, is as follows: 

�� 

�� 

�� 

�� 

�� 

�� 

� �� 

�� 


This action causes unconditional termination of the burst transfer. Any portion of 

the input message remaining in the line module buffer when this condition occurs 

is lost. 

Bit 17 Set by the IOP when the input limit is reached and input branch flag 17 is set. This 

action causes unconditional termination of the burst transfer and loss of any 

portion of the input message remaining in the line module buffer. The input limit 

should be set to a value greater than the maximum expected input message size. 


7431 8080–202 B–25


Bit 18 Set if the input contains an STX character. It is reported only if the message is 

error-free. 

Bit 19 Set if the input contains a DLE character. It is reported only if the message is 

error-free. 

Bit 20 Set if the burst transfer timer or the input response timer expires. This action 

causes unconditional termination of the Start Data Transmit execution. (If either 

timer is loaded with zero, that timer is disabled and does not set this bit.) Note 

that no data will have been burst transferred if the status resulted from input 

response timer expiration. 

Note: The burst transfer timer activates as soon as it is loaded with a nonzero 

value during Start Data Transmit execution and is stopped when 

the burst transfer of the input message to the IOP is completed. The 

input response timer is loaded with the value set in the Input Control 

instruction and is started by output function flag O. 

Bit 21 Set if the input message timer expires. This action causes unconditional 

termination of the input. The input data is discarded. (If the message timer is 

loaded with zero, the timer is disabled and this bit is not set.) 


termination of operation on the line on which it occurred. This status bit remains 

set until the line is disabled, a Clear Control instruction with the DTR bit set is 

executed for the affected line, or the line module is cleared. The input data is 

discarded. 

Note: Both input and output DSR off status are set when the status condition 

occurs, and both are cleared by the Clear Control instruction, line 

module clear, or when the line is disabled. 

Bit 23 Set if a VRC or LRC error is detected. Message termination is determined by the 

setting of the termination flag. If this status condition causes termination, the 

input data is discarded. 

Bit 24 Set if carrier went off during message reception. Message termination is 

determined by the setting of the termination flag. If this status condition causes 

termination of the input, the input data is discarded. 

Bit 25 Set if the input buffer is overrun. This action causes unconditional termination. 

The input data is discarded. It indicates the input message exceeded the available 

buffer space on the line module or the line module was unable to keep up with 

the required input data rate, and data was lost. 

Bit 26 Set if the input message byte count reaches the limit value set with the Input 

Control instruction. This action causes unconditional termination. The input 

data is discarded. Note that the input limit is checked only when the line module 

links input buffers and not on each input byte. 

B–26 7431 8080–202


Bit 27 Set if the input message consists of an EOT EOT character sequence. It is 

reported only if the message is error-free. No data is passed to the IOP on this 

Start Data Transmit. 

Note: UNISCOPE protocol defines a no traffic response as either an EOT EOT 

or an EOT EOT ETX BCC. The line module will recognize the no traffic 

response by the EOT EOT pair and will not care if an ETX is included, 

nor check the validity of the BCC if ETX is included. 

Bit 28 Set if the line module generated the EOT status as a result of a Clear Control 

instruction with the Idle Polling bit set. 

Bit 29 Set if a slow polling event occurs during idle polling. 

Bit 30 Set if the line's input operation was disabled with the Clear Control instruction 

while input was enabled. Any received data is discarded. 


This action occurs only after the input status is passed to the IOP. The line 


Store Output Line Status 

In addition to the status returned by the LM to the IOP on an output Start Data Transmit 

instruction, two additional bytes of status are returned to the IOP by the LM via the Store 

Output Line Status command. Store Output Line Status is a special application of the 

output Start Data Transmit instruction. 

This application of the instruction is identified by setting function flag 10 as described 

below. When function flag 10 is set, no output data will be transferred regardless of the 

Start Data Transmit byte count. Execution of this instruction causes two bytes of output 

status to be returned to the IOP for the UNISCOPE line identified by the most recent 

execution of the Output Status Probe instruction. These two bytes of status are placed in 

the Message Control Table which is queued to the CP. The CP checks the status. The 

format of the status stored in the Message Control Table is as follows: 

�� 

�� 

�� 

�� 

�� 

� � �� 

� �� 

�� 

7431 8080–202 B–27


Bit 20 Set if the wait timer expires. This action causes resumption of PP program 

execution. 

Bit 21 Set if the output message timer expires. This action causes unconditional 



Note: The message timer activates as soon as the burst transfer from the IOP 

is completed. The timer stops when the synchronous transmission is 

completed. 



set until the line is disabled, a Clear Control instruction with the DTR bit set is 

executed for the affected line, or the line module is cleared. 

Note: Both this status bit and input DSR off status are set when the status 

condition occurs, and both are cleared by the Clear Control instruction, 

line module clear, or when the line is disabled. 

Bits 29–30 

These bits identify the UNISCOPE line to which the status stored by this 

instruction applies. 


clear. This action occurs only after the output line status has been passed to the 

IOP. The line module does not set this bit. 

Multiline UDLC Primary and Secondary Chains 

Multiline UDLC Output Status 

When Start Data (output) instruction execution is initiated for a particular line, conditions 

that cause an output status bit to be set also terminate the burst transfer from the IOP. 

The Read Status command, issued to the line module by the IOP after the burst transfer is 

terminated, causes two bytes of status to be returned to the IOP. The IOP adds the status 

bits for which it is responsible. The resulting status format, is as follows: 

�� 

�� 

�� 

�� 

�� 

� � �� 

� �� 

�� 

B–28 7431 8080–202



termination. (If the burst transfer timer is loaded with zero, the timer is disabled 

and this is not set.) 


value during Start Data Transmit execution. The timer is stopped 

when the burst transfer of the output data to the line module is 

completed. 

Bit 22 Set if "DSR turned off with DTR on" status was set when Output Start Data 

Transmit execution was initiated. The output data accompanying this Start Data 

Transmit is discarded. 

Bit 23 Set if an output Start Data Transmit execution is attempted before output line 

status for a previous output on this line was stored. The output data 


Bit 30 Set if the line selected for output is disabled. The output data accompanying this 

Start Data Transmit is discarded. 


clear. This action occurs only after the output status is passed to the IOP. The 


UDLC Input Status 


buffered data to the IOP, causes two bytes of status to be returned to the IOP. The IOP 

adds in the status bits for which it is responsible. The resulting status format, as stored in 

the Message Control Table, is as follows: 

�� 

�� 

�� 

�� 

�� 

�� 

�� 

�� 


This action causes unconditional termination of the burst transfer. Any portion of 

the input frame remaining in the line module buffer when this condition occurs is 

lost. 

Bit 17 Set by the IOP when the input limit is reached and input branch flag 17 is set. This 

action causes unconditional termination of the burst transfer and loss of any 

portion of the input frame remaining in the line module buffer. The input limit 

should be set to a value greater than the maximum expected input message size. 


7431 8080–202 B–29


Bit 20 Set if the burst transfer timer or the input response timer expires. This action 

causes unconditional termination of the Start Data Transmit execution. (If either 

timer is loaded with zero, that timer is disabled and does not set this bit.) Note 

that no data will have been burst transferred if the status resulted from input 

response timer expiration. 


value during Start Data Transmit execution and is stopped when 

the burst transfer of the input to the IOP is completed. The input 

response timer is loaded with the value set in the Input Control 

instruction and is started by output function flag 0. 

Bit 22 Set any tine DSR turns off with DTR on. Causes unconditional termination of 

operation on the line on which it occurred. This status bit remains set until the 

line is disabled, a Clear Control instruction with the DTR bit set is executed for 

the affected line, or the line module is cleared. The input data is discarded. 

Note: Both this status bit and transmission DSR off status are set when the 

status condition occurs, and both are cleared by the Clear Control 

instruction, line module clear, or when the line is disabled. 

Bit 23 Set if an FCS error is detected. This status can be generated only at the end of a 

frame and, therefore, is not really a termination condition. The input data is 

discarded. It is not reported if gateway is enabled. 


determined by the setting of the termination flag. If this status condition causes 

termination of the input, the input data is discarded and, if gateway is enabled, 

not reported. 

Bit 25 Set if the input buffer is overrun. This action causes unconditional termination. 

The input data is discarded. It indicates the input exceeded the available buffer 

space on the line module or the line module was unable to keep up with the 

required input data rate, and data was lost. It is not reported if gateway is 

enabled. 

Bit 26 Set if the input frame byte count reaches the limit value set with the Input Control 

instruction. This action causes unconditional termination. The input data is 

discarded. Note that the input limit is checked only when the line module links 

its internal input buffers and not on each input byte. It is not reported if gateway 

is enabled. 

Bit 27 Set if the input frame is aborted. This action causes unconditional termination. 

The input data is discarded. It is not reported if gateway is enabled. 

Bit 30 Set if the line's input operation was disabled with the Clear Control instruction 

while input data was enabled. Any received data is discarded. 

B–30 7431 8080–202





Store Output Line Status 








status to be returned to the IOP for the UNISCOPE line identified by the most recent 

execution of the Output Status Probe instruction. These two bytes of status are placed in 

the Message Control Table which is queued to the CP. The CP checks the status. The 

format of the status stored in the Message Control Table is as follows: 

�� 

�� 

�� 

�� 

�� 

� � �� 

� � �� 

�� 

Bit 20 Set if the wait timer expires. This action causes resumption of PP program 

execution. 



this bit not set.) 


is completed. The timer stops when the synchronous transmission is 

completed. 



set until the line is disabled. A Clear Control instruction with the DTR bit set is 

executed for the affected line, or the line module is cleared. 

Note: Both this status bit and input DSR off status are set when the status 

condition occurs, and both are cleared by the Clear Control instruction, 

line module clear, or when the line is disabled. 

Bit 25 Set if an underrun condition occurs. When this occurs, the frame is aborted. 

7431 8080–202 B–31


Bits 29–30 

These bits identify the UDLC line to which the status stored by this instruction 

apply. 


clear. This action occurs only after the output line status has been passed to the 

IOP. The line module does not set this bit. Note that the line identification (bits 

29 and 30) may cause this bit to be set. 

4X1 and 8X1 Async Primary and Secondary Chains 

4X1/8X1 Async Output Status 

When an Output Start Data instruction execution is initiated for a line, conditions that 

cause any of the output status bits to set also cause the output burst transfer to be 

terminated. The Read Status command, issued by the IOP to the line module after the 

burst transfer is terminated, causes two bytes of status information to be returned to the 

IOP. The IOP adds the status bits for which it is responsible. The format of the status 

bytes as stored is as follows: 

�� 

�� 

�� 

�� 

�� 

�� 

�� 

�� 


termination of the transfer. (If the burst transfer timer is zero, this bit will never 

be set.) This bit will be set if during the burst transfer operation, the line module 

cannot allocate any more of its internal buffer space for the message and the 

transfer to the line module is incomplete. Buffer space that has been allocated 

will be deallocated when the output operation terminates. 

Note: The burst transfer timer activates as soon as a non-zero value is loaded 

during the Start Data Transmit instruction. The burst transfer timer 

is stopped as soon as the transfer of the output message to the line 

module is completed. 

Bit 22 Set if "DSR turned off with DTR on" status was set at the time of the Start Data 

Transmit. The output message accompanying this Start Data Transmit is 

discarded. This status bit remains set until the line is disabled, a Clear Control 

instruction with the DTR bit set is executed for the affected line, or the line 

module is cleared. 

Bit 24 Set if expiration of the output suspend timer occurs. The output message 


B–32 7431 8080–202


Bit 25 Set if a Start Data Transmit is executed on a line before the output line status for a 

previous output Start Data Transmit is stored. The output message 

accompanying this output Start Data Transmit is discarded. 

Bit 26 Set if a break condition was detected on input (all zeroes with no stop bits). This 

action causes termination only if output chain flag bit 26 is set. This status is only 

reported once for each spacing signal. Any output attempted during the spacing 

signal or before the Sense byte (which has the break bit set) is cleared causes this 

status bit to be set and, if output chain flag bit 26 is set, the output operation is 

terminated. 

Bit 30 Set if the line selected for this output Start Data Transmit is disabled. The output 

message accompanying this Start Data Transmit is discarded. 

Bit 31 Set by the IOP if a status bit is set but the corresponding chain flag is clear. This 

action only takes place after the output status is transferred to the IOP. 

4X1/8X1 Async Input Status 

The Read Status command is issued to the line module by the IOP after the completion of 

the burst transfer of the message from the line module to the IOP. The resulting two bytes 

of data stored by the line module in the IOP form part of the input status, the IOP appends 

status bits for which it is responsible. The resulting format of the status stored by the IOP 

is as follows: 

�� 

�� 

�� 

�� 

�� 

�� 

� �� 

�� 

Bit 16 Set by the IOP when allocating input buffer space and the system 128 byte zeroed 

buffer pool is empty. The burst transfer is unconditionally terminated. Data that 

was contained in the message being burst transferred will be lost. Subsequent 

data received will be accumulated for later burst transfer to the IOP. The line 


Bit 17 Set by the IOP when the input limit condition is reached and the input branch flag 

bit 17 is set. This action causes unconditional termination of the burst transfer. 

The input limit size should be set to a value greater than the maximum expected 

input message. Data that was contained in the message being burst transferred 

will be lost. Subsequent data received will be accumulated for later burst transfer 

to the IOP. The line module does not set this bit. (This mechanism should not be 

used for breaking data into blocks. An input message byte count is provided in 

the Input Control parameters for breaking data into blocks.) 

7431 8080–202 B–33


Bit 19 If bit 19 is set on a 4X1, it means an Incomplete Buffer. If bit 19 is set on an 8X1, it 

means Data Underrun. 

On a 4X1, this bit (Incomplete Buffer) is set to indicate that the current buffer is 

not complete. The line module does not have any more available storage to store 

the input data; therefore the current buffer is being transferred in an attempt to 

free internal line module buffer area. This bit can only be set when "Enable 

Incomplete Buffer Transfers" has been set in input control. 

On an 8X1, this bit (Data Underrun) is set if the selected channel does not have 

input ready to send across the L-bus. 


termination of the Start Data Transmit instruction. This bit will never be set if the 

timer was loaded with zero (infinite timer - clock stopped). 

Note: The burst transfer timer activates during Start Data Transmit 

execution when it is loaded with a non-zero value. The clock is stopped 

when the burst transfer of the input message to the IOP is complete. 

Bit 21 Set if the message timer expires. If "Discard Time-out Input Message" is set in the 

line configuration, then accumulated input data in the line module is discarded; 

otherwise it is transferred to the IOP. If the message timer is set to zero, the 

timer is not activated and this bit is never set. 


termination of the operation on the line where it occurred and any associated 

data accumulated by the line module is lost. The status bit remains until either 

the line is disabled, a Clear Control instruction is executed with the DTR bit set, 

or a line module clear is received. 

Note: Both the output and the input DSR OFF status bits are set when the 

status condition occurs. Both are cleared by either a Clear Control 

instruction, when the individual line is disabled, or by a line module 

clear. 

Bit 23 This bit is set by the line module when it detects a character parity error, an 

ADRD error, a stop bit error, or a message parity error. A read Sense instruction 

should be executed to establish the actual error condition. The respective chain 

bits in the line configuration determine whether a particular type of error will 

cause the input to terminate and discard the accumulated data or not. 

Bit 24 Set when the line module detects a Carrier Off condition. The chain on carrier off 

bit in the line configuration determines whether or not the input should terminate 

and discard the accumulated data. This condition will only be reported and 

processed if Constant RTS is set in the Control Bytes. 

B–34 7431 8080–202


Bit 25 Set if an input overrun condition occurs. This action causes unconditional 

termination of the input operation. Bit 16 of the line configuration determines 

whether or not the data accumulated prior to the overrun is discarded. This 

indicates that either the line module or IOP cannot keep up with input data rate 

or the line module buffer space was exceeded. This bit will also be set if the line 

module's internal echo buffer becomes full, indicating that the line module cannot 

echo data as fast as it is received. 

If this occurs, the input data which cannot be echoed will not be included in the 

input buffer and no further input data will be accepted until the echo buffer has 

emptied. 

Bit 26 Set if the line module detects a Break condition. This condition will not be 

reported until the Break condition has completed. When the Break condition is 

first detected and the Ignore Break bit is not set in the Control Bytes, the line 

module will start an eight-bit counter which will be incremented at 10-millisecond 

intervals and terminated when the Break condition ends. This timer byte can be 

stored by the IOP program. The Break timer value will remain unchanged until 

the next Break condition is detected. When the Break condition is detected, the 

timer is set to 1 and possibly incremented to FF depending on the length of the 

Break condition. If the timer is incremented through FF, the reported value will 

be FF. If the line module receives a Break character, a timer value of 00 will be 

reported. 

Note: Although the Sense byte does not provide any further information when 

this bit is set, a Read Sense instruction must be executed to clear the 

Break condition. 

Bit 29 Set if a character with Bit 7 of the Character Detect Table set (EOM character) 

was received in the data associated with this Input Start Data Transmit. 

Bit 30 Set if the line selected for this input Start Data Transmit is disabled. Any received 

data is discarded. 

Bit 31 This bit is set if a status bit is set and the corresponding chain flag bit is clear. 

This operation is done by the IOP only when the status bytes have been 

transferred from the line module to the IOP. 

4X1/8X1 Async Store Output Line Status 








status to be returned to the IOP for the line identified by the most recent execution of the 

Output Status Probe instruction. These two bytes of status are placed in the Message 

Control Table which is queued to the CP. The CP checks the status. 

7431 8080–202 B–35


The format of the status stored in the Message Control Table is as follows: 

�� 

�� 

�� 

�� 

�� 

�� 

�� 

�� 

Bit 20 If Bit 20 is set on a 4X1, it means the wait timer expired. On a 4X1, this bit (wait 

timer) is set when the wait timer expires. This action causes unconditional 

termination. This bit is not used on an 8X1. 


termination. If a zero value is loaded, the timer is disabled and this bit will not be 

set. 

Note: The message timer starts as soon as the burst transfer from the IOP is 

complete and stops when the data transmission to the line has finished. 

Bit 22 Set any time that DSR goes off when DTR is active. This action causes 

unconditional termination of the operation on the line on which it occurred. This 

status bit remains set until the line is disabled, a clear Control Byte Instruction 

with the DTR bit set is executed, or a line module clear is received. 

Note: Both this status bit and the input DSR OFF status bits are set when this 

condition occurs, and are both cleared by either a clear Control Byte 

with the DTR bit set, disabling the line, or a line module clear. 

Bit 24 The line module sets this bit if expiration of the suspend output timer occurs. 

Whether a time-out of the suspend output timer terminates the output message 

depends on the output chain flag bit 24 of the output Start Data Transmit. 

Bit 26 Set when a break condition was detected on input (all zeroes with no stop bits). If 

chain flag 26 in the output Start Data Transmit was set, the output message will 

be terminated. This status is only reported once for each spacing signal. Any 

output attempted during the spacing signal or before the Sense byte is cleared 

causes this status bit to be set and, if the chain flag is set, the output operation to 

be terminated. 

Bit 29–30 

These bits are only used to identify the line which stored the Output Line Status. 

Bit 31 The IOP will set this bit if a status bit is set and the corresponding chain flag is 

clear. This action takes place after the status has been transferred to the IOP. It 

is not set by the line module. 

B–36 7431 8080–202

4X1 Async and Video Text Chain 

Multiline Output Status 


When start data (output) instruction execution is initiated for a particular line, conditions 

that cause a status bit to be set also terminate the burst transfer from the IOP. The Read 

Status command, issued to the line module by the IOP after the burst transfer is 

terminated, causes two bytes of status to be returned to the IOP. The IOP adds the status 

bit for which it is responsible. The resulting status format is as follows: 

�� 

�� 

�� 

�� 

�� 

� �� 

� �� 

�� 

Bit 20 Set if output response time expires. This action causes unconditional termination. 


set.) 

Note: The response timer activates as it is loaded with a non-zero value 

during Start Data Transmit execution. The timer is stopped when the 

burst transfer of the output storage block to the line module is 

completed. 

Bit 25 Set if the output message contains more than 255 bytes or if an output Start Data 

Transmit is issued to an asynchronous line that has not completed transmission 

of the previous output buffer. In the latter case, the transmission already in 

process is continued and the new Start Data Transmit is ignored. 


clear. This action occurs only after the output status has been passed to the IOP. 


7431 8080–202 B–37


Multiline Transmission Status 

During asynchronous data transmission, status conditions are accumulated and, in some 

cases, may cause message termination (either unconditional or because a chain flag is 

set). These status conditions are accumulated for each of the four asynchronous lines. 

Upon completion of data transmission (at asynchronous line speed), the final transmission 

status must be stored by software with the store line status instruction. The two 

transmission status bytes are formatted as follows: 

�� 

�� 

�� 

�� 

�� 

� �� 

� �� 

�� 





is completed. The timer stops when the asynchronous transmission is 

completed. 



set until a clear control instruction with the DTR bit set is executed for the 

affected line or the line module is cleared. 

Note: Both transmission and input DSR off status are set when the status 

condition occurs, and both are cleared by the clear control instruction 

or line module clear. 

Bit 24 Set if XOFF timer expires. 

Bit 26 Set if a break character (all zeroes with no stop bit) is detected. Causes 

unconditional termination. The break status is reported only once per long 

spacing signal. Any output attempted during the spacing signal, or before the 

sense byte is cleared, causes this status bit to be set and transmission is 

terminated. 

Note: By programming convention, if full-duplex programs are used to 

control the PP, the sense byte should not be read by the output program. 

B–38 7431 8080–202

Asynchronous Input Status 



a buffered message to the IOP, causes two bytes of status to be returned to the IOP. The 

IOP adds in the status bits for which it is responsible. The resulting status format, as 


�� 

�� 

�� 

�� 

�� 

�� 

� �� 

�� 


This action causes unconditional termination of the burst transfer. Any data 

remaining in the line module input block when this condition occurs is lost and 

input continues with the next input block. 

Bit 17 Set by the IOP when the input limit is reached. This action causes unconditional 

termination of the burst transfer and loss of any data remaining in the line module 

input block. 

Bit 20 Set if line module response timer expires. This action causes unconditional 

termination of the Start Data Transmit execution. (If the response timer is loaded 

with zero, the timer is disabled and this bit is not set.) 

Bit 21 Set if input message timer expires. This action causes termination and burst 

transfer to the IOP (at next Start Data Transmit) of the input block being 

buffered. Input continues with the next input block. (If the message timer is 

loaded with zero, the timer is disabled and this bit is not set.) 


value during Start Data Transmit execution. The response timer is 

stopped when the burst transfer of the input block to the IOP is started. 

Each of the four message timers goes active when it is loaded with a 

non-zero value and data reception starts, and is reloaded when the next 

message block begins. The message timers are stopped when the input 

is terminated. 



set until a Clear Control instruction with the DTR bit set is executed for the 

affected line or the line module is cleared. 

Both input and transmission DSR off status are set when the status condition 

occurs, and both are cleared by the Clear Control instruction or line module clear. 

7431 8080–202 B–39


Bit 23 Set if a VRC, stop bit, or ADRD error is detected. The three status conditions can 

be distinguished by bits 5, 6, and, 7 of the sense byte. Message termination is 

determined by the setting of the termination flag. 


determined by the setting of the termination flag. 

Bit 25 Set if the input buffer is overrun. Indicates the input block(s) exceeded the 

available buffer space on the line module and data was lost. 

Bit 26 Set if a break character (all zeros with no stop bit) is detected, or when a space to 



distinguished by bits 3 and 4 of the sense byte. This status bit is also set if break 

occurs when neither input nor output is in progress. 

Note: By programming convention, if full-duplex programs are used to 

control the PP, the Sense byte should be read only by the input program. 

Bit 30 Set if the input block was terminated because the maximum number of characters 

allowed was reached before an EOM was detected or the message timer expired. 




Multiple Device Line Module (MDLM) Status 

This subsection provides MDLM status information for the following MDLM chains: 

• Multiple Device Line Module partial chain 

• Multiple Device Line Module complete chain 

• Multiple Device Line Module floppy chain 

MDLM Output Status 

When an output Start Data instruction is initiated, status conditions may occur which 

cause termination. The Read Status command, sent to the line module by the IOP upon 

termination, causes two bytes of status to be returned to the IOP. 

B–40 7431 8080–202


The resulting status is stored in the Message Control Table as follows: 

�� 

�� 

�� 

�� 

�� 

�� 

�� 

�� 

Bit 20 Response Timer: Set if the output response timer expires. This action causes 

unconditional termination. 

Bit 21 Message Timer: Set if the output message timer expires. This action causes 


Bit 22 Adapter Error: Set if an error is detected by the line module during an output 

operation. This action causes unconditional termination. 

Bit 23 Wrong Path: Set if the current physical path is established to a device other than 

the requested device. This action causes unconditional termination. 

Bit 24 Break Path: Set if a Disconnect message is received by the line module. This 

action causes unconditional termination. 

Bit 25 Buffer Active: Set if a Command Complete message was received during the 

output data transfer and the line module still has data in its output buffer. This 

action causes unconditional termination. 

Bit 26 Check Sense: Set if Sense Data is available. This action causes unconditional 

termination. (Sense data is obtained by executing an input Start Data Transmit 

instruction with the Request Sense function flag set.) 

Bit 27 Device Busy: Set if the Device is busy or reserved. This action causes 


Bit 28 Restore Pointers: Set if a Restore Pointers message is received by the line 

module. This action causes unconditional termination. 

Bit 30 Read Status: Set if the Command Completion Status, received from the device, 

contains status bits other than Check Sense and Busy. This action causes 


Bit 31 Status Branch: The IOP sets this bit if a status bit is set and its corresponding 

chain flag is clear. This occurs only after the status has been passed to the IOP. 

The LM does not set this bit. 

7431 8080–202 B–41


MDLM Input Status for Data Transfers 

When the input Start Data Transmit is initiated, status conditions may occur which cause 

termination. The Read Status command, sent to the line module by the IOP upon 

termination, causes two bytes of status to be returned to the IOP. The IOP adds in the 

status bits for which it is responsible. The resulting status follows: 

�� 

�� 

�� 

�� 

�� 

� �� 

� �� 

�� 

Bit 16 No Buffer: Set by the IOP when allocating input space and the zeroed buffer pool 

is empty. This action causes unconditional termination. The line module does 

not set this bit. 

Bit 17 Input Limit: Set by the IOP when the input limit is reached and input chain flag 17 

is set. The line module does not set this bit. 

Bit 20 Response Timer: Set if the input response timer expires. This action causes 


Bit 21 Message Timer: Set if the input message timer expires. This action causes 


Bit 22 Adapter Error: Set if an error is detected by the line module during an input 

operation. This action causes unconditional termination. 

Bit 23 Wrong Path: Set if the current physical path is established to a device other than 

the requested device. This action causes unconditional termination. 

Bit 24 Break Path: Set if a disconnect message is received by the line module. The 

amount of valid data that has been transferred can be obtained by executing a 

Read Transfer Count instruction. This action causes unconditional termination. 

Bit 26 Check Sense: Set if Sense data is available. This action causes unconditional 

termination. 

Bit 27 Device Busy: Set if the Device is busy or reserved. This action causes 


Bit 28 Restore Pointers: Set if a Restore Pointers message is received by the line 

module. This action causes unconditional termination. The amount of valid data 

that has been transferred can be obtained by executing a Read Transfer Count 

instruction. 

B–42 7431 8080–202


Bit 30 Read Status: Set if the Command Completion Status, received from the device, 

contains status bits other than Check Sense and Busy. This action causes 



chain flag is clear. This occurs only after the LM status has been passed to the 

IOP. The LM does not set this bit. 

Host Channel Status 

This subsection provides status information for the following host channel chains. 

• Host Word Channel chain 

• SU57 Back-to-Back chain 

• 16-Bit Parallel Back-to-Back chain 

�� 

�� 

�� 

�� 

�� 

� �� 

� �� 

�� 

Bit 16 Set by IOP when allocating input space and the zeroed buffer pool is empty. The 

line module does not set this bit. If this bit is set, it may indicate a memory 

resource problem in the DCP and not a hardware problem. 

Bit 17 Set by the IOP when the input limit is reached. The line module does not set this 

bit. 

Bit 20 Set if input response timer expires. It indicates that data was not received before 

time-out occurred. 

Bit 22 Set if an input transfer has incorrect channel parity. (Parity checking must be 

enabled by a strap on the line module. 

Bit 23 Set when an external interrupt is active on the input data lines. See Read EI 

instruction. 




7431 8080–202 B–43


�� 

�� 

�� 

�� 

�� 

� �� 

� �� 

�� 





value during Start Data Transmit execution. The response timer stops 

when the output status is read. 

Bit 23 Set when an external interrupt is active on the input data lines. See Read EI 

instruction. 




BDBI Winchester 

BDBI Output Status 


accumulated and, in some cases, may cause termination (either unconditional or because 





�� 

�� 

�� 

�� 

�� 

� �� 

� �� 

�� 

Bit 20 Set if the output response timer expires. This action causes unconditional 


will never expire.) 

B–44 7431 8080–202




will not expire.) 

Note: The response timer activates as soon as the timer bytes are received and 

preparations are completed to output the first byte of the message. The 

message timer stops when the output is completed. 

Bit 22 Set if a parity error is detected on any external status byte received during or 

following an output operation. This action causes unconditional termination. 

Bit 23 Status Condition: This bit will be set to 1 whenever an external interrupt is 

received that has any bits set which match the byte loaded by the status mask 

instruction. That is, the status mask byte is logically ANDed with each received 

external interrupt and the result is tested for zero. If the result is non-zero, the 

status condition status bit is set. This bit is reset by execution of a Read Status 

command. If a parity error is detected on reading an external interrupt (bit 22 is 

set), the status condition test will not be performed. If the status mask is all 

zeroes (default value), this bit will be set whenever an external interrupt is 

received and no checking will be performed. 

Bit 25 Buffer Active: This bit will be set to 1 if the output data transfer is terminated by 

the peripheral device or the LM before the line module output buffer is empty. 

Bits 27–30 

These status bits will be set to 1 if the corresponding peripheral. Attention line is 

active and no device is currently enabled. Therefore, an attention signal will not 

interrupt an in-progress data transfer. If a device has been enabled via a load 

parameter instruction, these status bits will not be set until line module status is 

read, and, therefore, they will not cause chaining. 




BDBI Input Status 





bits for which it is responsible. The resulting status format follows: 

�� 

�� 

�� 

�� 

�� 

� � �� 

� � � � � � � � � �� 

�� 

7431 8080–202 B–45


Bit 16 Set by IOP when allocating input space and the zeroed buffer pool is empty. This 

action causes unconditional termination. The line module does not set this bit. 



Bit 20 Set if the input response timer expires. This action causes unconditional 

termination. If the response timer is loaded with zero, the timer is disabled and 

will never expire. 

Bit 21 Set if the input message timer expires. This action causes unconditional 

termination. If the message timer is loaded with zero, the timer is disabled and 

will not expire. 

Note: The response timer activates as soon as the timer bytes are received 

from the IOP. The switch from response timer to message timer occurs 

when preparations are completed for the IOP to receive the first byte of 

the message. The message timer stops when the input is completed. 

Bit 22 Set if a parity error is detected on either data or status during the input operation. 


Bit 23 Status Condition: This bit will be set to 1 whenever an external interrupt is 

received that has any bits set which match the byte loaded by the load status 

mask instruction. That is, the status mask byte is logically ANDed with each 

received external interrupt and the result is tested for zero. If the result is nonzero, 

the status condition status bit is set. This bit is reset by execution of a Read 

Status command. If a parity error is detected on reading an external interrupt, 

the status condition test will not be performed. If the status mask is all zeroes 

(default value), this bit will be set whenever an external interrupt is received and 

no checking will be performed. 

Bits 27–30 

Attn 4-1: These status bits are set to 1 if the corresponding peripheral Attention 

line is active and no device is currently enabled. Therefore, an attention signal 

will not interrupt an in-progress data transfer. If a device has been enabled via a 

load parameter instruction, these status bits are not set until the line module 

status is read; therefore, they will not cause chaining. 




B–46 7431 8080–202

FEPI and PLM FEPI 

FEPI Output Status 


When Start Data (output) instruction execution is initiated, the line module status bytes 

are cleared and then status conditions are accumulated to indicate the cause of abnormal 

termination. The Read Status command, issued to the line module by the IOP on 




�� 

�� 

�� 

�� 

�� 

� �� 

� �� 

�� 






when the output is completed. 

Bit 23 Set by the line module if the output is terminated by System Reset from the host. 


Bit 24 Set by the line module if the output is terminated by selective reset from the host. 


Bit 26 Set by the line module if a data parity error on the SU00486 channel is detected 

and reported by the host resident master line module. This action causes 


Bit 27 Set by the line module if no Read or Pre-read command from the host was active 

when the output Start Data Transmit was executed. This action causes 


Bit 28 Set by the line module when an output data transfer is terminated either by the 

IOP or the host and the master or the slave line module is left holding data it is 

unable to transfer to the host. 

Bit 30 Set by the line module if the output is terminated by a Stop sequence from the 

host. This action causes unconditional termination. 

7431 8080–202 B–47





FEPI Input Status 

When Start Data (Input) instruction execution is initiated, the line module status bytes are 

cleared and then status conditions are accumulated to indicate the cause of abnormal 

termination. The Read Status command, issued to the line module by the IOP on 

termination, causes two bytes of status to be returned to the IOP. 

The IOP adds the status bits for which it is responsible. The resulting status format, as 


�� 

�� 

�� 

�� 

�� 

� �� 

� �� 

�� 



bit. 


line module does not set this bit. This action causes unconditional termination. 



set.) 



when the input is completed. 

Bit 23 Set by the line module if the input is terminated by a System Reset from the host. 


Bit 24 Set by the line module if the input is terminated by selective reset from the host. 


Bit 26 Set by the line module if a data parity error is detected during data transfer from 

the host. This action causes unconditional termination. 

Bit 27 Set by the line module if no Write or Pre-write command from the host was active 

when the input Start Data Transmit was executed. This action causes 


B–48 7431 8080–202


Bit 28 Set by the line module when an input data transfer is terminated either by the IOP 

or the host and the master or the slave line module is left holding data it is unable 

to transfer to the IOP. 

Bit 30 Set by the line module if the input is terminated by a Stop sequence from the host. 





Ethernet Primary and Secondary Chains 

LANLM Output Status 

When the output Start Data Transmit instruction execution is performed, status conditions 

are accumulated and in some cases may cause termination of the L-bus transfer. The 

Read Status command (04) is sent to the line module by the IOP following data transfer 

termination and causes two bytes of status to be returned to the IOP. The IOP adds the 

status bits for which it is responsible. The resulting PP status format is: 

�� 

�� 

�� 

�� 

�� 

� �� 

�� 

�� 

Bit 19 Set if the LM encounters an LBI chip underrun. This action causes unconditional 

termination. The message is discarded in the LM. This condition probably 

indicates a hardware or software problem in the LM. 

Note: If the message is discarded in the line module, the transfer count 

reported by the PP is meaningless. It does not necessarily represent the 

number of bytes received by the LM software. 

Bit 20 Set if Output response timer expires. This action causes unconditional 

termination. (If the response timer is zero, the timer is disabled and this bit is not 

set.) The output response timer will expire if the line module does not receive the 

complete message within the specified time limit. Any portion of the output data 

in the LM is discarded. The output Start Data Transmit may be reissued. 

7431 8080–202 B–49


Bit 24 Set if the line module rejects the message because of bad format. This action 

causes unconditional termination. For the ROM, this indicates a problem in the 

load data, and the load should be restarted. For the operational code, this 

indicates that the Start Data Transmit Output Transfer Count control information 

field was not at least 6 or was greater than hex 3FFF. The message is discarded 

in the LM. 

Bit 25 Only used by the loadable LM software. Set if the LM detected L-bus data is still 

available after the number of characters specified in Transfer Count was 

received. This action causes unconditional termination. The message is 

discarded in the LM. 

Bit 26 Only used by the loadable LM software. It is set if the transfer was terminated by 

the IOP before the number of characters specified in Transfer Count was 

received. This action causes unconditional termination. The message is 

discarded in the LM. 

Bit 30 Only used by the loadable LM software. It is set if the LM does not accept the 

message because of insufficient buffer space. If Chain Bit 30 is set, the transfer is 

immediately terminated. If Chain Bit 30 is not set, the LM attempts to acquire 

buffers until the response timer expires. If the LM is successful in acquiring 

buffers, this condition is not set; otherwise, both bits 30 and 20 are set. Any 

portion of the message received by the LM prior to termination for lack of buffers 

is discarded. 




LANLM Input SDT Status 

These status bits indicate the condition of the message transfer at termination of the Start 

Data Transmit. The Read Status command (04) is sent to the line module by the IOP 

following data transfer termination and causes two bytes of status to be returned to the 

IOP. The IOP adds the status bits for which it is responsible. The resulting PP status 

format is: 

�� 

�� 

�� 

�� 

�� 

� �� 

�� 

�� 



bit. 

B–50 7431 8080–202




Bit 18 Set by the LM when the data transfer over the L-bus is terminated before the 

entire message is sent. 

Note: When set by the ROM code, this bit indicates that the IOP terminated the 

transfer before the complete block was sent. The portion of the dump 

block not received by the IOP is lost. 

Bit 19 Set by the LM when an LBI chip overrun occurs. This action causes unconditional 

termination. Bit 18 is also set. The message is requeued. This condition probably 

indicates a hardware or software problem in the LM. 

Note: When set by the ROM code, this bit indicates "End of Dump." 

Bit 20 Only used by the loadable LM software. It is set if the input response timer 

expired. This action causes unconditional termination. (If the response timer is 

loaded with zero, the timer is disabled and this bit is not set.) It indicates that no 

input was ready for transfer to the IOP within the time limit specified. 

Bit 22 Only used by the loadable LM software. It is set if the input message is actually a 

previous output message which could not be successfully sent (a negative Send 

Data Confirm). This bit is set only if an output error is detectable by the LM and 

cannot be recovered. Bit 24 is also set. 

Bit 23 Only used by the loadable LM software. It is set if the input message is an Attach 

Confirm or a Detach Confirm (either positive or negative) or a Detach Indication. 

Bit 24 Only used by the loadable LM software. It is set if the input message is a negative 

confirm. Bit 22 or 23 may also be set. 

Bit 25 Only used by the loadable LM software. It is set if the input message is a positive 

Confirm. Bit 23 may also be set. 

Bit 26 Only used by the loadable LM software. It is set if the input message is an 

Indication of any type (Connection or Event) other than for data. Data 

Indications have no input Start Data Transmit status bits set. All indications are 

unsolicited. 




7431 8080–202 B–51


ILM-20 High Speed 

HSILM20 Output Status 

When an Output Start Data Transmit sequence is initiated for a line, conditions that cause 

any of the output status bits to set also cause the output burst transfer to be terminated 

and the output message accompanying this output Start Data Transmit is discarded. The 

Read Status command issued by the IOP to the line module after the burst transfer causes 

two bytes of status information to be returned to the IOP. The format of the status bytes 

stored is as follows: 

�� 

�� 

�� 

�� 

�� 

� �� 

� �� 

�� 

Bits 19–23 

Set to a hex value if an abnormal condition occurs other than listed below. (Refer 

to the Loadable LM Micro-code list for definitions of each value. Also, the line 

module error log can be inspected via the debug utility, Probe, or Dump Error Log 

instruction.) 


termination of the transfer. (If the burst transfer timer is zero, this bit is never 

set.) The burst timer activates when a non-zero value is loaded during the Start 

Data Transmit instruction. The burst transfer timer is stopped as soon as the 

transfer of the output message to the line module is completed. A non-zero error 

code indicates burst transfer timer terminated and the Output message was 

discarded. 

Bit 25 Set if an error occurred on the output side of a line prior to a Start Data Transmit 

or if more than two Start Data Transmits are executed on a line before the output 

line status for a previous output Start Data Transmit is stored. Note that Store 

Output Line Status is not required if LBI loopback is performed by this Start Data 

Transmit. This bit is not set in this case. 

Bit 28 Set if 'Setup XPC' command has not been previously issued for this line. The 

output message was discarded. 

Bit 29 Set if the LBI chip receives an Underrun condition. The output message was 

discarded. 



B–52 7431 8080–202

HSILM20 Input Status 


The Read Status command is issued to the line module by the IOP after the completion of 

the burst transfer of the message from the line module to the IOP. The resulting two bytes 

of data stored by the line module in the IOP form the input status. The format of the status 

stored by the line module is as follows: 

�� 

�� 

�� 

�� 

�� 

� �� 

� �� 

�� 

Bit 16 Set by the IOP when allocating input buffer space and the system 128 byte zeroed 

buffer pool is empty. The burst transfer is unconditionally terminated. Data that 

was contained in the message being burst transferred is lost. Subsequent data 

received is accumulated for later burst transfer to the IOP. The line module does 


Bit 17 Set by the IOP when the input limit condition is reached and the input branch flag 

bit 17 is set. Causes unconditional termination of the burst transfer and the loss 

of any data remaining in the input block. The input limit size should be set to a 

value greater than the maximum expected input message. Subsequent data 

received is accumulated for later burst transfer to the IOP. The line module does 


Bit 18 Set when a message is available to be burst transferred to the IOP, and the burst 

transfer didn't complete by the time the XPC received another message. This bit 

is also set when an abnormal condition occurred that caused the XPC to receive 

another message before the line module could exit the XPC receive interrupt 

routine. 

Bits 19–23 

Set to a hex value if an abnormal condition occurs other than listed below. (Refer 

to the Loadable LM Micro-code list for definitions of each value. Also, the line 

module error log can be inspected via the debug utility, Probe, or via the Dump 

Error Log instruction to gain more information.) 

7431 8080–202 B–53



termination of the Start Data Transmit instruction. This bit is not set if the timer 

was loaded with zero (infinite timer -- clock stopped). 

Note: The burst transfer timer activates during Start Data Transmit 

execution when it is loaded with a non-zero value. The clock is stopped 

when the burst transfer of the input message to the IOP is complete. 

Bit 25 Set if the input timer expires. If the input timer is set to zero via the time input 

instruction, the timer is not activated and this bit is not set. 

Bit 27 Set if Carrier detect is lost or the XPC aborts the receive sequence. 

Bit 28 Set if the XPC received an abnormal condition during reception of an input 

message. (Further information can be obtained via the Read XPC Status 

instruction.) 

Bit 29 Set when the LBI chip receives an overrun condition. 

Bit 30 Set when the input message has a CRC error. 

Bit 31 Set if a status bit is set and the corresponding chain flag bit is clear. This 

operation is done by the IOP only when the status bytes are transferred from the 

line module to the IOP. 

HSILM20 Store Output Line Status 






below. When function flag 9 is set, no output data is transferred regardless of the Start 

Data Transmit byte count. Execution of this instruction causes two bytes of output status 

to be returned to the IOP for the line identified by the most recent execution of the Output 

Status Probe instruction. These two bytes of status are placed in the Message Control 

Table, which is queued to the CP. The CP checks the status. The format of the status 

stored in the Message Control Table is as follows: 

�� 

�� 

�� 

�� 

�� 

� �� 

� � �� 

�� 

B–54 7431 8080–202

ILM Status 



termination. If a zero value is loaded, the timer is disabled and this bit is not set. 

Note: The message timer (specified in the output Start Data Transmit that 

transferred the output data to the line module) starts when the burst 

transfer from the IOP has completed and stops when the data 

transmission to the line has finished. 

Bit 26 Set any time the DSR goes off when DTR is active. 

Bit 27 Set if output completion status is not yet available for the currently selected line. 

Bit 28 Set if the XPC received an abnormal condition during transmission. (Further 

information can be obtained via the Read XPC Status instruction.) 

Bit 29 Set when the XPC lost Clear to Send. 

Bit 30 Set when the XPC received an underrun condition. 



This subsection provides ILM status information for the following ILM Chains: 

• ILM 8X1 Async 

• ILM 8X1 SDLC 

• ILM FDDI Primary 

• ILM Ethernet Primary 

• ILM Medium Speed Async 

• ILM Token Ring Primary 

• ILM Coprocessor 

• ILM Block Mux 

• ILM High Speed SDLC 

7431 8080–202 B–55


Output Data Transfer Status 

Output Fast Data Transfer (Start Data Transmit) error conditions are reported by the ILM 

in response to the Read Status command (04) issued by the IOP on Fast Data Transfer 

termination. The ILM returns two bytes of status to the IOP. The IOP adds in the status 

bits for which it is responsible. The format of the resulting status stored in the Message 

Control Table is shown below. All ILM status conditions except Threshold Crossed are 

considered abnormal and cause unconditional termination of the Fast Data Transfer 

operation. The Threshold Crossed status bit informs the PP that the ILM has begun 

throttling on the output attachment associated with this message, but the message was 

transferred successfully and accepted by the ILM. 

�� 

� �� 

� �� 

�� 

�� 

� �� 

� �� 

�� 

Bit 19 LBI Underrun: Set if the ILM encounters an LBI chip underrun. The message in 

the ILM is discarded. This condition probably indicates a hardware or software 

problem in the ILM. 

Bit 20 Response Time-out: Set if the Output response timer or internal ILM timer expires 

and the ILM is not waiting for a buffer. The message in the ILM is discarded. 

Bit 23 Sequence Error: The ILM detected an error in the expected order of commands 

received from the PP. The message in the ILM is discarded. 

Bit 27 Message Reject: Set if the ILM rejects the message because of an invalid Attach 

ID, queuing error, or attachment in termination. The message in the ILM is discarded. 

Bit 28 Message Length: Set if the ILM rejects the message because the byte count exceeds 

the IA's designated Message Header size. The message in the ILM is discarded. 

Bit 29 No ILM Buffers: Set if the ILM is not able to obtain an output buffer within the 

2-second interval. The message in the ILM is discarded. 

Bit 30 Threshold Crossed: Set if the item count on the ILM's output queue for the 

associated attachment has crossed its High Water Mark threshold. 


chain flag is clear. This action occurs only after the LM status is passed to the 

IOP. The ILM does not set this bit. Since all undesignated chain bits are set to 

capture an erroneous status condition, this bit should never be set. 

B–56 7431 8080–202

Input Data Transfer Status 


Input Fast Data Transfer (Start Data Transmit) error conditions are reported by the ILM in 

response to the Read Status command (04) issued by the IOP on Fast Data Transfer 

termination. The ILM returns two bytes of status to the IOP. The IOP adds in the status 

bits for which it is responsible. The format of the resulting status stored in the Message 

Control Table is shown below. All ILM status conditions cause unconditional termination 

of the Fast Data Transfer operation. When an error occurs, the message is returned, 

resent, or discarded by the ILM as directed by the normal acknowledgment protocol. The 

PP accepts or rejects input messages or asks that they be resent using the Read Input 

Attach ID, Bad Input Attach ID, Resound, or Hold commands. The data transfer status has 

no bearing on the acknowledgment process other than helping the PP make its decision. 

�� 

� �� 

� �� 

�� 

�� 

�� 

�� 

�� 

Bit 16 No Buffer: Set by the IOP when allocating input Message Control Table space and 

the zeroed buffer pool is empty. This action causes unconditional termination. 

The ILM does not set this bit. 

Bit 17 Input Limit: Set by the IOP when the input limit is reached (last BCW byte count 

goes to zero) and input chain flag 17 is set. The ILM does not set this bit. This 

condition can occur if a full 16K buffer is input, but the chain bit is zero so the 

condition is ignored and the status bit should never be set. 

Bit 19 LBI Overrun: Set by the ILM when an LBI chip overrun occurs. This condition 

probably indicates a hardware or software problem in the ILM. 

Bit 20 Response Time-out: Set if the input response timer or internal ILM timer expired 

prior to the message being completely transferred to the PP. 

Bit 23 Sequence Error: The ILM detected an error in the expected order of commands 

received from the PP. The integrity of this message is questionable. 

Bit 24 Message Incomplete: Set by the ILM when the data transfer over the L-bus is 

terminated before the entire message is sent. Normally associated with No 

Buffer. If this is the highest priority status bit recognized, the ILM message has 

probably been corrupted and the message is greater than 16K. 

Bit 29 No Message: No input message was selected for this data transfer. The previous 

message, if any, was rejected or held and a Read Input Attach ID command did 

not precede this data transfer request. No data was transferred. 

7431 8080–202 B–57


Bit 30 Unacknowledged Message: The previous input message was not acknowledged 

and was resent on this operation. This second data transfer request followed 

without an intervening message acknowledge, resend, or reject. Unless otherwise 

indicated, this message is correct. The previous unacknowledged message may 

have been passed to the CP User. 

Bit 31 Status Branch: The IOP sets this bit if a Status bit is set and its corresponding 

chain flag is clear. This action occurs only after the LM Status is passed to the 

IOP. The line module does not set this bit. Since all undesignated chain bits are 

set to capture an erroneous status condition, this bit should never be set. 

Host-Block Mux Chain 

Block Mux Output Status 


accumulated to indicate the cause of abnormal termination. The read status command, 

issued to the line module by the CLC on termination, returns two bytes of status to the 

CLC. The CLC adds the status bits for which it is responsible. The resulting status format, 

as stored in the Message Control Table, is as follows: 

�� 

�� 

�� 

�� 

�� 

� �� 

� �� 

�� 




Note: The response timer activates when it is loaded with a non-zero value 

during Start Data Transmit execution. The response timer stops when 

the output is completed. 

Bit 22 Set by the line module if the line module is off-line to the host when output SDI 

execution is attempted. This bit is always set when the line module is off-line, 

even during loopback operations. However, in the latter case, the off-line 

condition does not terminate the data transfer. 

Bit 23 Set by the line module if the output is terminated by a System Reset from the host. 

Bit 24 Set by the line module if the output is terminated by a Selective Reset from the 

host. 

Bit 25 Set by the line module if the output is terminated by an interface disconnect or a 

terminate command from the host. 

B–58 7431 8080–202


Bit 27 Set by the line module if no Read command from the host was active when the 

output Start Data Transmit was executed. This bit can be set even though the 

channel state indicated a Read command was active if the line module received a 

Terminate command or ISS with Interface Disconnect before the Start Data 

Transmit was executed. 

Bit 28 Set by the line module when an output data transfer is terminated either by the 

CLC or the host and the line module is holding data it is unable to transfer to the 

host. 

Bit 29 Set by the line module if function flag bit 13 (loopback) is set and the line module 

is on line, or if function flag bit 13 is not set and the line module is off-line. In the 

latter case, the Off-line bit (bit 22) is also set. 

Bit 30 Set by the line module if the output is terminated by a Stop sequence from the 

host. 

Bit 31 The CLC sets this bit if a status bit is set and its corresponding chain flag is clear. 

This action occurs only after the LM status is passed to the CLC. The line module 


Block Mux Input Status 


accumulated to indicate the cause of abnormal termination. The Read Status command, 

issued to the line module by the CLC on termination, returns two bytes of status to the 

CLC. 

The CLC adds the status bits for which it is responsible. The resulting status format, as 

stored in the Message Control Table is as follows: 

�� 

�� 

�� 

�� 

�� 

� �� 

� �� 

�� 

Bit 16 Set by the CLC when allocating input space and the zeroed buffer pool is empty. 


bit. 

Bit 17 Set by the CLC when the input limit is reached and the input chain flag 17 is set. 




set.) 

7431 8080–202 B–59


Bit 22 Set by the line module if the line module is off-line to the host when output SDI 

execution is attempted. This bit is always set when the line module is off-line, 

even during loopback operations. However, in the latter case, the off-line 

condition does not terminate the data transfer. 

Bit 23 Set by the line module if the output is terminated by a System Reset from the host. 

Bit 24 Set by the line module if the output is terminated by a Selective Reset from the 

host. 

Bit 25 Set by the line module if the output is terminated by an interface disconnect or a 

terminate command from the host. 

Bit 26 Set by the line module if a data parity error is detected during data transfer from 

the host. This action causes a conditional termination. 

Bit 27 Set by the line module if no Write command from the host was active when the 

input Start Data Transmit was executed. This bit can be set even though the 

channel state indicated a Write command was active if the line module received a 

Terminate command or ISS with Interface Disconnect before the Start Data 

Transmit was executed. 

Bit 28 Set by the line module when an input data transfer is terminated either by the CLC 

or the host and the line module is holding data it is unable to transfer to the CLC. 

Bit 29 Set by the line module if function flag bit 13 (loopback) is set and the line module 

is on line, or if function flag bit 13 is not set and the line module is off-line. In the 

latter case, the Off-line bit (bit 22) is also set. 

Bit 30 Set by the line module if the input is terminated by a Stop sequence from the host. 

Bit 31 The CLC sets this bit if a status bit is set and its corresponding chain flag is clear. 

This action occurs only after the LM status is passed to the CLC. The line module 


B–60 7431 8080–202

Appendix C 

Line Module Identifiers 

Table C–1 lists DCP Series line module types, their corresponding hardware IDs, and 

microcode IDs. 

Note: There are additional customer- and product-specific microcode IDs that do not 

appear in this list. 

HID (Hex) Line Module 

Short Name 

Table C–1. Line Module Identifiers 

Line Module Full Name and 

Feature Number 

01 IFDC-0 Int Flx Disk Controller (256K Bytes), 

F1939 

02 BIOC Byte I/O Controller, F1949 02 

04 SU39-P Host Block Mux 

(SU00039 Primary Port), F1947 

05 SU39-S Host Block Mux 

(SU00039 Diag Secondary Port), 

F1947 

07 BDBI Byte Interface, F3878 07 

09 MDLM SCSI (MDLM), F3893-00 09 

10 PERIPH 16-BIT Parallel Channel (PU100) 10 

11 SU57 Host Word Channel (SU00057 32-BIT), 

F1946 

12 ICC Intercomputer Channel (ICU 16-bit) 12 

14 SU208P Host Block Mux 

(SU00208 Primary Port), F1947-04 

15 SU208S Host Block Mux 

(SU00208 Diag Secondary Port), F1947- 

04 

19 FEPI FEPI, F3882-XX 19 

24 SU208P Selector Channel (SU208 Primary) 48 

25 SU208S Selector Channel (SU208 Secondary) 

MCID 

38 DIALER Auto Dial, F1945-00, F1945-01 38 

7431 8080–202 C–1 

01 

58 

11 

48



Short Name 

Table C–1. Line Module Identifiers (cont.) 



40 ASYNC1 Low Cost Async, F1941-00 

- TTY 

MCID 

§40 

(see 

LMID 50 

and 

notes) 

44 ASYNC4 Multiline Async (4X1), F3165-00 59 

45 ASYNC4 Videotex F3165–01 59 

50 SYNC1 Low Cost Sync, F1942-00 

- UNISCOPE 

54 SY/AS4 4X1 Sync/Async RS-232 

(64K Bytes), F3827-00 

- Asynchronous 

- UNISCOPE 

- UDLC 

55 SY/AS4 4X1 Sync/Async RS-232 or Dual-Bus 

RS-232 4X1, F3837-XX 


- UNISCOPE 

- UDLC 

60 MS449 Medium Speed RS-449 (MSLLM), 

F3163-04 

- Basic Asynchronous 

- Basic Synchronous 

- UDLC 

- 1100 FDX 

- REM1 

- EBCDIC BSC 

- ASCII BSC 

61 MSX21 Medium Speed X.21 or Dual-Bus X.21 

MS, F3163-XX 

- UDLC (switched) 

- UDLC (leased line) 

§50 

(see 

LMID 40 

and 

Notes) 

62 MSX20 Medium Speed X.20 or Dual-Bus X.20 

MS, F3163-09 

- Basic Asynchronous 21 

§ Both of these line modules return a hardware ID of 50 following either power-on or master-clear. 

After they are loaded with operating parameters, they return an ID of 50 if the parameters are 

synchronous and an ID of 40 if the parameters are asynchronous. 

C–2 7431 8080–202 

4D 

4E 

4F 

4D 

4E 

4F 

20 

24 

28 

30 

38 

40 

42 

29 

55


Short Name 





MCID 

63 MS232A Medium Speed RS-232 or Dual-Bus 

RS-232 MS, F3163-08 

- Basic Asynchronous 20 

64 DCSS DCSS 250K BPS CX, F3847 70 

65 TWPAIR Twisted Pair, F4230 27 

66 MSV35 Medium Speed V.35, DB3153–10 

-Basic Sync 

-Twisted Pair 

-UDLC 

-EBCDIC BSC 

-ASCII BSC 

67 MS232M Medium Speed RS-232 or Dual-Bus RS-232 

MS, F3163-XX 

-Basic Asynchronous 

-Basic Synchronous 

-UDLC 

-1100 FDX 

-REM1 

-EBCDIC BSC 

-ASCII BSC 

6B MSTWX MSLLM (TWX), F3163-XX 

-Kintetsu BSC EBCDIC 

-Kintetsu BSC 7-bit ASCII 

-NUL BSC 8-bit ASCII 

6F MNOCBL Medium Speed RS-232 or Dual-Bus RS-232 MS, 

F3163-XX (Cable not connected) – 

70 HS449 High Speed LOADBL (HSLLM), F3164-03 


- UDLC 

- 1100 FDX 

- REM1 

EBCDIC BSC 

- ASCII BSC 

71 HSX21 High Speed LOADBL (X.21), F3164-02 

- UDLC 

7D HS303 High Speed (Bell 303), F3164-00 


- UDLC 

- 1100 FDX 

- REM1 

- EBCDIC BSC 

- ASCII BSC 

7431 8080–202 C–3 

24 

27 

28 

40 

42 

20 

24 

28 

30 

38 

40 

42 

35 

36 

47 

26 

2A 

32 

39 

44 

45 

56 

2B 

26 

2A 

32 

39 

44 

45


Notes: 


Short Name 




7E HSV35 High Speed V.35, F3164-01 


- UDLC 

- 1100 FDX 

- REM1 

- EBCDIC BSC 

- ASCII BSC 

7F HNOCBL High Speed, F3164-XX (Cable not 

connected) 

A0 802.3 802.3 Ethernet LAN, F5137 80 

A1 I20-HS 4X1 HS T1/E1, ILM20-HS A1 

A2 I40-TR Dual-Bus Token Ring, ILM40-TR A2 

A3 I40-FD Dual-Bus FDDI, ILM40-FD A3 

A4 SU212 Host Block Mux (SU00212), 

F1947-06/07 

A5 I40-EN Dual-Bus Ethernet, ILM40-EN A5 

A7 I40-MS1/4 Dual-Bus Medium Speed, ILM40-MS1/4 A7 

A8 I20-8B 8X1 Async RS-232, ILM20-8B 


- SDLC 

- AUC 

AF I60-4E Dual-Bus 4X Ethernet, ILM60-4E AF 

B0 I60-HS Dual-Bus 4X High Speed, ILM60-HS B0 

B2 ILMCOP Dual-Bus ILM Coprocessor, ILM60-COP B2 

Microcode ID 00 = Line module microcode not loaded. 

MCID 

Microcode ID EF = Microprogram was loaded but requires an end-of-function (EOF - 4 bytes of 00 and 

1 byte of FF) to operate. The ROM microcode still has control. 

Microcode IDs F0 through FF = An error was detected during the microprogram load 

and the line module is not operational. 

C–4 7431 8080–202 

26 

2A 

32 

39 

44 

45 

– 

84 

5D 

A8 

B1

Appendix D 

Installing DCP Maintenance Software 

Introduction 

Unisys Maintenance Software Test Level 3 (TL3) can be used to test line modules in the 

DCP/5, DCP/15, DCP/50/30, DCP200, DCP600, and CAP processors. TL3 is a full partition 

test aimed at isolating DCP line module problems. It must be used to test the dual-bus line 

modules. 

TL3 replaces the off-line macrodiagnostic tests that were used for testing line modules in 

some of the earlier DCP processors, such as the DCP/5, DCP/15, and DCP/50/30 series 

processors. TL3 software is delivered as part of the communications delivery software 

package since the release of CD5R3. If for any reason TL3 is not available on the hard 

disk after downloading the communications delivery package, a Unisys Customer Service 

Engineer can load TL3 on the hard disk using diskettes containing DCP Installation and 

Test software (maintenance software). TL3, however, is only a portion of the software 

loaded from the diskettes. In the process of loading TL3 from diskettes, a portion of the 

communications delivery is over-written. Thus, at the completion of testing, the 

communications delivery must be loaded again for proper customer operation. 

Installation Instructions 

The instructions for installing the DCP Installation and Test software (maintenance 

software), level 2R1 or higher, are provided in the subsections that follow. The 

Installation and test software is a version of the TL3 software, but not necessarily the 

current version that is delivered with the communications delivery. 

Caution 

If TL3 is installed from the DCP installation and test diskettes, customer software 

must be re-installed prior to returning the system to the customer to insure the 

latest level of TL3 and Telcon is used. 

Note: Installing the DCP Installation and Test software requires a DCP O/S console. 

The DCP O/S console can be a UTS, SVT, or a personal computer (PC). The table 

that follows provides the key conversions for the O/S Output Interrupt and 

Transmit commands. 

7431 8080–202 D–1


IF the O/S 

command is ... 

AND the keyboard 

is a UTS or SVT, 

then use the... 

AND the keyboard 

is a PC, then use 

the ... 

Output Interrupt Message Wait key Alt + 1 key 

Transmit XMIT key Enter key 

SOE XMIT Enter key 

Note: Prior to loading TL3, make a set of backup diskettes to protect the master set of 

diskettes. Use the new set of diskettes for the installation procedures. Reference 

the appropriate processor operations guide for instructions on preparing the 

backup set of diskettes. 

DCP/5 Procedures 

Installing DCP/5 Environment 

If necessary, refer to the DCP/5 Installation and Operations Reference Manual 

(UP–14133 Rev. 1) for help to get to the DOS environment (prompt). 

Note: The PC must have DOS loaded and have the DOS prompt displayed. 

Step Action 

1 Insert the diskette titled "DCP Installation & Test Software DCP/5 Installation" into 

the A disk drive. 

2 Enter the following command and press the Enter key: 

A:\INSTALL 

3 Wait for the DCP/5 Programs screen to appear and comply with the prompts 

displayed on the screen as the software loads. The prompts are as follows: 

a. PRESS ANY KEY TO CONTINUE. 

b. REMOVE THE DCP/5 INSTALLATION DISKETTE. 

c. INSERT THE TL3 LOAD DISKETTE. PRESS ANY KEY. 

The diskette is labeled “DCP Installation & Test Software DCP/5 TL3 Load 

Diskette." 

4 When the "Transfer is complete" screen appears, remove the diskette and reset 

the PC. When the following prompt is displayed: 

REMOVE THE TL3 LOAD DISKETTE 

The system automatically initializes. 

D–2 7431 8080–202

Preparing the Hard Disk for a Local Load 

Step Action 


1 Wait for the DCP/OS screen to appear and insert the DCP/5 diskette labeled "DCP 

Installation & Test Software DCP/5 TL3 Load Diskette" in the diskette drive. 

2 Perform a System Reset with the load path set to 0, using the following procedure: 

a. Press Ctrl - E to display the operator's screen. 

b. Use the arrow or tab keys to select the Operator Panel menu item and press 

the Enter key. 

c. Select the System Reset menu item and press the Enter key. Load Path 0 

(zero) is displayed. If the load path is not set to 0, change the load path to 0 

and press the Enter key. The Load Path Setting menu item is displayed. Press 

the Enter key again. 

d. Wait for the DCP/OS to load and the DCP/OS screen to display. 

7431 8080–202 D–3


Preparing the Hard Disk 

Step Action 

1 When the DCP/OS screen is displayed, press the Message Wait (Alt + 1) key on 

the keyboard. 

2 Sign on to O/S by entering the following command: 

@RUN (your initials) 

Remove the "TL3 Load Diskette" and press the XMIT (Enter) key. 

3 Enter the following command and press the XMIT key: 

@@CONS DN IF0 

4 Insert the DCP/5 diskette labeled: "DCP Installation & Test Software DCP/5 TL3 

Programs Diskette 1 of X" in the diskette drive. 

5 Enter the following command and press the XMIT (Enter) key: 

@@CONS UP IF0 


@ADD SYS$*SYSTEM.INSTALL5 

The following prompt appears on the DCP O/S screen: 

DCP/5 TL3 INSTALLATION PROCESS 

NOTE: TL3 SOFTWARE IS AVAILABLE WITH COMMUNICATIONS 

DELIVERY CD5R3 AND LATER RELEASES. IF THE CUSTOMER 

HAS COMMUNICATIONS DELIVERY CD5R3 OR LATER LOADED, 

USE TL3 FROM THE COMMUNICATIONS DELIVERY. 

USE THE TL3 (DISKETTE) INSTALLATION 

PROCEDURE IF: 

1. YOU ARE INSTALLING A NEW SYSTEM AND TL3 IS NOT 

AVAILABLE FROM THE COMMUNICATIONS 

DELIVERY. 

2. THE COMMUNICATIONS DELIVERY COULD NOT BE 

DOWNLOADED AND YOU ARE TESTING THE LINE MODULE 

IN THE DOWNLOAD PATH. 

3. THE COMMUNICATIONS DELIVERY IS EARLIER THAN 

CD5R3. 

XMIT TO CONTINUE 

continued 

D–4 7431 8080–202

Step Action 

7 Press the XMIT key. The following screen appears: 


CAUTION: DO NOT USE TL3 FROM DISKETTE, IF TL3 IS 

AVAILABLE FROM THE COMMUNICATIONS DELIVERY. 

THE TL3 (DISKETTE) INSTALLATION PROCESS 

OVERLAYS SOME OF THE CUSTOMER SOFTWARE. YOU 

MUST PURGE THE HARD DISK AFTER USING TL3 AND 

RELOAD THE CUSTOMERS COMMUNICATION DELIVERY 

TO AVOID SYSTEM ERRORS FROM INCOMPATIBLE 

FILES. 

DO YOU WANT TO CONTINUE THIS INSTALLATION? 

ENTER (Y)es or (N)o and XMIT. 

8 Type Y and press XMIT. 

The following prompt is displayed: 

DO YOU WANT TO PURGE YOUR HARD DISK? 

Enter (Y)es or (N)o. 

9 Type Y or N and press the Enter key. 

7431 8080–202 D–5


Loading the Maintenance Software on the Hard Disk 

Step Action 

1 Insert the DCP/5 diskette labeled: "DCP Installation & Test Software DCP/5 TL3 

Programs Diskette 2 of X" in the diskette drive and press the XMIT key at the 

following prompt: 

INSERT PROGRAMS DISKETTE (#2) AND XMIT 

2 When the next prompt displays, insert the diskette requested in the prompt. 

Repeat this step until all diskettes of the series have been loaded. 

3 Insert the DCP/5 diskette labeled "DCP Installation & Test Software DCP/5 TL3 

Load Diskette" in the diskette drive and press the XMIT key when the following 

prompt is displayed: 

INSERT TL3 LOAD DISKETTE AND XMIT 

4 Enter Y or N and press the XMIT key at the following prompt, depending upon the 

report on the previous error log message. 

IS THE I/O ERROR LOG EMPTY? 

Enter (Y)es or (N)o and XMIT. 

5 Perform a system reset by pressing the Ctrl/Alt/Del keys at the following prompt: 

******TEST LEVEL 3 SOFTWARE INSTALLATION COMPLETE***** 

YOU MUST RELOAD TO VERIFY THE INSTALLATION PROCESS. 

TO RELOAD, REMOVE DISKETTE FROM THE DRIVE AND 

PERFORM A SYSTEM RESET. 

Refer to Section 1, “Introduction,” of this book for the procedure to run TL3 software. 

DCP/15 and DCP/50/30 Series Procedures 

Preparing for a Local Load 

Step Action 

1 Insert the DCP/15 or DCP/50/30 labeled "DCP Installation & Test Software 

DCP/15 or DCP/50/30 TL3 Load Diskette" in the diskette drive on the DCP. 

2 Set the DCP load path to 0 (zero). 

3 Press the System Reset switch on the DCP and wait for the DCP/OS 

console to display the DCP/OS screen. 

D–6 7431 8080–202


Step Action 

1 Press the Message Wait key on the DCP/OS keyboard. 


2 Sign on to O/S by entering the following command and press the XMIT key: 


3 Check to see what runs are currently active: 

@@CONS T 

4 Terminate all active runs (with the exception of your own): 



@@CONS DN IF0 

6 Insert diskette labeled "DCP Installation & Test Software DCP/15 or DCP/50/30 

TL3 Programs Diskette 1 of X" in the diskette drive. 


@@CONS UP IF0 

continued 

7431 8080–202 D–7


Step Action 

8 Enter one of the following commands (depending on which system you are 

installing the software) and press the XMIT key: 







DELIVERY CD5R3 AND LATER RELEASES. IF THE 

CUSTOMER HAS COMMUNICATIONS DELIVERY CD5R3 OR 

LATER LOADED, USE TL3 FROM THE COMMUNICATIONS 

DELIVERY. 


PROCEDURE IF: 

1. YOU ARE INSTALLING A NEW SYSTEM AND TL3 IS NOT 



DOWNLOADED AND YOU ARE TESTING THE LINE MODULE IN 

THE DOWNLOAD PATH. 

3. THE COMMUNICATIONS DELIVERY IS EARLIER THAN CD5R3. 





THE TL3 (DISKETTE) INSTALLATION PROCESS 

OVERLAYS SOME OF THE CUSTOMER SOFTWARE. YOU 

MUST PURGE THE HARD DISK AFTER USING TL3 AND 

RELOAD THE CUSTOMERS COMMUNICATION DELIVERY TO 

AVOID SYSTEM ERRORS FROM INCOMPATIBLE FILES. 







11 Type Y and press the Enter key. 

D–8 7431 8080–202


Step Action 


1 Insert the DCP diskette labeled "DCP Installation & Test Software 

DCP/15/50/30 TL3 Programs Diskette 2 of X" in the diskette drive and press 

the XMIT key at the following prompt: 

INSERT TL3 PROGRAM DISKETTE (#2) AND XMIT 

2 When the next prompt displays, insert the diskette requested in the prompt. 


3 Insert the DCP diskette labeled "DCP/15/50/30 Installation & Test Software 

DCP/15/50/30 TL3 Load Diskette" in the diskette drive and press the XMIT key 

at the following prompt: 



IS THE I/O ERROR LOG EMPTY/ 


4 Enter Y or N depending upon the report on the previous error log message and 

press XMIT. 

5 Remove the diskette from the diskette drive at the following prompt: 

*****TEST LEVEL 3 SOFTWARE INSTALLATION COMPLETE***** 

YOU MUST RELOAD TO VERIFY THE INSTALLATION PROCESS.. 

DO YOU WANT TO RELOAD NOW? 


6 Enter Y and press XMIT. The system initializes and the DCP/OS screen is 

displayed. 


7431 8080–202 D–9


DCP200 Procedures 

Preparing the DCP200 for a Local Load 

Step Action 

1 Insert the diskette labeled "DCP Installation & Test Softeware DCP200/600 

TL3 Load Diskette" in the diskette drive. 

2 Press the System Reset switch on the CP/storage PCA and wait for the 

DCP/OS console to display the DCP/OS screen. 


Step Action 

1 Press the Message Wait key on the DCP O/S keyboard. 

2 Sign on to O/S by entering the following command and pressing the XMIT 

key: 



@@CONS T 




@@CONS DN IF0 

6 Insert diskette labeled "DCP Installation & Test Software DCP/200/600 TL3 



@@CONS UP IF0 

continued 

D–10 7431 8080–202

Step Action 









DELIVERY. 

USE THE TL3 (DISKETTE) INSTALLATION PROCEDURE 

IF: 

1. YOU ARE INSTALLING A NEW SYSTEM AND TL3 IS 

NOT AVAILABLE FROM THE COMMUNICATIONS 

DELIVERY. 


DOWNLOADED AND YOU ARE TESTING THE LINE 

MODULE IN THE DOWNLOAD PATH. 

3. THE COMMUNICATIONS DELIVERY IS EARLIER 

THAN CD5R3. 





DELIVERY. THE TL3 (DISKETTE) INSTALLATION 

PROCESS OVERLAYS SOME OF THE CUSTOMER 

SOFTWARE. YOU MUST PURGE THE HARD DISK 

AFTER USING TL3 AND RELOAD THE CUSTOMERS 

COMMUNICATION DELIVERY TO AVOID SYSTEM 

ERRORS FROM INCOMPATIBLE FILES. 


ENTER (Y)es or (N)o and XMIT 






7431 8080–202 D–11



Step Action 

1 Insert the DCP diskette labeled "DCP Installation & Test Software DCP200/600 

TL3 Program Diskette 2 of X" in the diskette drive and press the XMIT key at the 


INSERT PROGRAM DISKETTE (#2) AND XMIT 

2 Wait for the next prompt and insert the diskette requested. Repeat this step 

until all diskettes of the series have been loaded. 

3 Insert the diskette labeled "DCP Installation & Test Software DCP200/600 TL3 

Load Diskette" in the diskette drive and press the XMIT key at the following 

prompt: 




Enter (Y)es or (N)o and XMIT 

4 Enter Y and press XMIT. 

5 Remove the diskette from the diskette drive at the following prompt: 




Enter (Y)es or (N)o and XMIT 

6 Enter Y and press XMIT. The system initializes and the DCP/OS screen is 

displayed. 


D–12 7431 8080–202

DCP600 Procedures 

Preparing the DCP600 for a Local Load 

Step Action 



Load Diskette" in the diskette drive. 

2 Set the load path switches to 0 (zero) from the control station. 

3 Perform a system reset and wait for the DCP/OS console to display the DCP/OS 

screen. 


Step Action 

1 Press the Message Wait key on the DCP O/S keyboard. 

2 Sign on to O/S by entering the following command and press the XMIT key: 



@@CONS T 




@@CONS DN IF0 

6 Insert diskette labeled "DCP Installation & Test Software DCP200/600 TL3 



@@CONS UP IF0 

continued 

7431 8080–202 D–13


Step Action 








DELIVERY. 


PROCEDURE IF: 

1. YOU ARE INSTALLING A NEW SYSTEM AND TL3 IS 

NOT AVAILABLE FROM THE COMMUNICATIONS 

DELIVERY. 


DOWNLOADED AND YOU ARE TESTING THE LINE 

MODULE IN THE DOWNLOAD PATH. 

3. THE COMMUNICATIONS DELIVERY IS EARLIER 

THAN CD5R3. 





DELIVERY. THE TL3 (DISKETTE) INSTALLATION 

PROCESS OVERLAYS SOME OF THE CUSTOMER 

SOFTWARE. YOU MUST PURGE THE HARD DISK 

AFTER USING TL3 AND RELOAD THE CUSTOMERS 

COMMUNICATION DELIVERY TO AVOID SYSTEM 

ERRORS FROM INCOMPATIBLE FILES. 



10 Type Y and press XMIT. The following prompt is displayed: 




D–14 7431 8080–202


Step Action 



Programs Diskette 2 of X" in the diskette drive and press the XMIT key at the 


INSERT PROGRAMS DISKETTE (#2) AND XMIT 

2 Wait for the next prompt and insert the diskette requested in the prompt. 



Load Diskette" in the diskette drive and press the XMIT key at the following 

prompt: 





4 Enter Y or N depending upon the report on the previous error log message and 

press XMIT. 

6 Remove the diskette from the diskette drive at the following prompt and enter Y 

and press XMIT: 





7 Enter Y and press the XMIT key. The system initializes and the DCP/OS screen 

is displayed. 


7431 8080–202 D–15


CAP Procedures 

Caution 

DCP Installation and Test Software (TL3) should only be loaded from diskettes on 

a CAP if the system is unusable. Otherwise, use the TL3 that is released with 

CAP/ware 1.2 on the hard disk. Loading TL3 from the CSE diskettes overwrites 

some of the system software and will require loading the CAP/ware 1.2 again on 

the hard disk. 

CAP hardware is based on the following CAP processors: 

• CAP 100 

• CAP 200 

• CAP 250 

Each of these CAP processors can have the DCP Installation and Test software loaded to 

the hard disk from diskettes by the Customer Service Engineer. Reference the following 

table for the appropriate procedure for the various CAP processors. 

IF the CAP processor is... Refer to the... 

CAP 100 DCP/200 procedure 

CAP 200 DCP/50/30 procedure 

CAP 250 DCP/50/30 procedure 

These procedures will destroy the system software on the hard disk and after using TL3 

software, the CAP system software will have to be loaded on the hard disk again. 

D–16 7431 8080–202

*74318080-202* 

74318080–202

DCP Series Maintenance Software Test Level 3 - Public Support ...

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