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Introduction to Cadence - UPC

Introduction to Cadence - UPC

output OUT;input

output OUT;input INN,INP,VDD,VSS;electrical OUT,INN,INP,VDD,VSS;// params and variablesparameter real cut_off_frequency = 50.0;parameter real gaindB = 100;real c0;real r0;real gain;// internal nodeelectrical internal_node;analog begin// initial calculations@ (initial_step or initial_step(“dc”)) beginr0 = 1/(2*3.141592654*cut_off_frequency*10e-6);gain = pow(10, (gaindB/20));endc0 = 10e-6; // always et to 10uV(internal_node)

3.2.2 Simulation environment set-upThe simulation set-up was previously store in the ‘state’ file, so we don’t need to repeat all the configurationsteps. Just load the previous ‘state’ after starting the simulation environment:Session -> Load State… (Fill in the form as shown bellow, selecting the ‘state’ name used tosave the simulation set-up in the previous section).It is imporatant to check that a DC analysis will be also performed to save the static operating point of the circuit:Analyses -> Choose…Check the DC box.The form should look like this:You have also to change the Switch View List to usethe ahdl view:Setup->Environment…Fill in the form as shown in thenext figure:19

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