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Figure 6.2: Result of an Interconnection Test without errors.6.2 Case StudyThe following section reviews the effects of some errors encountered during initialdeployment of the TestCell and their traces in the experiment’s output. All of thehistograms in the following section are based on a sample of 92190 events from a shortperiod of data taking in August 2009.6.2.1 Baseline ScenarioIf the GT is working according to specification, we expect the Function Test, FINORTest and Interconnection Test to complete without errors. In this case, the informationreturned by the test is very succinct (see Fig. 6.2 and Fig. 6.3) and only indicates thatno errors have occurred. A comparison of recorded data with emulator results shouldalso yield no differences if the comparison is restricted to algorithms that are notprescaled.6.2.2 Bit Errors in GTL ConnectionsDuring data taking, comparing the trigger rates of non-isolated electron triggerswith different thresholds to reference values showed an unexpected abundance ofhighly ranked non-isolated electron triggers. Further investigation of this phenomenonshowed that electron candidates arrived correctly at the PSBs from the GCT, but oftenmatched trigger algorithms far above their actual rank. A further analysis revealed ashort circuit between the lowest bit of the candidate η and the highest bit of its rank,leading to a significant overvaluation of candidates with odd η. Fig. 6.4 shows theerror in a representation of the 16-bit e/γ candidate.72