Logic Simulation - GPU Technology Conference

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Logic Simulation - GPU Technology Conference

Data Structure: Distributed Event Queues• Classical CMB allocates anevent queue to each gate• Need sorting when insertion• Hard to maintain on GPUa=1@9nsae=1@10nsebcde=1@10nsd=1@7nsPick up theearliest eventfgPick up theearliest evente: 10@5nse: 01@6nsa: 01@9nse: 10@5nse: 01@6nsd: 01@7ns16• Our work: every input pin of agate has its own event queue• A queue is naturally ordered• Irregular distribution ofrequired queue sizesPeaka# EventsCircuit 1 Circuit 2 Circuit 3on pinsfeb 0~99 34444 26106 158086c100~9999 737 1764 g40d >=10000 3 3 116

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