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SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume

PRELIMINARY DATASuperH TM (SH)64-Bit RISC SeriesSH-5 SystemArchitecture, Volume 1:SystemLast updated 18 March 2002D R A FT05-SA-10001 v1.0SuperH, Inc.SH-5 System Architecture, Volume 1: System

  • Page 2 and 3: iiPRELIMINARY DATASuperH, Inc.This
  • Page 4 and 5: ivPRELIMINARY DATA2.3 Cache coheren
  • Page 6 and 7: viPRELIMINARY DATA4.4 Register desc
  • Page 8 and 9: viiiPRELIMINARY DATA7.2.14 Month al
  • Page 10 and 11: xPRELIMINARY DATA10 Clock, power an
  • Page 12 and 13: xiiPRELIMINARY DATAD R A FTSuperH,
  • Page 14 and 15: xiiPRELIMINARY DATASuperH SH-5 syst
  • Page 16 and 17: PRELIMINARY DATA2 IntroductionEval
  • Page 18 and 19: PRELIMINARY DATA4 IntroductionThe o
  • Page 20 and 21: PRELIMINARY DATA6 Debug architectur
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  • Page 24 and 25: PRELIMINARY DATA10 SuperHyway archi
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  • Page 34 and 35: PRELIMINARY DATA20 Cache coherency
  • Page 36 and 37: PRELIMINARY DATA22 SH-5 SuperHyway
  • Page 38 and 39: PRELIMINARY DATA24 SH-5 SuperHyway
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  • Page 44 and 45: PRELIMINARY DATA30 SH-5 conventions
  • Page 46 and 47: PRELIMINARY DATA32 SH-5 conventions
  • Page 48 and 49: PRELIMINARY DATA34 SH-5 conventions
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    PRELIMINARY DATA38 SH-5 conventions

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    PRELIMINARY DATA40 SH-5 conventions

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    PRELIMINARY DATA42 SH-5 conventions

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    PRELIMINARY DATA44 SH-5 endianess a

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    PRELIMINARY DATA46 SH-5 endianess a

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    PRELIMINARY DATA48 SH-5 undefined b

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    PRELIMINARY DATA50 SH-5 undefined b

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    PRELIMINARY DATA52 SH-5 undefined b

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    PRELIMINARY DATA54 CPU portInstruct

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    PRELIMINARY DATA56 Cache coherency

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    PRELIMINARY DATA58 Bi-endian suppor

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    PRELIMINARY DATA60 Memory mapped re

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    PRELIMINARY DATA62 Memory mapped re

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    PRELIMINARY DATA64 Address map• D

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    PRELIMINARY DATA66 Operation4.3.2 C

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    PRELIMINARY DATA68 OperationIn this

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    PRELIMINARY DATA70 OperationRound R

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    PRELIMINARY DATA72 OperationNote:Th

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    PRELIMINARY DATA74 Register descrip

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    PRELIMINARY DATA76 Register descrip

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    PRELIMINARY DATA78 Register descrip

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    PRELIMINARY DATA80 Register descrip

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    PRELIMINARY DATA82 Register descrip

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    PRELIMINARY DATA84 Register descrip

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    PRELIMINARY DATA86 Register descrip

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    PRELIMINARY DATA88 Register descrip

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    PRELIMINARY DATA90 Register descrip

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    PRELIMINARY DATA92 Power downDMAC.C

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    PRELIMINARY DATA94 FunctionalityThi

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    PRELIMINARY DATA96 Operation5.3 Ope

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    PRELIMINARY DATA98 OperationCPUoper

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    PRELIMINARY DATA100 OperationPERIPH

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    PRELIMINARY DATA102 OperationBit na

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    PRELIMINARY DATA104 OperationBit na

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    PRELIMINARY DATA106 OperationD R A

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    PRELIMINARY DATA108 Features6.1.1 B

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    PRELIMINARY DATA110 Interrupt sourc

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    PRELIMINARY DATA112 Interrupt sourc

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    PRELIMINARY DATA114 Interrupt sourc

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    PRELIMINARY DATA116 Interrupt excep

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    PRELIMINARY DATA118 Interrupt excep

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    PRELIMINARY DATA120 Register descri

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    PRELIMINARY DATA122 Register descri

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    PRELIMINARY DATA124 Register descri

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    PRELIMINARY DATA126 Register descri

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    PRELIMINARY DATA128 Register descri

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    PRELIMINARY DATA130 Register descri

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    PRELIMINARY DATA132 Register descri

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    PRELIMINARY DATA134 Register descri

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    PRELIMINARY DATA136 Register descri

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    PRELIMINARY DATA138 Overview7.1.2 B

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    PRELIMINARY DATA140 OverviewName Ab

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    PRELIMINARY DATA142 Register descri

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    PRELIMINARY DATA144 Register descri

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    PRELIMINARY DATA146 Register descri

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    PRELIMINARY DATA148 Register descri

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    PRELIMINARY DATA150 Register descri

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    PRELIMINARY DATA152 Register descri

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    PRELIMINARY DATA154 Register descri

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    PRELIMINARY DATA156 Register descri

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    PRELIMINARY DATA158 Register descri

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    PRELIMINARY DATA160 Register descri

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    PRELIMINARY DATA162 Register descri

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    PRELIMINARY DATA164 Register descri

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    PRELIMINARY DATA166 Operation7.3 Op

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    PRELIMINARY DATA168 OperationIf a c

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    PRELIMINARY DATA170 Usage notesSH77

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    PRELIMINARY DATA172 Overview• Syn

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    PRELIMINARY DATA174 OverviewChannel

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    PRELIMINARY DATA176 Register descri

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    PRELIMINARY DATA178 Register descri

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    PRELIMINARY DATA180 Register descri

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    PRELIMINARY DATA182 Register descri

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    PRELIMINARY DATA184 Register descri

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    PRELIMINARY DATA186 OperationTMU.TC

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    PRELIMINARY DATA188 OperationAuto-r

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    PRELIMINARY DATA190 Operation4 Use

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    PRELIMINARY DATA192 Usage notes8.5

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    PRELIMINARY DATA194 Overview- Break

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    PRELIMINARY DATA196 Overview9.1.3 P

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    PRELIMINARY DATA198 Register descri

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    PRELIMINARY DATA200 Register descri

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    PRELIMINARY DATA202 Register descri

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    PRELIMINARY DATA204 Register descri

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    PRELIMINARY DATA206 Register descri

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    PRELIMINARY DATA208 Register descri

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    PRELIMINARY DATA210 Register descri

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    PRELIMINARY DATA212 Register descri

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    PRELIMINARY DATA214 Register descri

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    PRELIMINARY DATA216 Register descri

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    PRELIMINARY DATA218 Register descri

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    PRELIMINARY DATA220 Register descri

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    PRELIMINARY DATA222 Register descri

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    PRELIMINARY DATA224 Register descri

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    PRELIMINARY DATA226 Register descri

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    PRELIMINARY DATA228 Register descri

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    PRELIMINARY DATA230 Register descri

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    PRELIMINARY DATA232 Register descri

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    PRELIMINARY DATA234 Register descri

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    PRELIMINARY DATA236 Register descri

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    PRELIMINARY DATA238 Register descri

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    PRELIMINARY DATA240 Register descri

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    PRELIMINARY DATA242 Operation• Da

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    PRELIMINARY DATA244 OperationSCIF.S

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    PRELIMINARY DATA246 OperationInitia

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    PRELIMINARY DATA248 OperationIn ser

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    PRELIMINARY DATA250 OperationSerial

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    PRELIMINARY DATA252 OperationIn ser

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    PRELIMINARY DATA254 SCIF interrupt

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    PRELIMINARY DATA256 Usage notes9.6

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    PRELIMINARY DATA258 Usage notesThe

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    PRELIMINARY DATA260 OverviewSuperHy

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    PRELIMINARY DATA262 Clock pulse gen

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    PRELIMINARY DATA264 Clock pulse gen

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    PRELIMINARY DATA266 Clock pulse gen

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    PRELIMINARY DATA268 Clock pulse gen

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    PRELIMINARY DATA270 Clock pulse gen

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    PRELIMINARY DATA272 Clock pulse gen

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    PRELIMINARY DATA274 Clock pulse gen

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    PRELIMINARY DATA276 Clock pulse gen

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    PRELIMINARY DATA278 Clock pulse gen

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    PRELIMINARY DATA280 Watchdog timer1

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    PRELIMINARY DATA282 Watchdog timerW

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    PRELIMINARY DATA284 Watchdog timerC

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    PRELIMINARY DATA286 Watchdog timerF

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    PRELIMINARY DATA288 Power managemen

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    PRELIMINARY DATA290 Power managemen

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    PRELIMINARY DATA292 Power managemen

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    PRELIMINARY DATA294 Power managemen

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    PRELIMINARY DATA296 Power managemen

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    PRELIMINARY DATA298 Power managemen

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    PRELIMINARY DATA300 Power managemen

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    PRELIMINARY DATA302 Power managemen

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    PRELIMINARY DATA304 Power managemen

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    PRELIMINARY DATA306 Power managemen

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    PRELIMINARY DATA308 Power managemen

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    PRELIMINARY DATA310 Power managemen

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    PRELIMINARY DATA312 Power managemen

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    PRELIMINARY DATA314 Debug and power

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    PRELIMINARY DATA316 Reset controlle

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    PRELIMINARY DATA318 Reset controlle

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    PRELIMINARY DATA320 Reset controlle

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    PRELIMINARY DATA322 Reset controlle

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    324PRELIMINARY DATACLKOUT 262-263,

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    326PRELIMINARY DATAMemory block 25-

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    328PRELIMINARY DATAREIE 205, 208-20

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    330PRELIMINARY DATAWTCNT 276, 281-2

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