EM4006

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Modulator SwitchDue to the low impedance of the antenna and resonantcapacitor the Modulator Switch has to present low RFimpedance when switched ON (about 100 ohms).The minimum time period with the Modulator Switch ONis 38 µs. At lower data rates this time is even muchlonger. The current consumption of divider chain runningat 13 MHz is near 60 µA. Putting together this two figuresit is clear that it is not possible to supply the IC during thetime the Modulator Switch is ON from the integratedSupply Buffer Capacitor which value is approximately 140pF. The IC has to get power from the RF field also duringthe time the Modulator Switch is ON.<strong>EM4006</strong>This problem is solved by putting the Modulator Switch onthe output of the Rectifier (between VDD and VSS) andregulating its ON resistance in function of supply voltage.When the supply voltage is high the ON impedance is low.When the supply voltage drops near the region where theoperation of the IC at 13.56 MHz is not guaranteed theON impedance is increased in order to prevent furtherdrop.1 0 1 1 0 0 0 1 1 0 1NRZ-LSTREAMDM-MCODEDBit i-1 Bit ix 1 no transition at the beginning of Bit i, transition in the middle of Bit i0 0 transition at the beginning of Bit i, no transition in the middle of Bit i1 0 no transition at the beginning of Bit i, no transition in the middle of Bit iPower Supply ManagementFor a correct operation, the device must be initialised.When the transponder is put in the RF field, the supplyvoltage increases until it achieves Vr limit (see Figure 7).During this time and for an additionnal 64 bit period, themodulator switch is on and the device initialises itsinternal logic.Fig. 6At this point, the data transmission starts and runs whilethe supply voltage is higher than Vmin. If the supplyvoltage decreases under this limit, the device is again inan initialising state and the modulator is on.Copyright © 2001, EM Microelectronic-Marin SA 6 www.emmicroelectronic.com
<strong>EM4006</strong>supply voltageV DDV max(voltage clipping)chip operating voltage range: from V minto V maxchip supply voltageV r(Read wake up)V minmodulatorON/OFFONREADtimeOFF64 bitsperiodtimeFig. 7Miller EncoderThe input to Miller encoder is NRZ data coming fromLROM. The output is coded according to Miller format andis driving the modulator Switch. See figure 6 for exampleof Miller code.Clock GenerationThe clock of the logic is extracted from the RF signal. Theclock extracted from RF signal is driving the divider chainconsisting of toggle flip-flops. The output of this dividerchain is data clock with which the data from Laser ROM(LROM) is addressed, encoded and sent to ModulatorSwitch.The layout of divider chain is designed in a way thatdifferent data rates can be chosen with metal mask(options).The following division factors are possible on request:128, 256, 1024, 2048, 4094 and 8192.The standard is 512.OthersAs mentioned in Output Sequence, during the pause (LW)the Modulator Switch is OFF. When observing the pauseduration one has to remember that the time withModulator Switch OFF effectively observed can vary dueto different terminations of STDMS. The stop bit at 0 canbe represented either by Modulator Switch ON or OFFdepending on the data. The start bit at 1 adds 1/2 of dataperiod OFF (transition in the middle of bit period).Figure below show the four possible terminations ofSTDMS and its influence on entire period passed byModulator Switch OFF. Level LOW represents ModulatorSwitch OFF. LDB stands for last data bit.Copyright © 2001, EM Microelectronic-Marin SA 7 www.emmicroelectronic.com
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EM4006

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