In-flight upset - 154 km west of Learmonth, WA, 7 October 2008,

To perform its functions, the CPU module contained:• four read-only memory (ROM) chips 125 that stored the ADIRU’s software(known as the ‘operational flight program’)• a CPU chip that executed the software instructions• four random access memory (RAM) chips for general CPU use (CPU RAM)• a ‘companion’ application-specific integrated circuit (ASIC) 126 that performedvarious interfacing and monitoring tasks, such as controlling access to thedifferent areas of memory, controlling memory addressing, and buffering 127 andpassing data and instructions between the CPU and memory chips• a ‘wait-state’ RAM chip for storing parameters used by the ASIC for memorypartitioning and access timing (see section 3.2.3 and Wait-state tests insection 3.4.9)• a single chip of non-volatile 128 memory for storing BITE data.3.2.3 SoftwareThe Airbus ADIRS equipment specification required that the ADIRU software bedesigned to the highest level of stringency or thoroughness; that is Level 1according to DO-178A (section 2.3.5).A software program is a set of instructions that a computer processor executes toperform a certain task or set of tasks. In the case of the LTN-101 ADIRU, the CPUmodule contained software that carried out or controlled almost all of the ADIRU’stasks, including the input, processing and transmission of data, and BITEmonitoring.When the ADIRU was turned on, the software instructions were transferred fromthe ROM chips to the CPU chip for the ADIRU to operate. The CPU chip cachedand loaded the relevant instructions as they were required in the program sequence.Sections of the program that needed high-rate access by the CPU chip weretemporarily loaded in RAM, which had a faster access time.To increase the reliability of the software, it was divided into 12 separate partitionsaccording to criticality and functionality. Each partition used rigidly definedmemory locations and could only access the system resources it required. If asoftware partition attempted to access an input/output device or memory locationthat was not assigned to it, an error message was generated.When the ADIRU was initially turned on, and periodically afterwards, a cyclicredundancy check (CRC) 129 was performed on the software for each partition toensure that it was not corrupted.and motherboard had the potential to indirectly affect both ADR and IR data, subsequent analysisshowed that there were internal processing problems within the CPU module (section 3.4).125126127128The chips were a type of electrically erasable programmable read-only memory (EEPROM) that isknown as ‘flash memory’.An integrated circuit, often also known as a microchip or chip, is an electronic circuit comprisingnumerous electronic elements manufactured as a single device.A buffer is a region of memory that temporarily stores data while it is being transferred.Non-volatile memory retains its stored data even when power is removed.- 112 -