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Study of the degradation of TDDB Reliability for Cu/Low-k Integration

Study of the degradation of TDDB Reliability for Cu/Low-k Integration

Study of the degradation of TDDB Reliability for Cu/Low-k Integration

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<strong>Study</strong> <strong>of</strong> <strong>the</strong> <strong>degradation</strong> <strong>of</strong> <strong>TDDB</strong> <strong>Reliability</strong> <strong>for</strong> <strong>Cu</strong>/<strong>Low</strong>-k <strong>Integration</strong>Youhei Yamada, Nobuhiro Konishi, Shusuke Watanabe,Junji Noguchi, Tomoko Jimbo, and Osamu InoueMicro Device Division, Hitachi, Ltd.,6-16-3 Shinmachi, Ome-shi, Tokyo 198-8512, JapanTEL: +81-428-33-2019 Fax: +81-428-33-2161 e-mail: ymadayo@mdd.hitachi.co.jpABSTRACTWe studied <strong>Cu</strong>/low-k integration to test <strong>the</strong> <strong>TDDB</strong> reliability <strong>of</strong> <strong>Cu</strong> interconnects. We described <strong>the</strong><strong>TDDB</strong> lifetime dependence on SiOC damage caused by sputtering and <strong>the</strong> CMP processes. The Ta atomswere spiked into <strong>the</strong> SiOC during <strong>the</strong> diffusion barrier metal deposition. We also confirmed damage on <strong>the</strong>top interface between <strong>the</strong> low-k and <strong>the</strong> dielectric diffusion barrier, such as scratches and corrosion, whicheventually shorten <strong>the</strong> <strong>TDDB</strong> lifetime. The deposited SiO film on <strong>the</strong> SiOC capping layers contributed tothis improvement in reliability. The effective k value K eff can be maintained at lower levels by removingthis capping layer during <strong>the</strong> barrier CMP process. We have demonstrated <strong>the</strong> potential <strong>of</strong> <strong>the</strong> integrationschemes that met our target K eff values <strong>for</strong> 65-nm node <strong>Cu</strong> interconnects.INTRODUCTIONTo reduce <strong>the</strong> interconnect resistance capacitance (RC) delay that limits device speed, we mustintroduce low-k dielectrics in addition to <strong>Cu</strong> metallization that can exceed 130-nm nodes. While <strong>the</strong>transition from aluminum to copper wiring decreases <strong>the</strong> resistance <strong>of</strong> <strong>the</strong> interconnects, lower dielectricconstant materials are required to decrease <strong>the</strong> capacitance and minimize cross talk and power dissipation.However, <strong>the</strong> progress achieved in low-k material integration has been slower than that <strong>for</strong> copper, due to<strong>the</strong> nature <strong>of</strong> <strong>the</strong> s<strong>of</strong>t and fragile film. It has become more difficult to adjust low-k dielectrics to adamascene structure that can improve its reliability. Moreover, major reliability issues, such as electromigration (EM), stress migration (SM) and time dependent dielectric breakdown (<strong>TDDB</strong>) lifetimes [1-8]have been becoming more serious. The most critical location <strong>for</strong> inter-level dielectric reliability in a <strong>Cu</strong>damascene structure is <strong>the</strong> top interface, between <strong>the</strong> low-k and dielectric diffusion barrier. One influenceon this reliability is <strong>the</strong> integrity <strong>of</strong> <strong>the</strong> diffusion barrier/low-k interface after <strong>the</strong> CMP process. In this work,we compared <strong>the</strong> <strong>TDDB</strong> tests with variations <strong>of</strong> <strong>the</strong> CMP process and <strong>the</strong> post CMP cleaning process. Thispaper describes <strong>the</strong> effect <strong>of</strong> removing <strong>the</strong> cap-SiO film during CMP on <strong>the</strong> <strong>TDDB</strong>, used to obtain highlyreliable 90-nm node <strong>Cu</strong> interconnects, and integration schemes that met our target K eff values <strong>for</strong> 65-nmnode <strong>Cu</strong> interconnects.EXPERIMENT<strong>TDDB</strong> Degradation ModelThe generally accepted dielectric breakdown caused by copper includes <strong>the</strong> following steps: (1) <strong>Cu</strong>ionization and injection <strong>of</strong> <strong>Cu</strong> + from <strong>the</strong> anode into <strong>the</strong> dielectric; (2) <strong>Cu</strong> + drift through <strong>the</strong> dielectric; and(3) completely <strong>for</strong>med leakage passages and accumulations <strong>of</strong> <strong>Cu</strong> + near <strong>the</strong> cathode, which results in anincrease in <strong>the</strong> electron leakage currents and a subsequent dielectric breakdown. This is illustrated in Figure1. Figure 2 shows a comparison <strong>of</strong> <strong>the</strong> <strong>TDDB</strong> lifetime <strong>of</strong> <strong>Cu</strong> line widths <strong>of</strong> 0.25 and 0.14 um, using a <strong>Cu</strong>/SiOC structure with cap-SiO. As you can see, <strong>the</strong> <strong>TDDB</strong> lifetime <strong>of</strong> <strong>the</strong> 0.14 um <strong>Cu</strong> line width wasshortened by six figures compared to <strong>the</strong> 0.25 um one. With metal-to-metal spacing rapidly approaching upto 100 nm, scaling <strong>of</strong> <strong>the</strong> intermediate wiring levels exacerbates <strong>TDDB</strong> per<strong>for</strong>mance. It will become moredifficult to maintain <strong>the</strong> reliability <strong>of</strong> <strong>Cu</strong> interconnects beyond 90-nm nodes. Figure 3 also shows <strong>the</strong>simulated results <strong>for</strong> 65-nm node interconnects. Some possible integration schemes that meet our target K effvalue <strong>of</strong> 3.0 might include thinner cap-SiO <strong>of</strong> less than 30 nm, or <strong>the</strong> use <strong>of</strong> SiOC (k=2.9) instead <strong>of</strong> SiO.These could effectively obtain a K eff value <strong>of</strong> 3.0 while maintaining <strong>the</strong> reliability <strong>of</strong> <strong>the</strong> <strong>Cu</strong> interconnects.<strong>TDDB</strong> Lifetime EvaluationWe measured <strong>the</strong> <strong>TDDB</strong> lifetime between <strong>the</strong> <strong>Cu</strong> interconnects at 140 o C using a test structure thatconsisted <strong>of</strong> comb line capacitors (L/S=0.25/0.25 um and 0.14/0.14 um). The line-to-line leakage currents12


were measured as a function <strong>of</strong> <strong>the</strong> bias stress time using a pico-ammeter. We used three process flows toinvestigate <strong>the</strong> <strong>TDDB</strong> lifetime dependence on <strong>the</strong> different polished surfaces <strong>of</strong> <strong>the</strong> SiOC and <strong>the</strong> cap-SiO,as shown in Figure 4. Figure 4 (a) shows <strong>the</strong> process flow <strong>for</strong> <strong>the</strong> SiOC surface evaluation. After patterningby lithography, <strong>the</strong> SiOC was etched using an SiC hard mask. Then, <strong>the</strong> SiC hard mask was etchedsimultaneously during <strong>the</strong> SiCN etching process to completely expose <strong>the</strong> SiOC. Figure 4 (b) shows <strong>the</strong>process flow <strong>for</strong> <strong>the</strong> cap-SiO surface evaluation. The cap-SiO and <strong>the</strong> SiOC were etched using <strong>the</strong> photoresist mask only. The cap-SiO protected <strong>the</strong> low-k material during all <strong>the</strong> processes but increased <strong>the</strong>effective dielectric constant. Figure 4 (c) shows <strong>the</strong> process flow <strong>for</strong> <strong>the</strong> SiOC surface evaluation. Thecap-SiO and <strong>the</strong> SiOC were etched using a photo resist mask. The cap-SiO protected <strong>the</strong> low-k materialduring all <strong>the</strong> processes. Then <strong>the</strong> cap-SiO layer was polished during <strong>the</strong> barrier metal polishing and <strong>the</strong>SiOC was exposed completely. In regard to <strong>the</strong> <strong>Cu</strong> metallization, <strong>the</strong> barrier metal and <strong>Cu</strong> seed weresputtered be<strong>for</strong>e <strong>the</strong> electroplated <strong>Cu</strong> film was deposited. For <strong>the</strong> <strong>Cu</strong>-CMP process, we used a rotary typepolishing system <strong>for</strong> both <strong>Cu</strong> and barrier metal polishing. Then, we used <strong>the</strong> low-selective type barriermetal polishing process to remove <strong>the</strong> barrier metal and continue to polish <strong>the</strong> underlayer <strong>of</strong> dielectric filmuntil it was about several ten-nm. Conventional abrasive containing <strong>Cu</strong> polishing process was used toremove <strong>the</strong> <strong>Cu</strong> film and stop on <strong>the</strong> barrier metal. In this barrier metal process, <strong>the</strong> SiOC was polished,changing its surface properties to hydrophilic from <strong>the</strong> hydrophobic, at almost <strong>the</strong> same polishing rate as<strong>for</strong> <strong>the</strong> cap-SiO [7] and [9]. After barrier metal polishing, we tried several kinds <strong>of</strong> cleaning solutions <strong>for</strong><strong>the</strong> post-CMP cleaning shown in Table 1. Then, H 2 -annealing and NH 3 -plasma treatment were per<strong>for</strong>medbe<strong>for</strong>e SiCN deposition to reduce <strong>the</strong> <strong>Cu</strong> interconnects and improve <strong>the</strong> adhesion strength between <strong>the</strong>polished low-k dielectrics and <strong>the</strong> diffusion barrier dielectrics. The queue time between <strong>the</strong> CMP and <strong>the</strong>dielectric barrier was restricted under <strong>the</strong> same conditions.RESULTS AND DISCUSSION1.Evaluation <strong>of</strong> low-k film damage <strong>the</strong> during metal deposition processFirst, barrier metal and seed <strong>Cu</strong> sputtering damage occurred in all depositions. There<strong>for</strong>e, weinvestigated <strong>the</strong> SiOC and <strong>the</strong> cap-SiO surfaces. Figure 5 shows <strong>the</strong> <strong>Cu</strong> and Ta contaminations on <strong>the</strong> SiOCfilm, with and without <strong>the</strong> cap-SiO film, as a function <strong>of</strong> <strong>the</strong> amount <strong>of</strong> removal. We used a total reflectionX-ray fluorescence (TXRF) system to evaluate <strong>the</strong> metal contamination on <strong>the</strong>ir surfaces. The <strong>Cu</strong>contaminations on both films were lower than that <strong>of</strong> <strong>the</strong> detection limit (1.5 x 10 11 atoms/cm 2 ). On <strong>the</strong>o<strong>the</strong>r hand, <strong>the</strong> Ta contamination on <strong>the</strong> SiOC was 3.6 x 10 13 atoms/cm 2 , and that was larger than that on<strong>the</strong> cap-SiO by about two figures when <strong>the</strong> amount <strong>of</strong> removal was 10 nm. However, <strong>the</strong> Ta contaminationwas reduced when <strong>the</strong> amount <strong>of</strong> removal was more than 30 nm. This means that Ta sputtering damaged<strong>the</strong> SiOC film surface.(1) Process flow comparison between <strong>the</strong> SiOC shown in Figure 4 (a) and <strong>the</strong> SiOC with 75-nm Cap-SiO,shown in Figure 4 (b)Figure 6 shows <strong>the</strong> I-V curves measured on <strong>the</strong> comb line capacitors The line-to-line leakagecurrent <strong>of</strong> <strong>the</strong> SiOC was almost <strong>the</strong> same as that with <strong>the</strong> cap-SiO, even when high voltages were applied.Figure 7 shows <strong>the</strong> relationship between <strong>the</strong> leakage currents and <strong>the</strong> bias stress time in an electric fieldstrength <strong>of</strong> 4.5 MV/cm. The bias stress time <strong>for</strong> <strong>the</strong> 10-nm SiOC removal was <strong>the</strong> shortest, but <strong>the</strong>line-to-line insulating leakage <strong>of</strong> interconnects was relatively low. Figure 8 shows <strong>the</strong> <strong>TDDB</strong> lifetime <strong>of</strong> <strong>the</strong>SiOC/<strong>Cu</strong> structure. The <strong>TDDB</strong> lifetime in <strong>the</strong> 10-nm SiOC removal was reduced by three figures comparedto that <strong>of</strong> <strong>the</strong> SiOC with <strong>the</strong> cap-SiO. We think <strong>the</strong>se Ta atoms were directly spiked into <strong>the</strong> SiOC duringsputtering and became impurities. Fur<strong>the</strong>r, <strong>the</strong> <strong>TDDB</strong> lifetime <strong>for</strong> <strong>the</strong> 50-nm SiOC removal was increasedby one figure compared to that in 10-nm SiOC removal. This means that <strong>the</strong> damaged layer was removedby 50-nm SiOC polishing, but even that was not good enough.(2) Process flow comparison between <strong>the</strong> SiOC with Cap-SiO shown in Figure 4 (b) and <strong>the</strong> SiOC with <strong>the</strong>75-nm Cap-SiO removed, as shown in Figure 4 (c)Figure 9 shows I-V curves measured on comb line capacitors. In this figure, <strong>the</strong> black circlesrepresent <strong>the</strong> I-V curve measurement <strong>of</strong> <strong>the</strong> SiOC with <strong>the</strong> 25-nm cap-SiO. The black triangles represent<strong>the</strong> I-V curve <strong>of</strong> <strong>the</strong> SiOC on a freshly polished cap-SiO. The white triangles represent <strong>the</strong> I-V curve <strong>of</strong> <strong>the</strong>SiOC with 25-nm removed. The line-to-line leakage currents <strong>of</strong> <strong>the</strong> SiOC after removing <strong>the</strong> cap-SiO andthat <strong>of</strong> <strong>the</strong> SiOC after 25-nm were removed were almost <strong>the</strong> same as that with <strong>the</strong> 25-nm cap-SiO, evenwhen high voltage was applied. Figure 10 shows <strong>the</strong> relationship between <strong>the</strong> leakage currents and <strong>the</strong> bias13 PacRim-CMP 2004


stress time in an electrical field strength <strong>of</strong> 3.2 MV/cm. The leakage currents <strong>of</strong> <strong>the</strong> SiOC after removing<strong>the</strong> cap-SiO and that <strong>of</strong> <strong>the</strong> SiOC with 25-nm removed, were almost <strong>the</strong> same as those <strong>of</strong> <strong>the</strong> 25-nmcap-SiO. Figure 11 shows <strong>the</strong> <strong>TDDB</strong> lifetime <strong>of</strong> <strong>the</strong> SiOC/<strong>Cu</strong> structure. The <strong>TDDB</strong> lifetime after removing25-nm <strong>of</strong> SiOC was higher than that with <strong>the</strong> 25-nm cap-SiO. We think <strong>the</strong>re was little surface damage on<strong>the</strong> SiOC due to <strong>the</strong> cap-SiO protection. This means that <strong>the</strong> damaged layer was completely removed by25-nm SiOC polishing. Figure 12 shows <strong>the</strong> <strong>TDDB</strong> lifetime dependence on <strong>the</strong> amount <strong>of</strong> <strong>the</strong> SiOC with<strong>the</strong> cap-SiO in an electrical field strength <strong>of</strong> 3.5 MV/cm. The amount <strong>of</strong> <strong>the</strong> cap SiO/ SiOC removal waschanged from 25 to 100 nm. The <strong>TDDB</strong> lifetime in 50-nm cap-SiO removal was reduced by one figure,compared with that <strong>of</strong> <strong>the</strong> SiOC with 25-nm removed. We think <strong>the</strong> film properties <strong>of</strong> thinner cap-SiOfilms <strong>of</strong> less than 30 nm have a leakage path that allows <strong>TDDB</strong> <strong>degradation</strong> to occur easily.Figure 13 shows an illustration <strong>of</strong> ano<strong>the</strong>r <strong>TDDB</strong> <strong>degradation</strong> mechanism. The Ta atoms werespiked into <strong>the</strong> SiOC during sputtering, and a damaged layer <strong>for</strong>med in <strong>the</strong> SiOC. The electricallyintroduced <strong>Cu</strong> moves along <strong>the</strong> CMP-surface and also in <strong>the</strong> damaged layer, resulting in a shorter <strong>TDDB</strong>lifetime than that <strong>of</strong> <strong>the</strong> cap-SiO by three figures. However, Ta atoms suppress <strong>the</strong> <strong>Cu</strong> diffusion at <strong>the</strong>CMP-surface and <strong>the</strong> leakage current between <strong>the</strong> <strong>Cu</strong> wires is reduced, as shown in fig. 7.2. Evaluation <strong>of</strong> low-k film damage <strong>the</strong> during CMP processFigure 14 shows surface defect inspection results <strong>of</strong> <strong>the</strong> SiOC surfaces after barrier metal polishing.We observed many scratches on <strong>the</strong> wafer by changing <strong>the</strong> both <strong>Cu</strong> and barrier metal CMP slurries and <strong>the</strong>polishing conditions.Figure 15 shows I-V curves measured on comb line capacitors. The line-to-line leakage current <strong>of</strong><strong>the</strong> SiOC with scratches was almost <strong>the</strong> same as that without scratches, even when a high voltage wasapplied. Figure 16 shows <strong>the</strong> relationship between <strong>the</strong> leakage currents and <strong>the</strong> bias stress time in anelectrical field strength <strong>of</strong> 3.2 MV/cm. The leakage current <strong>of</strong> <strong>the</strong> scratched SiOC was almost <strong>the</strong> same as<strong>for</strong> <strong>the</strong> unscratched one. Figure 17 shows <strong>the</strong> <strong>TDDB</strong> lifetime <strong>of</strong> <strong>the</strong> SiOC/<strong>Cu</strong> structure. The <strong>TDDB</strong> lifetime<strong>of</strong> <strong>the</strong> scratched SiOC was shortened by one figure, compared to <strong>the</strong> unscratched one. We believe <strong>the</strong> <strong>Cu</strong>ions drifted along <strong>the</strong>se scratches on both <strong>the</strong> SiOC and <strong>Cu</strong> surfaces during <strong>the</strong> <strong>TDDB</strong> test and caused a<strong>degradation</strong> in <strong>the</strong> <strong>TDDB</strong>.3. Evaluation <strong>of</strong> low-k film damage <strong>the</strong> during <strong>the</strong> post CMP cleaning processFigure 18 shows <strong>the</strong> defect counts on <strong>the</strong> SiOC blanket surfaces after <strong>the</strong> <strong>Cu</strong>-CMP process usingseveral kinds <strong>of</strong> post-CMP cleaning solutions, as shown in Table 1. The defect counts <strong>of</strong> <strong>the</strong> post-CMPcleaning processes using Chemical B or C were lower than those <strong>of</strong> <strong>the</strong> process using chemical A by tw<strong>of</strong>igures. This means that <strong>the</strong> particle removal ability on <strong>the</strong> SiOC surface without surfactants was notsufficient because <strong>of</strong> its hydrophobic surface. In this evaluation, chemical C was <strong>the</strong> best <strong>of</strong> all.Figure 19shows <strong>the</strong> surface defect inspection results <strong>of</strong> <strong>the</strong> cap-SiO and <strong>the</strong> SiOC surfaces after barrier metalpolishing. The defect count <strong>of</strong> <strong>the</strong> post-CMP cleaning process using chemical B was <strong>the</strong> lowest <strong>of</strong> <strong>the</strong> threesamples that had SiOC surfaces, and almost <strong>the</strong> same as that <strong>of</strong> <strong>the</strong> cap-SiO using chemical A. There weremany defects such as scratches, voids, pattern defects and carbon particles, which appeared in all samples.Figure 20 shows <strong>the</strong> <strong>TDDB</strong> lifetime <strong>of</strong> <strong>the</strong> SiOC/<strong>Cu</strong> structure, without changing <strong>the</strong> cap-SiO post-CMPcleaning solutions, under <strong>the</strong> condition that <strong>the</strong> Ta contamination was removed (<strong>the</strong> polishing amounts <strong>of</strong><strong>the</strong> SiOC and <strong>the</strong> cap-SiO were both 50 nm). But <strong>the</strong> <strong>TDDB</strong> lifetime did not depend on <strong>the</strong> SiOC surfacedefect counts. We found that <strong>the</strong> <strong>TDDB</strong> lifetime <strong>of</strong> <strong>the</strong> <strong>Cu</strong>/SiOC structure without <strong>the</strong> cap-SiO did notimprove as much as when <strong>the</strong> post-CMP cleaning solution was changed. Figure 21 shows <strong>the</strong> organicparticle SEM images <strong>of</strong> <strong>the</strong> sample in fig.18 using chemical C. As you can see, most <strong>of</strong> <strong>the</strong> carbon particlesdisappeared after additional H 2 -annealing and NH 3 -plasma treatment. This suggests that <strong>the</strong> <strong>TDDB</strong> lifetimedoes not depend on <strong>the</strong> SiOC surface defect counts.Next, we evaluated <strong>the</strong> influence <strong>of</strong> <strong>the</strong> <strong>Cu</strong> corrosion on <strong>the</strong> <strong>TDDB</strong> lifetime. Figure 22 shows <strong>the</strong>surface defect inspection results <strong>of</strong> <strong>the</strong> SiOC surfaces after barrier metal polishing after removing <strong>the</strong>cap-SiO using chemical B. We changed <strong>the</strong> brush rotation speed. We observed corrosion on <strong>the</strong> <strong>Cu</strong> wiringsurface. Corrosion was prominent in this sample. Figure 23 shows <strong>the</strong> <strong>TDDB</strong> lifetime <strong>of</strong> <strong>the</strong> SiOC/<strong>Cu</strong>structure after removing <strong>the</strong> cap-SiO and changing <strong>the</strong> post-CMP cleaning conditions. The <strong>TDDB</strong> lifetime<strong>of</strong> <strong>the</strong> corroded <strong>Cu</strong> SiOC was reduced by more than three figures compared to that using baseline CMPcleaning conditions. The angle <strong>of</strong> <strong>the</strong> straight line <strong>of</strong> <strong>the</strong> SiOC with <strong>Cu</strong> corrosion was lower than that withno <strong>Cu</strong> corrosion. We think <strong>the</strong>re is ano<strong>the</strong>r <strong>TDDB</strong> <strong>degradation</strong> mechanism. It should be noted that <strong>the</strong>leakage properties depend on <strong>the</strong> kind <strong>of</strong> <strong>Cu</strong> corrosion, which means that <strong>the</strong> leakage path is not <strong>the</strong> drift <strong>of</strong><strong>the</strong> metal ions from <strong>the</strong> particles, but <strong>the</strong> <strong>Cu</strong> ions drifting along <strong>the</strong> CMP surface along <strong>the</strong> top <strong>of</strong> <strong>the</strong> trench,and not caused by particles, such as <strong>the</strong> watermarks and organic residues. Figure 24 shows an illustration <strong>of</strong><strong>the</strong> o<strong>the</strong>r <strong>TDDB</strong> <strong>degradation</strong> mechanisms. Cap-SiO polishing completely removes <strong>the</strong> damaged layer14


etween <strong>the</strong> cap-SiO and <strong>the</strong> SiOC. However, a leakage path also exists along <strong>the</strong> CMP surface caused by<strong>the</strong> CMP and post CMP cleaning conditions. It can cause <strong>TDDB</strong> <strong>degradation</strong> compared to <strong>Cu</strong>/SiOCstructures with cap-SiO. To enhance <strong>the</strong> <strong>TDDB</strong> reliability <strong>of</strong> <strong>Cu</strong>/SiOC structures, a rigid interface must be<strong>for</strong>med on defect-free low-k films.CONCLUSIONSWe found that SiOC films damaged by Ta sputtering degraded <strong>the</strong> <strong>TDDB</strong> reliability in <strong>Cu</strong>/SiOCstructures. We also confirmed that damage on <strong>the</strong> top interface between <strong>the</strong> low-k and dielectric diffusionbarriers, such as scratches and corrosion, shortened <strong>the</strong> <strong>TDDB</strong> lifetime. Moreover, we showed that <strong>the</strong><strong>TDDB</strong> lifetime did not depend on <strong>the</strong> SiOC surface defect counts, such as watermarks that degrade <strong>the</strong>device yields. We proposed cap-SiO film deposition to protect <strong>the</strong> SiOC and <strong>the</strong>n removing it during <strong>the</strong>barrier metal CMP to produce higher reliability. Optimizing <strong>the</strong> CMP conditions likely improves <strong>the</strong>line-to-line insulating reliability, such as leakage currents and <strong>TDDB</strong>, because it eliminates <strong>the</strong> CMPsurface leakage path.REFERENCES[1] K.Takeda, et al., Proceedings <strong>of</strong> IEEE International <strong>Reliability</strong> Physics Symposium (IRPS) 1998, P 36.[2] J. Noguchi, et al., Proceedings <strong>of</strong> IEEE International <strong>Reliability</strong> Physics Symposium (IRPS) 2000, P339.[3] J. Noguchi, et al., Proceedings <strong>of</strong> IEEE International <strong>Reliability</strong> Physics Symposium (IRPS) 2001, P355.[4] N. Miura, et al., Proceedings <strong>of</strong> VLSI Multilevel Interconnection Conference (VMIC) 2001, P 143.[5] Wen Wu, et al., Proceedings <strong>of</strong> IEEE International <strong>Reliability</strong> Physics Symposium (IRPS) 2003, P 282.[6] J. Noguchi, et al., Proceedings <strong>of</strong> IEEE International <strong>Reliability</strong> Physics Symposium (IRPS) 2003, P287.[7] N. Konishi, et al., Proceedings <strong>of</strong> Advance Metallization Conference (AMC) 2003, P 127.[8] N. Konishi, et al., Proceedings <strong>of</strong> CMP-MIC Conference 2004, P 532.[9] Y. Yamada, et al., Proceedings <strong>of</strong> CMP-MIC Conference 2004, P 28.15 PacRim-CMP 2004


<strong>Cu</strong>o, <strong>Cu</strong>Six(<strong>Cu</strong> + )<strong>Cu</strong> +Diffusion barrier dielectric<strong>Cu</strong><strong>Cu</strong> drift<strong>Cu</strong>V>0 DielectricGNDBarrier metalbreakdownDielectric•After <strong>the</strong> <strong>Cu</strong>-CMP process, <strong>the</strong> <strong>Cu</strong> surface isoxidized and <strong>Cu</strong>O is <strong>for</strong>med.•In <strong>the</strong> <strong>Cu</strong>O layer, <strong>Cu</strong> is partially ionized andeasily permeates <strong>the</strong> CMP-surface.•This electrically-introduced <strong>Cu</strong> moves along<strong>the</strong> CMP-surface at <strong>the</strong> top <strong>of</strong> trench,resulting in <strong>the</strong> subsequent breakdown.Fig. 1 Illustration <strong>of</strong> <strong>the</strong> dielectric breakdown mechanism [1-3]10 10 0 1 2 3 4 5 6Time to Breakdown (sec)10 810 610 410 210 0T=140 o C50-nm polishL/S = 0.25/0.25 umL/S = 0.14/0.14 um10years (0.2MV/cm)Electric Field Strength (MV/cm)Fig. 2 <strong>TDDB</strong> lifetime <strong>of</strong><strong>the</strong> SiOC/<strong>Cu</strong>structure with <strong>the</strong> Cap-SiOEffective Dielectric Constant, Keff43.63.22.82.421.6Target K eff < 3.0<strong>Low</strong>-k(2.3)/SiC(3.5)<strong>Low</strong>-k(2.5)/SiC(3.5)<strong>Low</strong>-k(2.5)/SiCN(4.5)<strong>Low</strong>-k(3.1)/SiCN(4.5)0 20 40 60 80 100Cap-SiO Thickness (nm)Fig. 3 Simulated results <strong>of</strong> K eff value dependence on <strong>the</strong>cap-SiO film thickness <strong>for</strong> 65-nm nodes16


Photo ResistSiCSiOCSiCNResist pattering and hard masketchingResist patteringPhoto ResistCap-SiOSiOCSiCNResist patteringSiOC etching and photo resiststrippingCap-SiO/SiOC etching andphoto resist strippingCap-SiO/SiOC etching andphoto resist strippingSiC and SiCN etchingSiCN etchingSiCN etching<strong>Cu</strong>/BarrierMetalBarrier metal and <strong>Cu</strong> depositionBarrier metal and <strong>Cu</strong>depositionBarrier metal and <strong>Cu</strong>deposition<strong>Cu</strong> and barrier metal CMP<strong>Cu</strong> and barrier metal CMP(a) Process flow <strong>for</strong> <strong>the</strong> SiOC surface(b) Process flow <strong>for</strong> <strong>the</strong> cap-SiOsurfaceFig. 4 <strong>Cu</strong> damascene process flows<strong>Cu</strong> and barrier metal CMP(c) Process flow <strong>for</strong> <strong>the</strong> SiOC surfaceTable 1 Solutions used as a post-CMP cleaningChemical SolutionContentsOrganicACitric acid baseAcidOrganicCitric acid base withBAcidsurfactantsMetal contamination (atoms/cm 2 )10 1310 1210 11Ta<strong>Cu</strong>Ta on <strong>the</strong> cap-SiOTa on <strong>the</strong> SiOC<strong>Cu</strong> on <strong>the</strong> cap-SiO<strong>Cu</strong> on <strong>the</strong> SiOCCOrganicAlkariTMAH base with surfactantsand chelates10 14 0 10 20 30 40 50 6010 10Amount <strong>of</strong> removal (nm)Fig. 5 Metal contamination as a function <strong>of</strong> ILDremoval17 PacRim-CMP 2004


10 0 0 50 100 150 200Leakage <strong>Cu</strong>rrent (A)10 -210 -410 -610 -810 -1010 -12Cap-SiO/10-nm polishCap-SiO/50-nm polishSiOC/10-nm polishSiOC/50-nm polishApplied Voltage (V)Fig. 6 I-V curves measured on a comb-wiringpatternLeakage <strong>Cu</strong>rrent (A)10 0 25-nm cap-SiO polishCap-SiO just polish25-nm SiOC polish0 50 100 150 210 -210 -410 -610 -810 -1010 -12Applied Voltage (V)Fig. 9 I-V curves measured on a comb-wiringpattern00Leakage <strong>Cu</strong>rrent (A)10 010 -210 -410 -610 2 10 0 10 1 10 2 10 3 10 4Cap-SiO/10-nm polishCap-SiO/50-nm polishSiOC/10-nm polishSiOC/50-nm polishLeakage <strong>Cu</strong>rrent (A)10 010 -210 -410 -610 2 10 0 10 1 10 2 10 325-nm cap-SiO polishCap-SiO just polish25-nm SiOC polish10 -810 -8Bias Stress Time (sec)Fig. 7 Relationship between leakage currents and<strong>the</strong> bias stress time in an electrical field strength<strong>of</strong> 4.5 MV/cmBias Stress Time (sec)Fig. 10 Relationship between leakage currentsand <strong>the</strong> bias stress time in an electrical fieldstrength <strong>of</strong> 3.2 MV/cmTime to Breakdown (sec)10 8 10 7Cap-SiO/10-nm polishCap-SiO/10-nm polish10 6SiOC/10-nm polishSiOC/50-nm polish10 510 410 310 210 1 L/S=0.25/0.25 umT=140 o C10 00 1 2 3 4 5 6Electric Field Strengh (MV/cm)Fig. 8 <strong>TDDB</strong> lifetime <strong>of</strong> <strong>the</strong> SiOC/<strong>Cu</strong> structureTime to Breakdown (sec)10 8 10 725-nm cap-SiO polish10 6Cap-SiO just polish25-nm SiOC polish10 510 410 310 210 1L/S=0.14/0.14 umT=140 o C10 00 1 2 3 4 5 6Electric Field Strength (MV/cm)Fig. 11 <strong>TDDB</strong> lifetime <strong>of</strong> <strong>the</strong> SiOC/<strong>Cu</strong> structure18


Time to Breakdown (sec)10 5 10 4 Cap-SiOSiOC10 310 210 1L/S=0.14/0.14 umT=140 o C3.5 MV/cm10 00 20 40 60 80 100 120Amount <strong>of</strong> removal (nm)Fig. 12 <strong>TDDB</strong> lifetime in an electrical fieldstrength <strong>of</strong> 3.5 MV/cm, depending on <strong>the</strong>amount <strong>of</strong> metal removedTa atomsDamaged layer<strong>Cu</strong>o, <strong>Cu</strong>Six(<strong>Cu</strong> + )<strong>Cu</strong> +Diffusion barrier dielectric<strong>Cu</strong><strong>Cu</strong>V>0 <strong>Cu</strong> driftGNDBarrier metalDielectricbreakdownDielectricTa atoms are spiked into <strong>the</strong> SiOC during sputtering,and a damaged layer <strong>for</strong>ms in <strong>the</strong> SiOC.Electrically-introduced <strong>Cu</strong> moves along <strong>the</strong> CMPsurfaceand also along <strong>the</strong> damaged layer, resultingin a shorter <strong>TDDB</strong> lifetime than that <strong>of</strong> <strong>the</strong> cap-SiOby three figures.However, Ta atoms suppress <strong>the</strong> <strong>Cu</strong> diffusion at <strong>the</strong>CMP-surface, and <strong>the</strong> leakage current between <strong>Cu</strong>wires is reduced.Fig. 13 Illustration <strong>of</strong> <strong>the</strong> dielectric breakdownmechanism <strong>of</strong> <strong>TDDB</strong> <strong>degradation</strong> 60525040302010 118102 10OrganicParticle Scratch VoidWaterUnkownresiduemarkFig. 14 Defect counts on <strong>the</strong> blanket SiOCsurface after <strong>Cu</strong>-CMP19 PacRim-CMP 2004


Leakage <strong>Cu</strong>rrent (A)10 0 Without scratchWith scratch0 50 100 150 20010 -210 -410 -610 -810 -1010 -12Applied Voltage(V)Fig. 15 I-V curves measured on a comb-wiringpatternDefects Counts (counts/wafer)10000425810001006034101Chemical A Chemical B Chemical CCleaning SolutionFig. 18 Defect counts on <strong>the</strong> blanket SiOCsurface after <strong>Cu</strong>-CMPLeakage <strong>Cu</strong>rrent (A)10 2 Without scratch10 0With scratch10 0 10 1 10 2 10 310 -210 -410 -610 -8Bias Stress Time (sec)Fig. 16 Relationship between <strong>the</strong> leakagecurrents and <strong>the</strong> bias stress time in an electricalfield strength <strong>of</strong> 3.2 MV/cmDefects Count s (count s/wafer)1000010001001012789366126129Chemical A Chemical A Chemical B Chemical CCleaning SolutionFig. 19 Surface defect inspection results <strong>of</strong><strong>the</strong> cap-SiO and <strong>the</strong> SiOC after <strong>Cu</strong>-CMPTime to Breakdown (sec)10 8 10 7Without scratchWith scratch10 610 510 410 310 210 1L/S=0.14/0.14 umT=140 10 00 1 2 3 4 5 6Electric Field Strength (MV/cm)Fig. 17 <strong>TDDB</strong> lifetime <strong>of</strong> <strong>the</strong> SiOC/<strong>Cu</strong>structureTime to Breakdown (sec)10 8 10 7Cap-SiO/Chemical ACap-SiO/Chemical B10 6Cap-SiO/Chemical CSiOC/Chemical BSiOC/Chemical A10 5SiOC/Chemical C10 410 310 210 1 L/S=0.25/0.25 umT=140 10 00 1 2 3 4 5 6Electric Field Strength (MV/cm)Fig. 20 <strong>TDDB</strong> lifetime <strong>of</strong> <strong>the</strong> SiOC/<strong>Cu</strong> structure20


after <strong>Cu</strong>-CMP after additional H 2 -annealingand NH 3 -plasma treatmentFig. 21 The organic particle SEM images <strong>of</strong><strong>the</strong> sample in fig. 18 using Chemical CParrticle count (/124 cm2)300250corrosion250200150<strong>Cu</strong>SiOC100Chemical B50530Particle Void CorrosionClassificationFig. 22 Surface defect inspection results <strong>of</strong><strong>the</strong> SiOC after <strong>Cu</strong>-CMP10 8 0 1 2 3 4 5 6Time to Breakdown (sec)10 710 610 510 410 310 210 110 0With <strong>Cu</strong> corrosionOptimized cleaning conditionL/S=0.14/0.14 umT=140 o CElectric Field Strength (MV/cm)Fig. 23 <strong>TDDB</strong> lifetime <strong>of</strong> <strong>the</strong> SiOC/<strong>Cu</strong> structure<strong>Cu</strong>o, <strong>Cu</strong>Six(<strong>Cu</strong> + )<strong>Cu</strong><strong>Cu</strong> +Diffusion barrier dielectric<strong>Cu</strong>V>0 <strong>Cu</strong> driftGNDBarrier metalDielectricbreakdownDamaged layerDielectricThe leakage paths are along both <strong>the</strong> CMP surfaceand <strong>the</strong> damaged SiOC layer. It causes <strong>the</strong> <strong>TDDB</strong><strong>degradation</strong> and is compared to <strong>the</strong> <strong>Cu</strong>/SiOCstructure with <strong>the</strong> cap-SiO.However, <strong>the</strong> damage caused by <strong>the</strong> polishing isconsidered to be less serious than that caused bysputtering, resulting in an improvement in <strong>the</strong> <strong>TDDB</strong>characteristics <strong>of</strong> two figures.Fig. 24 Illustration <strong>of</strong> <strong>the</strong> dielectric breakdownmechanism <strong>of</strong> a <strong>TDDB</strong> <strong>degradation</strong>21 PacRim-CMP 2004

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