serial communication controller (scc ™ sdlc mode of operation - Clips

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Application NoteSerial Communication Controller (SCC ): SDLC Mode of OperationSDLC TRANSMITFigure 1 shows the time chart for the transmitting SDLCpacket under interrupt control. When transmit is engaged,data is shifted out of the transmitter on the falling edge ofthe transmit clock. Transitions on the diagram are showncoincident with TxCLK fall — in actual practice, there aresome associated delay times (which are specified in thedata sheet).TxCLKTx DataOpening Flag Data 81H Data 42H Data 0FFH Data 42H CRC 0E013H Closing Flag Note 11Note 1Note 9/INTNote 3Note 6➘➘➘Note 4Note 5Note 7Note 8Note 10➘➘➘Note 2Figure 1. Typical SDLC Trsnsmission Sequence6-94
Application NoteSerial Communication Controller (SCC ): SDLC Mode of OperationNotes on Figure 1:1. The SCC has two possible idle states, Mark idle(contiguous logic 1) or Flag idle (repeating flag pattern7EH). In this figure, the SCC has to be switched to flagidle in order to send the opening flag of the frame.Care must be taken not to put the first data byte (in thiscase, address 81H) into the Transmit Buffer too soonafter the switchover from Mark idle to Flag idle hasbeen made; otherwise, the data may be loaded intothe Transmit Shift Register before the flag is loaded.To ensure that this cannot happen, a delay must beexecuted before the first data byte is put into thebuffer. The delay time is dependent on the data rateand a safe minimum duration is 8 bit-times.2. Transmit Buffer Empty Interrupt for 81H. At this pointthe data has just been transferred to the Transmit ShiftRegister and data 42H is written to the TransmitBuffer.3. The time between the first data byte being transferredto the Shift Register and the first bit appearing at theTxD pin is always six bit-times.4. Transmit Buffer Empty Interrupt for data 42H. Data0FFH is written to the Transmit Buffer at this point.5. Transmit Buffer Empty Interrupt for data 0FFH. Data42H is written to the Transmit Buffer at this point.6. The time between interrupts depends on the datacharacter length and the number of zero insertions inthe character. For 8 bits/character it can vary between8 and 10 bit-times. The particular instance showncorresponds to the single zero insertion when the byte0FFH is transmitted.7. Transmit Buffer Empty Interrupt for data 42H. Sincethis is the last byte to be transmitted, the ResetTransmit Interrupt Pending command is issuedinstead of writing another byte to the Transmit Buffer.8. Transmitter Underrun/EOM Interrupt. This occurswhen both the Transmit Shift Register and theTransmit Buffer are empty. It is an External/Statusinterrupt. The data sent when this occurs issummarized in the table below:1Abort/Flag on Tx Underrun/EOM Latch DataUnderrun bit State when Underrun occurs Sent0 Reset CRC and Flag1 Reset Abort and Flag0 Set Flags1 Set Flags9. The transmitted CRC is 16 bits long provided thatthere are no zero insertions. In theory it could be aslong as 19 bits.10. The last interrupt generated occurs after the CRC isshifted out of the transmitter and a flag is loaded to besent. It is a Transmit Buffer Empty Interrupt. If anotherframe is to be transmitted, the first character of thenext frame can be loaded. The two frames will then beseparated by a single flag (Back-to-back frame).11. If the SCC is set up for mark on idle and a newcharacter is not loaded when the last interrupt occurs,only a single flag is sent.6-95
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serial communication controller (scc ™ sdlc mode of operation - Clips

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