UM10139

Philips SemiconductorsVolume 1UM10139Chapter 1: Introductory information1.6 ARM7TDMI-S processorPeripheral Bus (VPB, a compatible superset of ARM’s AMBA Advanced Peripheral Bus)for connection to on-chip peripheral functions. The LPC2141/24/6/8 configures theARM7TDMI-S processor in little-endian byte order.AHB peripherals are allocated a 2 megabyte range of addresses at the very top of the4 gigabyte ARM memory space. Each AHB peripheral is allocated a 16 kB address spacewithin the AHB address space. LPC2141/2/4/6/8 peripheral functions (other than theinterrupt controller) are connected to the VPB bus. The AHB to VPB bridge interfaces theVPB bus to the AHB bus. VPB peripherals are also allocated a 2 megabyte range ofaddresses, beginning at the 3.5 gigabyte address point. Each VPB peripheral is allocateda 16 kB address space within the VPB address space.The connection of on-chip peripherals to device pins is controlled by a Pin Connect Block(see chapter "Pin Connect Block" on page 75). This must be configured by software to fitspecific application requirements for the use of peripheral functions and pins.The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers highperformance and very low power consumption. The ARM architecture is based onReduced Instruction Set Computer (RISC) principles, and the instruction set and relateddecode mechanism are much simpler than those of microprogrammed ComplexInstruction Set Computers. This simplicity results in a high instruction throughput andimpressive real-time interrupt response from a small and cost-effective processor core.Pipeline techniques are employed so that all parts of the processing and memory systemscan operate continuously. Typically, while one instruction is being executed, its successoris being decoded, and a third instruction is being fetched from memory.The ARM7TDMI-S processor also employs a unique architectural strategy known asTHUMB, which makes it ideally suited to high-volume applications with memoryrestrictions, or applications where code density is an issue.The key idea behind THUMB is that of a super-reduced instruction set. Essentially, theARM7TDMI-S processor has two instruction sets:• The standard 32-bit ARM instruction set.• A 16-bit THUMB instruction set.The THUMB set’s 16-bit instruction length allows it to approach twice the density ofstandard ARM code while retaining most of the ARM’s performance advantage over atraditional 16-bit processor using 16-bit registers. This is possible because THUMB codeoperates on the same 32-bit register set as ARM code.THUMB code is able to provide up to 65% of the code size of ARM, and 160% of theperformance of an equivalent ARM processor connected to a 16-bit memory system.The ARM7TDMI-S processor is described in detail in the ARM7TDMI-S Datasheet thatcan be found on official ARM website.© Koninklijke Philips Electronics N.V. 2005. All rights reserved.User manual Rev. 01 — 15 August 2005 5