FDC6320C Dual N & P Channel Digital FET

October 1997
FDC6320C
Dual N & P Channel , Digital FET
General Description
These dual N & P Channel logic level enhancement mode field
effec transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance.
The device is an improved design especially for low voltage
applications as a replacement for bipolar digital transistors in
load switching applications. Since bias resistors are not
required, this dual digital FET can replace several digital
transistors with difference bias resistors.
Features
N-Ch 25 V, 0.22 A, R DS(ON)
= 5 Ω @ V GS
= 2.7 V.
P-Ch 25 V, -0.12 A, R DS(ON)
= 13 Ω @ V GS
= -2.7 V.
Very low level gate drive requirements allowing direct
operation in 3 V circuits. V GS(th)
< 1.5 V.
Gate-Source Zener for ESD ruggedness.
>6kV Human Body Model
Replace NPN & PNP digital transistors.
SOT-23 SuperSOT TM -6 SuperSOT TM -8 SO-8
SOT-223
SOIC-16
4
3
5
2
6
1
Absolute Maximum Ratings
T A
= 25 o C unless other wise noted
Symbol Parameter N-Channel P-Channel Units
V DSS
, V CC
Drain-Source Voltage, Power Supply Voltage 25 -25 V
V GSS
, V IN
Gate-Source Voltage, 8 -8 V
I D
, I O
Drain/Output Current - Continuous 0.22 -0.12 A
- Pulsed 0.5 -0.5
P D
Maximum Power Dissipation (Note 1a) 0.9 W
(Note 1b) 0.7
T J
,T STG
Operating and Storage Tempature Ranger -55 to 150 °C
ESD
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm)
THERMAL CHARACTERISTICS
6 kV
R θJA
Thermal Resistance, Junction-to-Ambient (Note 1a) 140 °C/W
R θJC
Thermal Resistance, Junction-to-Case (Note 1) 60 °C/W
© 1997 Fairchild Semiconductor Corporation
FDC6320C.Rev C

DMOS Electrical Characteristics (T A
= 25 O C unless otherwise noted )
Symbol Parameter Conditions Type Min Typ Max Units
OFF CHARACTERISTICS
BV DSS
Drain-Source Breakdown Voltage V GS
= 0 V, I D
= 250 µA N-Ch 25 V
V GS
= 0 V, I D
= -250 µA P-Ch -25
∆BV DSS
/∆T J
Breakdown Voltage Temp. Coefficient I D
= 250 µA, Referenced to 25 o C N-Ch 25 mV / o C
I D
= -250 µA, Referenced to 25 o C P-Ch -20
I DSS
Zero Gate Voltage Drain Current V DS
= 20 V, V GS
= 0 V, N-Ch 1 µA
T J
= 55°C 10
I DSS
Zero Gate Voltage Drain Current V DS
=-20 V, V GS
= 0 V, P-Ch -1 µA
T J
= 55°C -10
I GSS
Gate - Body Leakage Current V GS
= 8 V, V DS
= 0 V N-Ch 100 nA
ON CHARACTERISTICS (Note 2)
V GS
= -8 V, V DS
= 0 V P-Ch -100 nA
∆V GS(th)
/∆T J
Gate Threshold Voltage Temp. Coefficient I D
= 250 µA, Referenced to 25 o C N-Ch -2.1 mV / o C
I D
= -250 µA, Referenced to 25 o C P-Ch 1.9
V GS(th)
Gate Threshold Voltage V DS
= V GS
, I D
= 250 µA N-Ch 0.65 0.85 1.5 V
V DS
= V GS
, I D
= -250 µA P-Ch -0.65 -1 -1.5
R DS(ON)
Static Drain-Source On-Resistance V GS
= 2.7 V, I D
= 0.2 A N-Ch 3.8 5 Ω
T J
=125°C 6.3 9
V GS
= 4.5 V, I D
= 0.4 A 3.1 4
V GS
= -2.7 V, I D
= -0.05 A P-Ch 10.6 13
T J
=125°C 15 21
V GS
= -4.5 V, I D
= -0.2 A 7.9 10
I D(ON)
On-State Drain Current V GS
= 2.7 V, V DS
= 5 V N-Ch 0.2 A
V GS
= -2.7 V, V DS
= -5 V P-Ch -0.05
g FS
Forward Transconductance V DS
= 5 V, I D
= 0.4 A N-Ch 0.2 S
DYNAMIC CHARACTERISTICS
V DS
= -5 V, I D
= -0.2 A P-Ch 0.135
C iss
Input Capacitance N-Channel
N-Ch 9.5 pF
V DS
= 10 V, V GS
= 0 V,
f = 1.0 MHz
P-Ch 11
C oss
Output Capacitance N-Ch 6 pF
P-Channel
P-Ch 7
V DS
= -10 V, V GS
= 0 V,
C rss
Reverse Transfer Capacitance f = 1.0 MHz
N-Ch 1.3 pF
P-Ch 1.4
FDC6320C.Rev C

DMOS Electrical Characteristics (T A
= 25 O C unless otherwise noted )
Symbol Parameter Conditions Type Min Typ Max Units
SWITCHING CHARACTERISTICS (Note 2)
t D(on)
Turn - On Delay Time N-Channel N-Ch 5 11 nS
V DD
= 6 V, I D
= 0.5 A, P-Ch 6 12
t r
Turn - On Rise Time V GS
= 4.5 V, R GEN
= 50 Ω N-Ch 4.5 10 nS
P-Ch 6 12
t D(off)
Turn - Off Delay Time P-Channel N-Ch 4 10 nS
V DD
= -6 V, I D
= -0.5 A, P-Ch 7.4 15
t f
Turn - Off Fall Time V GEN
= -4.5 V, R GEN
= 50 Ω N-Ch 3.2 8 nS
P-Ch 4 10
Q g
Total Gate Charge N-Channel
N-Ch 0.29 0.4 nC
V DS
= 5 V,
I D
= 0.2 A, V GS
= 4.5 V
P-Ch 0.23 0.32
Q gs
Gate-Source Charge N-Ch 0.105 nC
P-Channel
P-Ch 0.12
V DS
= -5 V,
Q gd
Gate-Drain Charge I D
= -0.2A, V GS
= -4.5 V
N-Ch 0.045 nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
P-Ch 0.03
I S
Maximum Continuous Drain-Source Diode Forward Current N-Ch 0.5 A
P-Ch -0.5
V SD
Drain-Source Diode Forward Voltage V GS
= 0 V, I S
= 0.5 A (Note 2) N-Ch 0.97 1.3 V
Notes:
V GS
= 0 V, I S
= -0.5 A (Note 2) P-Ch -1 -1.3
1. R θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R θJC
is guaranteed by
design while R θCA
is determined by the user's board design.
Typical R θJA
using the board layouts shown below on FR-4 PCB in a still air environment:
a. 140 O C/W on a 0.125 in 2 pad of
2oz copper.
b. 180 O C/W on a 0.005 in 2 of pad
of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
FDC6320C.Rev C

S
D
Typical Electrical Characteristics: N-Channel
I , DRAIN-SOURCE CURRENT (A)
D
0.5
0.4
0.3
0.2
0.1
V = 4.5V
GS
4.0
3.5
3.0
0
0 0.5 1 1.5 2 2.5 3
V , DRAIN-SOURCE VOLTAGE (V)
DS
2.7
2.5
Figure 1. On-Region Characteristics.
2.0
1.5
R DS(on) , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
1.4
1.2
1
0.8
V = 2.0V GS
2.5
2.7
0.6
0 0.1 0.2 0.3 0.4 0.5
3.0
3.5
I
D
, DRAIN CURRENT (A)
4.0
4.5
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
R DS(ON) , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
1.8
1.6
1.4
1.2
1
0.8
I D = 0.2A
V GS = 2.7 V
0.6
-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
R DS(on) , ON-RESISTANCE (OHM)
15
12
9
6
3
25°C
125°C
0
2 2.5 3 3.5 4
V , GATE TO SOURCE VOLTAGE (V)
GS
I D = 0.2A
Figure 3. On-Resistance Variation
with Temperature.
Figure 4. On Resistance Variation with
Gate-To- Source Voltage.
I , DRAIN CURRENT (A)
0.2
0.15
0.1
0.05
V = 5.0V
DS
T = -55°C
J
25°C
125°C
I , REVERSE DRAIN CURRENT (A)
0.5
0.2
0.1
0.01
0.001
V GS = 0V
T = 125°C J
25°C
-55°C
0
0.5 1 1.5 2 2.5
V , GATE TO SOURCE VOLTAGE (V)
GS
0.0001
0.2 0.4 0.6 0.8 1 1.2
V , BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage
Variation with Source Current and
Temperature.
FDC6320C.Rev C

Typical Electrical Characteristics: N-Channel (continued)
CAPACITANCE (pF)
30
20
10
5
3
2
f = 1 MHz
V GS = 0V
1
0.1 0.5 1 2 5 10 25
V , DRAIN TO SOURCE VOLTAGE (V)
DS
C iss
C oss
C rss
V GS , GATE-SOURCE VOLTAGE (V)
5
4
3
2
1
I = 0.2A D V = 5.0V
DS
0
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35
Q
g
, GATE CHARGE (nC)
Figure 7. Capacitance Characteristics.
Figure 8. Gate Charge Characteristics.
I , DRAIN CURRENT (A)
D
0.8
0.5
0.2
0.1
0.05
0.02
RDS(ON) LIMIT
V GS = 2.7V
SINGLE PULSE
R θJA =See note 1b
T A = 25°C
0.01
0.5 1 2 5 10 20 40
DC
1s
100ms
V , DRAI N-SOURCE VOLTAGE (V)
DS
10ms
1ms
POWER (W)
5
4
3
2
1
0
0.01 0.1 1 10 100 300
SINGLE PULSE TIME (SEC)
SINGLE PULSE
R θJA =See note 1b
T A = 25°C
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power
Dissipation.
FDC6320C.Rev C

S
D
Typical Electrical Characteristics: P-Channel
-I , DRAIN-SOURCE CURRENT (A)
D
0.2
0.15
0.1
0.05
V GS = -5.0V
-4.5
-4.0
-3.5
-3.0
-2.7
-2.5
0
0 1 2 3 4
-V DS , DRAIN-SOURCE VOLTAGE (V)
Figure 11. On-Region Characteristics.
-2.0
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
2
1.5
1
V GS= -2.0 V
-2.5
-2.7
-3.0
0.5
0 0.05 0.1 0.15 0.2
-I D , DRAIN CURRENT (A)
-4.0
-3.5
-4.5
Figure 12. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
25
R DS(ON) , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
1.4
1.2
1
0.8
I D = -0.05A
V GS = -2.7V
,DRAIN-SOURCE ON-RESISTANCE
20
15
10
5
T = 25°C
A
125 °C
I D = -0.05A
0.6
-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
R DS(ON)
0
0 1 2 3 4 5 6 7 8
-V GS ,GATE TO SOURCE VOLTAGE (V)
Figure 13. On-Resistance Variation
with Temperature.
Figure 14. On Resistance Variation with
Gate-To- Source Voltage.
I , DRAIN CURRENT (A)
-1
-0.75
-0.5
-0.25
V = -5V DS
T = -55°C
J
25°C
125°C
-I , REVERSE DRAIN CURRENT (A)
0.5
0.1
0.01
V GS = 0V
T = 125°C J
25°C
-55°C
0
-0.5
-1
-1.5
-2
-2.5
V , GATE TO SOURCE VOLTAGE (V)
GS
-3
0.0001
0 0.2 0.4 0.6 0.8 1 1.2
-V , BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 15. Transfer Characteristics.
Figure 16. Body Diode Forward Voltage
Variation with Source Current and
Temperature.
FDC6320C.Rev C

Typical Electrical Characteristics: P-Channel (continued)
-V GS , GATE-SOURCE VOLTAGE (V)
8
6
4
2
I D = -0.2A
V = -5V DS
0
0 0.1 0.2 0.3 0.4 0.5
Q g , GATE CHARGE (nC)
-15
-10
-I , DRAIN CURRENT (A)
D
0.8
0.5
0.2
0.1
RDS(ON) LIMIT
0.05
V GS = -2.7V
SINGLE PULSE
0.02 R θJA=See Note 1b
T A= 25°C
0.01
1 2 5 10 20 40
DC
1s
100ms
- V , DRAIN-SOURCE VOLTAGE (V)
DS
1ms
10ms
Figure 17. Gate Charge Characteristics.
Figure 18. Maximum Safe Operating Area.
CAPACITANCE (pF)
25
15
10
5
3
2
f = 1 MHz
V GS = 0 V
1
0.1 0.3 1 2 5 10 15 25
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
C iss
C oss
C rss
POWER (W)
5
4
3
2
1
0
0.01 0.1 1 10 100 300
SINGLE PULSE TIME (SEC)
SINGLE PULSE
R θJA =See note 1b
T A = 25°C
Figure 19. Capacitance Characteristics.
Figure 20. Single Pulse Maximum Power
Dissipation.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
0.5
0.2
0.1
0.05
0.02
D = 0.5
0.2
0.1
0.05
0.02
0.01
Single Pulse
0.01
0.0001 0.001 0.01 0.1 1 10 100 300
t 1, TIME (sec)
P(pk)
R θJA (t) = r(t) * R θJA
R = See Note 1b
θJA
t 1 t 2
T J - T = P * R (t)
A θJA
Duty Cycle, D = t 1/ t 2
Figure 21. Transient Thermal Response Curve.
Note: Thermal characterization performed using the conditions described in note 1b.Transient thermal
response will change depending on the circuit board design.
FDC6320C.Rev C

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CoolFET
CROSSVOLT
DenseTrench
DOME
EcoSPARK
E 2 CMOS TM
EnSigna TM
FACT
FACT Quiet Series
STAR*POWER is used under license
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NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
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RIGHTS, NOR THE RIGHTS OF OTHERS.
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
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systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
®
FAST
FASTr
FRFET
GlobalOptoisolator
GTO
HiSeC
ISOPLANAR
LittleFET
MicroFET
MicroPak
MICROWIRE
OPTOLOGIC
OPTOPLANAR
PACMAN
POP
Power247
PowerTrench ®
QFET
QS
QT Optoelectronics
Quiet Series
SILENT SWITCHER
®
SMART START
STAR*POWER
Stealth
SuperSOT-3
SuperSOT-6
SuperSOT-8
SyncFET
TinyLogic
TruTranslation
UHC
UltraFET
®
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
Datasheet Identification Product Status Definition
VCX
Advance Information
Preliminary
No Identification Needed
Formative or
In Design
First Production
Full Production
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4