Annual report 2000 - Europractice

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Annual report 2000 - Europractice

EUROPRACTICE IC service

The right cocktail of ASIC Services

EUROPRACTICE IC Service offers you a proven route to ASICs that features:

• Low-cost ASIC prototyping

• Flexible access to silicon capacity for small and medium volume production quantities

• Partnerships with leading world-class foundries

• Wide choice of IC technologies

• Distribution and full support of high-quality cell libraries and design kits for the most popular

CAD tools

• Netlist-to-Layout service for deep-submicron technologies

• Front-end ASIC design through Alliance Partners

Industry is rapidly discovering the benefits of using the EUROPRACTICE IC service to help bring

new product designs to market quickly and cost-effectively. The EUROPRACTICE ASIC route supports

especially those companies who don’t need always the full range of services or high production

volumes. Those companies will gain from the flexible access to silicon prototype and production

capacity at leading foundries, design services, high quality support and manufacturing

expertise that includes IC manufacturing, packaging and test. This you can get all from EURO-

PRACTICE IC service, a service that is already established for more than 5 years in the market.

The EUROPRACTICE IC Services are offered by the following centers :

• IMEC, Leuven (Belgium)

• Fraunhofer-Institut, Integrierte Schaltungen (FhG-IIS), Erlangen (Germany)

• Nordic VLSI ASA, Trondheim (Norway)

• Delta, Hoersholm (Denmark)

The EUROPRACTICE initiative

EUROPRACTICE was launched by the European

Commission (DGIII) in October 1995 to help companies

improve their competitive position in world markets

by adopting ASIC, Multi-Chip Module (MCM) or

Microsystems solutions in the products they manufacture.

The programme helps reduce the perceived risks

and costs associated with these technologies by offering

potential users a range of services, including initial advice

and ongoing support, reduced entry costs and a clear

route to chip manufacture and product supply.

The European Commission further funds the EURO-

PRACTICE IC Service under the IST programme.


Foreword

The EUROPRACTICE IC Service has got its place into the market and is recognised as a high-quality service for

ASIC prototyping and small to medium volume production.

The IC Service is offered by a consortium of four partners, namely IMEC (Belgium), FhG-IIS (Germany), Nordic

VLSI (Norway) and DELTA (Denmark).

The year 2000 was a special year indeed for everybody, also for the IC service.

The IC Service has been developed to a real one-stop shop service. You just have to interface with only one of the

partners in order to receive the full range of services. Especially if you only need ASIC production from time to time

we offer you a flexible but fully supported solution.

Flexibility is the key word. That is why we offer a wide range of technologies ranging from 2 micron to 0.13 micron

covering CMOS, BiCMOS, Rad Hard BiCMOS, High voltage and SiGe. That is also why we distribute and support a

large set of high-quality cell libraries and design kits. That is also why we offer the full range of packaging solutions

(up to BGA600). Flexibility is needed to offer you the best choice at the lowest cost.

The ITRS roadmap shows a tremendous evolution in ASIC technologies, a new generation every 3 years and even accelerated.

The costs for a mask set and prototype engineering run for the newest technologies is ever increasing to

more than 500,000 euro. In order to offer “low-cost” prototyping and to secure access to the very deep submicron

technologies, partnerships with the leading foundries need to be established.

We are proud to announce that we have been able to extend the current agreement with UMC, one of the leading

foundries world-wide, and Virtual Silicon, one of the leading library (eSilicon libraries) vendors world-wide, in order

to offer a fully supported prototyping and volume production service in 0.18 and 0.13 micron CMOS technologies.

As such EUROPRACTICE is the first MPW service in the world offering access to 0.13 micron.

In the year 2000 :

• 473 ASIC designs have been prototyped on MPW runs, 274 for educational purposes and 199 for industrial purposes.

• the small volume service activity increased substantially : 117 projects have been booked from customers from 19

countries and 11,150,000 components have to be delivered. This shows that more customers are aware of the

small volume possibilities. The number of projects increased by 20%, but the number of components increased by

about 400%.

• the customer base increased again with customers from Canada, China and Egypt. Customers accessing the IC Service

are from 40 different countries (see list on the last pages), which proves that the service is known world-wide.

• our Alliance Partner Network extended to 19 partners.

Having nice results is only possible by offering a high quality service that includes a large technology portfolio and a

good support service. It is our goal to improve the service by introducing new technologies and new solutions to you.

I hope we have the opportunity to meet you in the future and to discuss you future projects.

Dr. C. Das

Chairman EUROPRACTICE IC Service

IMEC (Belgium)

1


2

Table of contents

Foreword 1

ASIC prototypes and small volumes : A total solution 3

ASIC design services 3

Low cost IC prototyping 4

EUROPRACTICE offers deep submicron layout service 7

EUROPRACTICE: your one-stop partner for low volume ICs 8

Flexible interfaces to prototyping 8

Fully flexible solutions for production 9

Results 11

MPW prototyping service 11

Small volume projects 13

Examples of small volume ASIC projects 14

An ASIC for capacitive ceramic pressure sensors 14

A CMOS readout circuit for thin film pyroelectric array detectors 15

A CMOS readout circuit for silicon matrix detector for a cosmic ray spectrometer 16

Pipeline current mapper 17

ASIC for measuring capacitive sensors 18

Multichannel speech transmission circuit for use in local communication systems 19

ASIC for the intelligent house 20

ASIC for the electronic toll collection 21

List of customers 22


ASIC prototypes

and small volumes :

A total solution

EUROPRACTICE provides semiconductor

and system companies

with a total ASIC solution including

flexible access to silicon prototyping

and production at leading

foundries, integrated design flows

with cell libraries and support,

deep submicron netlist-to-layout

services, packaging and test. Customers

can participate to multiproject

and dedicated fabrication runs

for logic and mixed-signal processes.

In 2001, the service includes

access to 0.25, 0.18 and 0.13 micron

processes.

ASIC design services

EUROPRACTICE has teamed up

with several design houses, mainly

in Europe, who are helping us in

our objective to offer a complete

solution from product concept to

mass production of ASICs by

handling the design phase.

Through the EUROPRACTICE Alliance

Partners you have access to:

CMOS image sensor with 6.6 megapixels of digital photography (By courtesy of IMEC).

• design assistance in various specialised

topics such as low power,

RF, high voltage etc. depending

on the experience of the design

houses

• design interfaces at different levels,

depending on the capabilities

of the customers, ranging from

turn key design to layout generation

IC SERVICE ALLIANCE PARTNER

3


Low cost IC prototyping

The cost of producing a new ASIC

for a dedicated application within a

small market can be high, if directly

produced by a commercial foundry.

This is largely due to the

4

NRE (Non-Recurring Engineering)

overheads associated with design,

manufacturing and test.

EUROPRACTICE has reduced the

NRE, especially for ASIC prototyping,

by two techniques:

(i) Multi Project Wafer Runs or

(ii) Multi Level Masks.

Multi Project Wafer Runs

By combining several designs from

different customers onto one mask

set and prototype run, known as

Multi Project Wafer (MPW) runs,

the high NRE costs of a mask set is

shared among the participating

customers.

Fabrication of prototypes can thus

be as low as 5% to 10% of the cost

of a full prototyping wafer run. A

limited number of tested or untested

ASIC prototypes, typically

10-20, are delivered to the customer

for evaluation, either as

naked dies or as encapsulated devices.

Only prototypes from fully

qualified wafers are taken to ensure

that the chips delivered

will function “right first

time”.

In order to achieve

this, extensive Design

Rule and Electrical

Rule Checkings

are performed

on all designs submitted

to the Service.

EUROPRACTICE is

organising about 130 MPW runs

per year in various technologies.

Multi Level Mask

Single User Runs

Another technique to reduce the

high mask costs is called Multi

Level Mask (MLM). With this

technique the available mask area

(20 mm x 20 mm field) is typically

divided in four quadrants (4L/R :

four layer per reticle) whereby

each quadrant is filled with one design

layer. As an example : one

mask can contain four layers such

as nwell, poly, ndiff and active. The

total number of masks is thus reduced

by a factor of four. By adapting

the lithographical procedure it

is possible to use one mask four

times for the different layers by

using the appropriate quadrants.

Using this technique the mask

costs can be reduced by about

60%.

The advantages of using MLM single

user runs are : (i) lower mask

costs, (ii) can be started any date

and not restricted to scheduled

MPW runs, (iii) single user and

(iv) customer receives minimal a

few wafers, so a few hundreds of

prototypes.

This technique is preferred over

MPW runs when the chip area becomes

large and when the customer

wants to get a higher number

of prototypes or preserie.

When the prototypes are successful,

this mask set can be used


Design kits

Designers need the necessary information (design rules, electrical

parameters, cell library, etc.) of the chosen technology before they

can start the design phase. All this information is put together by

the foundry in the so-called ‘design kit’. EUROPRACTICE distributes

more than 55 different design kits and cell libraries of the supported

technologies for most popular CAD tools (Cadence, Mentor

Graphics, Synopsys, Tanner, etc.) on CD-ROM. Customers can

have a copy of the CD-ROM with the cell libraries & design kits by

signing a non-disclosure agreement with EUROPRACTICE.

under certain conditions for low

volume production.

This technique is only available for

technologies from Alcatal Microelectronics.

Prototype testing and

encapsulation

In most of the cases our customers

test their ASIC samples themselves.

But for those who do not have this

possibility we offer prototype testing.

In order to set up a test solution,

we need the test vectors. In

order to make any electrical tests a

test solution has to be established

and information such as test vector

set for functionality, foundry information

for parametric test, pin out

information, critical timing parameters

and application specific test

set-ups has to be provided.

With this information the electrical

test solution can be implemented.

EUROPRACTICE ASIC service

offers encapsulated prototypes.

The packaging is done by industrial

assembly houses and the range of

prototype packages includes DIL,

SOIC, CLCC, JLCC, PGA, BGA,

CQFP, etc. For specific requirements,

a solution will be found.

Failure analysis

In case the prototype does not

meet the electrical specification or

is not functionally correct, the failure

has to be determined. The use

of ATE, change in test vectors, E-

beam test and Focused Ion Beam

are examples of techniques to detect

failures.

Debug and repair

It is important that some small design

errors can be corrected in

order to get working prototypes for

demonstration in time or to avoid

5


6

(By courtesy of FHG-IIS).

fault collapse in the debug phase.

Silicon repair normally involves cut

and deposition of metallic connections

on a small area.

Prototype qualification

Typically, 10 devices are electrically

measured and all parameters (parametric,

functional and dynamic)

are datalogged. This is done at

three temperatures in order to

document correct working function

over the specified temperature

area.

In critical areas additional life tests

have to be performed in order to

give clearance to production. In

Technologies

For 2001, EUROPRACTICE has extended its technology portfolio.

Several deep submicron technologies such as 0.18µ and 0.13µ

CMOS have been added.

Currently customers can have access to prototype and production

fabrication in the following technologies :

• Alcatel Microelectronics 2µ CMOS 2M/2P

• Alcatel Microelectronics 0.7µ C07M-D 2M/1P

• Alcatel Microelectronics 0.7µ C07M-A 2M/1P/PdiffC/HR

• Alcatel Microelectronics 0.7µ C07M-I2T100 100V

• Alcatel Microelectronics 0.5µ C05M-D 3M

• Alcatel Microelectronics 0.5µ C05M-A 3M/2P/HR

• Alcatel Microelectronics 2µ HBIMOS 80V 2M/1P/HR

• Alcatel Microelectronics 1.2µ HBIMOSF 80V 2M/1P/HR

• Atmel Wireless & µC D-MILL BiCMOS 10 MRad

• Austria Mikro Systeme 0.8µ CMOS CYE 2M/2P

• Austria Mikro Systeme 0.8µ CMOS CXQ 2M/2P/HR

• Austria Mikro Systeme 0.8µ CMOS CXZ 2M/2P/HR 50V

• Austria Mikro Systeme 0.8µ BiCMOS BYQ 2M/2P/HR

• Austria Mikro Systeme 0.8µ SiGe BYR 2M/2P/HR

• Austria Mikro Systeme 0.6µ CMOS CUQ 2M/2P/HR

• Austria Mikro Systeme 0.6µ CMOS CUP 3M/2P/HR

• Austria Mikro Systeme 0.35µ CMOS CSI 3M/2P/5V IO

• ESM 0.5µ CMOS D 3M

• ESM 0.5µ CMOS A 3M

• ESM 0.5µ BiCMOS 3M

• UMC 0.25µ CMOS D 1P5M (2.5V/3.3V)

• UMC 0.25µ CMOS A 1P5M MMC/RFCMOS (2.5V/3.3V)

• UMC 0.18µ CMOS D 1P6M (1.8V/3.3V)

• UMC 0.18µ CMOS A 1P6M MMC/RFCMOS (1.8V/3.3V)

• UMC 0.13µ CMOS D 1P8M (1.2V/3.3V)

• UMC 0.13µ CMOS A 1P8M MMC/RFCMOS (1.2V/3.3V)

automotive, medico, MIL and

space applications it is necessary to

perform additional environmental

tests like temperature cycling,

burn-in, or other mechanical stress

tests to document silicon reliability

before acceptance to enter the production

phase.


EUROPRACTICE

offers deep submicron layout service

Deep submicron layout generation

is a difficult task. Lots of effects are

to be considered and can cause serious

problems for your circuits:

clock-skew, latency of interacting

clocks, IR-drop on power-distribution,

electro-migration problems,

delays caused by the interconnect,

handling 5 or more layers of metal

in the back-end.

EUROPRACTICE IC Service is

providing a deep submicron layout

service, starting from gate-level

netlist. The service includes clocktree

synthesis, and provides information

allowing the circuit designers

to verify accurate post-layout

timing using timing simulation or

Layout of 29 Kgates circuit with

11 RAM blocks in Alcatel Microelectronics

0.35µ CMOS (5-metallayers)

- 20 mm 2 (By courtesy of IMEC).

static-timing analysis. All information

is provided to automatically

update the circuit in an incremental

way, using in-place optimisation

in the synthesis tool. This can involve

buffer insertion, cell replacement,

and local re-synthesis. Placement-iterations

typically are done

within 24 hours, providing complete

feedback to redo all verifications.

With the Avant! tools, Europractice

addresses all of the above

mentioned problems.

Many circuits have been taped out

successfully, up to 6 metal-layer

processes, both for in-house developed

Systems-On-a-Chip, as for

ASICs developed by third party design

houses, research institutes and

universities. Several of the circuits

have been systems with analog full

custom blocks, combined with

other macro’s and memories. Procedures

are in place to offer standard

I/O configurations, staggered

I/O configurations, and configurations

with the bonding-pads equal-

Layout of a 130 Kgates circuit in UMC

0.18µ CMOS (6 layers of metal) - 4.5 mm 2

(By courtesy of IMEC).

ly spread over the standard-cell

core, for flip-chip application.

Circuit complexities handled were

up to several hundred thousands

of equivalent gates, system clockrates

up to 200 MHz. Typically,

layout and full verification is done

in 10-15 working days.

Layout of a mixed analog-digital circuit

with 130 Kgates in Alcatel Microelectronics

0.35µ CMOS (5-metallayers)

- 29 mm 2

(By courtesy of IMEC).

7


EUROPRACTICE :

Your One-Stop partner for low volume ICs

EUROPRACTICE also bridges the gap between prototypes and the minimum production runs associated with

most foundries. Agreement has been reached with a number of manufacturing facilities worldwide for production

runs ranging from only 2 to several hundred wafers, thus providing companies with fully functional ASICs in quantities

from 100 to more than 100,000.

Flexible interfaces to prototyping

It is our commitment to help customers to get first-time-right silicon. Therefore, we have set up interfaces at several

levels of the design flow to offer you maximum flexibility and professional assistance in transferring your design

to production.

8

DESIGN IDEA

Design capture

functional and timing

simulation

and synthesis

Test insertion

Place & Route

GDS II

(Ready for fabrication)

Turn key design

EUROPRACTICE can route customers to design houses to perform the

complete design flow.

HDL interface

Design capture is done by the customer using VHDL or Verilog.

The customer cares for functional and timing verification. Synthesis can be

provided by EUROPRACTICE and Alliance Partners.

ATPG interface

Structural Test and Automated Test Pattern Generation is strongly recommended

by EUROPRACTICE to get high test coverage at reasonable design

effort. If you do not have the available appropriate CAD test tools this

task can be taken over by EUROPRACTICE and Alliance Partners.

Netlist interface

Automatic Place & Route for complex digital circuits requires expensive

CAD tools. For most technologies offered by EUROPRACTICE this service

is available through one of the EUROPRACTICE Service Centers or

Alliance Partners.

Postlayout netlist, SDF or parasitic information will be delivered to the

customer for performing post layout simulation and sign off.

GDS II interface

A final DRC/ERC is performed by default on any GDS II layout data submitted

by our customers before going to production. LVS can be done on

request.


Fully flexible solutions for production

EUROPRACTICE services comprise all steps from GDSII and prototype fabrication to qualified small volume

production. Depending on the wishes of the customer, we can deliver untested wafers, tested dies or encapsulated,

tested and qualified components.

Verified design

Silicon production

CMOS 7-8 weeks

BiCMOS/HV 10-12 weeks

Prototype

encapsulation

ceramic: 2 weeks

plastic: 3-6 weeks

Production with MPW

runs, Multi Level Mask

or full mask runs

The most economic solution

for very low volumes is

to use MPW mask set. For

higher volumes and for bigger

circuits a single user

mask set is the better solution

regarding total costs,

despite higher NRE costs.

In this case two possibilities

exist: the Multi Level Mask

(MLM) and the full mask

set. EUROPRACTICE will

check for the best solution.

Small volume fabrication flow

The verified GDSII data can be used for volume fabrication on a MPW run or

for a small wafer batch with dedicated MLM or full mask set. When the volume

is sufficiently low the complete volume can be produced and some samples

are used for prototype verification and test solution debugging.

PCM correct, optical inspected wafers are delivered.

If prototypes have not been verified before the small volume production, some

samples are encapsulated for test debug and full qualification.

In order to avoid delays, lead frames and packages must be ordered already

during silicon production. Delivery of package specification, bonding diagram

and marking instructions at the time of layout submission guarantees the lead

time necessary.

When prototypes have been qualified during a separate prototyping phase (ex.

on MPW run), one can immediately proceed to volume testing.

9


10

Wafer sort

2 weeks

incl. test debug

Volume

encapsulation

3-6 weeks

incl. test debug

Final test

1 week

Qualification

1 week

Testing circuits on wafer avoids encapsulating non-functional circuits.

Therefore, EUROPRACTICE compares the costs for wafer test solution

(probecard, test costs) and wafer test against costs for encapsulating nonfunctional

devices (depending on expected yield and package costs). Test

program generation and probe card manufacturing require 6 - 8 weeks

lead times.

Tested or untested wafers are shipped for volume encapsulation. As most

of the plastic encapsulation is performed in the Far East, three weeks delivery

time is minimum.

A full range of plastic packages is offered.

The final production test flow for industrially used components is the following:

• Full electrical test at 25°C of connectivity, power supply current, leakage

currents, input and output voltage levels, input and output current

check, functionality in all voltage corners, dynamic parametric test and

analog tests (if applicable).

• Same tests at extended temperatures if required other special analog parameters.

Qualification

When a certain level of quality is required, such as for space, military, automotive

and medical applications, extended qualification and screening programmes

have to be performed including full electrical tests, temperature

cycling, burn-in, visual inspection, etc.


Results

MPW prototyping service

ASICs prototyped on MPW runs

In 2000, 473 ASICs have been prototyped

on 130 scheduled MPW runs. This is a little

decrease, but on the other hand several customers

have chosen to combine several designs

on dedicated full mask or multi level

mask prototype runs. We are very pleased

with the 25% increased participation from

industry and research laboratories compared

to 1999.

Geometry mix

From the designs that customers send in for

prototyping, it can be analysed that our customers

follow the introduction of new technologies.

This is demonstrated by the fact

that 20% of the designs are prototyped in

0.35µ CMOS. In 2000, the first MPW runs

in 0.25µ CMOS technology have been offered

with success.

There is a clear indication that the older

(>1µ) technologies are less used and therefore

it has been decided to gradually phase

out the 2µ CMOS MPW runs in 2001.

Designs starts versus technology

The majority of designs in 2000 was fabricated

in CMOS technologies (85%). Due to the

fact that the interest in GaAs technologies

has decreased considerably, it was decided to

phase out this technology completely in

2000 and to look for alternatives for high

speed designs such as SiGe and RFCMOS

technologies. The introduction of 0.18µ and

0.13µ RFCMOS technologies in 2001 is

therefore very promising.

ASICs submitted for prototyping on MPW runs

Designs

versus type

of technology

600

500

400

300

200

100

0

1996 1997 1998 1999 2000

Universities + Polytechnics 361 395 349 335 285

Industry + Research Labs 100 138 122 151 188

Designs versus geometry

450

400

350

300

250

200

150

100

50

0

0.5/0.6

22%

0.5/0.6

19%

0,35

20%

0.35

9%

1999

0,25

2%

2000

>1

5%

>1

10%

0.7/0.8

59%

1998

1999

2000

11

0.7/0.8

54%

BiCMOS CMOS DMILL GaAs SiGe


Czech Republic

South-America

Spain

Sweden

Switzerland

Taiwan

Thailand

Turkey

United Kingdom

12

Australia

Austria

Belgium

Brazil

Bulgaria

Canada

China

Denmark

Egypt

Estonia

Finland

France

Germany

Greece

Hungary

Ireland

Israel

Italy

Korea

Malta

Mexico

Netherlands

New Zealand

Norway

Poland

Portugal

Romania

Slovakia

Slovenia

South-Africa

USA

EUROPRACTICE is offering its services world-wide

EUROPRACTICE is now offering its low cost ASIC MPW prototyping services to 40 countries

world-wide. As the service is based in Europe, the majority of the designs come from

European customers. But the interest from non-European countries is growing fast.

2000

1999

1998

1997

1996

Design starts versus country

0 10 20 30 40 50 60 70 80 90 100


Small volume projects

As the IC service aims to offer delivery

of ASICs in small volumes,

EUROPRACTICE has spent considerable

efforts in order to develop

and optimize the small volume

service. Indeed due to the fact

that the microelectronics industry

was heavily booked in 2000, more

customers turned to EUROPRAC-

TICE in order to get access to capacity

in the foundries.

117 projects in 2000

Due to the high booking rate at the

foundries, customers with small

and medium volume production

requirements faced enormous

problems to get access to production

capacity. As a result several

customers contacted EUROPRAC-

TICE. The foundries were very

pleased to offer small and medium

production to those customers

through the EUROPRACTICE service

as it reduced their direct sales

and support overhead.

So, EUROPRACTICE was very

pleased to see its small volume

projects increasing by 20% to 117

projects. But more important, the

number of delivered components

increased from about 3 million in

1999 to 11 million components in

2000.

These projects range from pure

wafer delivery up to fully tested

and qualified components. The

majority of projects have component

delivery ranging from a few

hundreds to more than 100,000.

Indeed delivery of 100,000 units

20,001…50,000

9%

10,001 ... 20,000

6%

Switzerland

7%

Sweden

6%

Spain

2%

Norway

3%

Netherlands

1%

50,001 … 100,000

2%

Turkey

1%

Mexico

2%

5,001 ... 10,000

8%

Italy

5%

Ireland

1%

100,000

17%

of a very small ASIC still is a small

volume for the foundries in number

of wafers (ex. 100,000 pcs of 2

mm 2 circuits needs only 16 6-inch

wafers).

Customers that ordered small volume

projects in 2000 came from

19 countries, mainly in Europe but

also from China, Mexico, USA and

Uruguay.

Request for quotation

Customers can fill in a simple 2page

form with the main specifications.

1,501 ... 5,000

15%

Germany

13%

France

4%

500

29%

501 ... 1,500

14%

Small volume projects versus the number of components

Uruguay

United Kingdom

1%

9%

USA

5%

Austria

2%

Belgium

16%

China

1%

Czech

republic

1%

Denmark

21%

Small volume projects versus country

With this information EURO-

PRACTICE can answer in a few

days and give a first rough price estimation

so that customers can

make a first evaluation. When the

full details of the ASIC are known

(area, testing, etc.) a final more accurate

price quotation can be

given.

The request form can be accessed

through our WEB site (www.europractice.imec.be).

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Examples of

small volume ASIC projects

---------------

An ASIC for capacitive ceramic pressure sensors

The ASIC has been designed by the

ASICentrum design house for its

customer BD Sensors - a company

specialized in electronic pressure -

and level measurement and processed

both in prototypes and small

volume by EUROPRACTICE. ASI-

Centrum is a member of the EU-

ROPRACTICE Alliance

Partner Network for

ASIC Design.

Description

The circuit converts the output of

the capacitive pressure diaphragm

into a digital signal, which is further

processed by a microprocessor including

sensor’s nonlinearity and

temperature compensations. This

low complexity ASIC contains RCoscillators,

control logic as well as a

built-in voltage divider. Maximum

working frequency is under 1 MHz.

Both the design and layout of the

circuit were performed using EU-

ROPRACTICE analog models and

14

standard cells libraries. An Alcatel

Microelectronics 2µ A/D CMOS

technology was chosen for processing

of the chip because of the minimum

costs and no limitations in the

core area - total size of the chip was

given by the pad pitch which had to

be accommodated to direct on ceramics

flip-chip assembly.

The chip area is approximately 4.3

mm 2 . Supply voltage - 5V.

Prototyping and small volume

The circuit was prototyped by the

EUROPRACTICE MPW run and

10 samples encapsulated in CSOIC

16 were delivered to our customer.

After having passed all the functionality

and reliability tests, an order

for the small volume production

was placed including complete mask

set fabrication. 22 wafers were produced

and tested in the Delta test

house with an average yield of 93%.

Tested and inked wafers were delivered

to the customer for further

processing (flip-chip assembly).

Once a mask set has been fabricated

and approved, a customer can easily

order another small volume runs

without any additional NRE

charges.

Why EUROPRACTICE ?

Because EUROPRACTICE provides

us with easy accessible prototyping

and small volume services in a variety

of technologies and in reason-

---------

service

center

IMEC

---------------

able prices.

IMEC provides

good support both in

simulation models and proven standard

cells libraries. And, last but not

least, IMEC performs final DRC

and ERC checking on the submitted

design (layout), which helps us to

minimise the risk of error and thus

to save design costs - a point particularly

important in a small volume

production.

For more information on chip data

or pressure sensors:

BD Sensors

Sadova 1385, 685 05 Uherske

Hradiste, Czech Republic

www.bdsensors.cz

or www.bdsensors.com

For more information on design

services:

ASICentrum

Novodvorska 994, 142 21 Praha 4,

Czech Republic

www.asicentrum.com

---------

The ASIC is flip-chipped on the substrate.


A CMOS readout circuit for thin film pyroelectric array detectors

Application

Thin film pyroelectric array detectors

are a new range of products

designated to the detection of infrared

light of wavelengths up to 20

µm. Their very low intrinsic noise

allows for uncooled operation of

these detectors, thus opening the

way to low-cost analytical infrared

spectrometers. Nevertheless, due to

their small dimensions, thin film

pyroelectrics deliver ac signals of a

few picoamperes with output impedances

in the order of 50 GΩ

and require highly sensitive interface

circuits. This, together with the

required parallel readout of up to

128 pixels, make the use of an ASIC

for this type of array detector

mandatory.

The array detector was developed

by the Ceramics Laboratory (LC) of

the Swiss Institute of Technology in

Lausanne (EPFL). The detector unit

is now commercialised by IR Microsystems

SA in Lausanne.

Design

The ASIC is a 16-channel readout

circuit implemented in a 0.7 µm

CMOS technology where each

channel consists of a high gain transimpedance

preamplifier, followed

by a multiplier for signal demodulation,

an integrator over 8 periods, a

12-bit A/D converter and a data

buffer. Design criteria for the ASIC

were a minimum gain of the preamplifier

of 10 GΩ at an operation

frequency of 10 Hz with a linearity

up to input signals of 10 pA, an

input-referred current noise inferior

to the detector noise (which is

2.25 fA/Hz 1/2 at 10 Hz) and a preamplifier

input leakage current inferior

to the signal amplitude up to

70°C.

A main measure to a reduction of

the preamplifier noise reduction is

the implementation of input transistors

with dimensions of

5x5000 µm 2 .

Prototyping

The ASIC was integrated in two

steps: a first prototype including the

analog part up to the integrator was

fabricated by IMEC through the

EUROPRACTICE MPW service in

to verify the performance of the

preamplifier. After successful tests,

the complete chip was fabricated

through a second EUROPRAC-

TICE MPW run and tested at EPFL

LC and LEG.

Small Volume Fabrication

The EPFL start-up company IR Mi-

The pyroelectric array detector

(1x64 pixels)

The ASIC in Alcatel Microelectronics

0.7µ CMOS technology.

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service

center

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IMEC

---------------

crosystems SA has started production

via EUROPRACTICE with a

first batch of 1300 chips. The chips

are packaged in a PQFP100 and

tested by EUROPRACTICE. This

batch is designated for the prototyping

and qualification of the IR Microsystems

detector units as well as

the first commercial units.

Why Europractice?

Good technical support

MPW service

Flexible offer for low volume production

Specifications

Technology: Alcatel Microelectronics

0.7µ C0.7M-A

Die size: approx. 6900x4000 µm 2

Mixed signal approx. 50 % / 50 %

Max input: 10 pA

Resolution:12 bit

Output noise: 0.64 LSBRSM

For further information,

please contact

IR Microsystems SA

PSE – Bât. A, CH-1015

Lausanne

info@ir-microsystems.com

15


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service

center

16

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IMEC

---------------

A CMOS readout circuit for silicon matrix detector for a cosmic ray spectrometer

Application

This is the first large-area silicon

matrix developed for a research

project in order to validate if galactic

cosmic rays come from supernova

explosions. The ATIC (Advanced

Thin Ionisation Calorimeter)

is one square meter array of

silicon detectors that detect cosmic

rays and separates the individual elements

from H to Fe. It consists of

4480 separate detector pads that

are separately read out using a 16channel

custom VLSI chip and

digitised to 12-bit precision.

A team of scientists from the

Louisiana State University and the

National Science Balloon Facility

launched a helium-filled balloon

The ATIC balloon payload

from McMurdo, Antarctica on

Dec. 28, 2000 to 120,000 feet. It

has travelled for 17 days around

the South-Pole guided by polar

vortex winds.

Scientists have now enough data to

start to evaluate the experiment.

Design

There is one front-end channel per

detector pad consisting of a

charge-sensitive amplifier, a shaping

amplifier with a high-dynamic

range and a track-and-hold circuit.

These reside in 16-channel ASICs.

The 16 channels are multiplexed to

a common output buffer on the

chip. The ASIC is optimised for

three independent noise components:

channel thermal noise, 1/f

noise and shot noise. Tests have

shown that the rms noise is 4600

electrons.

The ASIC is designed in the Alcatel

Microelectronics 2µ CMOS technology.

The development was done by

IMEC in cooperation with the

Naval Research Laboratory (NRL)

in Washington and funded by

NASA.

Prototype and small volume

fabrication

The design was prototyped on a

EUROPRACTICE MPW run. The

prototype samples have been evaluated

and tested by NRL.

The balloon experiment needed

280 functional ASICs in TQFP52.

The production of the 280 (plus

some spare parts) has been done

through EUROPRACTICE on a

Launch of the balloon on 28 Dec

from Antarctica

small volume run with dedicated

mask set.

Why EUROPRACTICE ?

The ASIC was designed starting

from a previous circuit that was

fabricated through EUROPRAC-

TICE for Cern. In this way the

NRL came into contact with

IMEC. The prototyping and small

volume service offered the most

cost-effective solution for fabrication

of the small volume of ASICs

for this experiment.

For further information, please

contact

NASA/Marshall Space Flight Center

James.h.adams@msfc.nasa.gov


Pipeline current mapper

Application :

measuring holes in pipelines

Radiodetection produces and sells

measuring equipment for water

pipe system analysis. Clean water

has become and important matter

and Radiodetection has for analysis

of water pipes developed an equipment

called Pipeline Current Mapper

(PCM). The PCM is a product

which has been designed to overcome

the shortcomings of existing

techniques and now provides

pipelines engineers with an accurate,

cost efficient product to locate

holes in pipelines.

The ASIC : digital ASIC

for DSP operations

The electrical design implemented

is replacing an FPGA hardware solution.

Integration has lowered the

electronics parts cost of this equipment

to practical 50 %.

The ASIC consists of 4 RAM

blocks and a DSP core of 50

Kgates. It is implemented in AMS

0.6µ CMOS and has a die size of

36 mm 2 and is packaged in a

PQFP-160.

Design flow

Radiodetection has made the algoritme

and VHDL description. In

order to implement the design Radiodetection

was very active in the

front end design as well as the setting

up the test benches for the

simulation at different stages in the

design flow . A netlist was generated

from the VHDL code using the

AMS 0.6µ CMOS library. BIST

(Built-in-self-test) circuitry was

added. After simulation sign off,

the layout was generated by

DELTA. The design phase took in

total 12 months

from start of specification

to delivered

prototypes.

Prototyping

and small volume

fabrication

Using a Multi

Level Mask (4 layers

per reticle) set

both prototyping

and low volume

have been manufactured.Prototyping

on a MPW

run was skipped

as it was believed

that the prototypes

would be

first time right.

Since Radiodetection

had a conservative forecast in

volume, EUROPRACTICE implemented

some 2000 components

whereas the 1000 were immediately

delivered to the customer. The

rest of the volume production was

put on stock for later purchase.

Why EUROPRACTICE ?

The option of Multi Level Mask set

offered a cost effective solution for

prototyping and volume up to

2000 units. Different implementation

techniques were evaluated

from FPGA to digital standard celll

ASIC. Further to this the NRE

cost versus volume and complexity

has been compared with different

technologies from 0.35µ up to

0.8µ CMOS. The optimal solution

---------

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service

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Delta

---------------

The 36 mm 2 ASIC in

AMS 0.6µ CMOS

---------

for this ASIC was the offer from

EUROPRACTICE in AMS 0.6µ

CMOS technology.

For further information, please

contact

www.radiodetection.com

17


ASIC for measuring capacitive sensors---------------

Application

The ASIC CUW was specially developed

for use in a system that

measures slope and acceleration

from the deflection of capacitive

sensors. The deflection is sensed

and the corresponding change in

capacitance is converted to a voltage

and fed into the ASIC CUW

which has 2 channels allowing 2dimensional

sensing. The capacitive

sensor and electronic system

were developed by GEMAC as a

product for automotive and aerospace

applications.

ASIC Description

The ASIC has two independent

channels for sensing of change in

slope and acceleration in 2 directions

simultaneously. Each analog

channel consists of an input stage

for sensor stimulation, signal processing

of the sensor output and an

analog output stage.

18

Technology: Austria Mikro Systeme

Int. 0.8 micron CMOS

Die Size: 5.3 mm 2

Supply Voltage : 5V ± 5%

Power consumption (2 channels

active): 30 mW

Temperature Range: -25 ... +85°

Sensor Capacitance:

C1, C2 < 30pF

Output Voltage:

1V... 4V (= VREF_x if C1=C2 )

Package: TQFP32

Testing: analog functional and system,

test by GEMAC

Why Europractice ?

The first prototypes were produced

using MPW for design verification.

With minor design varia-

Clock

OSZ

(By courtesy of Gemac)

X1

X2

Sensor

ASIC

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service

center

---------

FhG-IIS

---------------

tions, 1500 ASICs were then produced

and packaged using an

MPW run to optimise the economics

of the small volume production.

Design Partner

Founded in 1992 GEMAC is an

experienced design partner for

special electronics and sensors.

GEMAC offers design services and

also markets and sells its own

products. GEMAC is a member of

the EUROPRACTICE Alliance

Partner Network for ASIC Design.

M

Cext

I

CINT

S & H

For further information, please

contact

GEMAC mbH

Zwickauer Str. 227

09116 Chemnitz

mailto: info@gemac-chemnitz.de

http://www.gemac-chemnitz.de

Tel.: +49 371 33770

Fax: +49 371 3377272

ANAOUT


Multichannel speech transmission circuit for use in local communication systems

Application

ASIC LHRA is a multichannel

speech transmission circuit for use

in local communication systems.

Eight audio channels can be transmitted

on a single line. Transmission

principle is a combination of

single side band modulation and

channel switching. Using switched

capacitor filter and switch modulator

technology the integration of

the multichannel parallel transmission

is achieved in a purely analog

way. Up to 512 speech stations can

be connected by a four wire cable

in a local transmission system. Two

cables are used for 12 Volt power

distribution, one cable transmit the

digital information to control the

system and the analog line is used

for the multichannel speech

transmission.

ASIC Description

The device is divided into

a digital and an analog

part. In the digital part, an

18 MHz Q-oscillator generates

the system clock,

which is fed to an external

controller. The digital

control word is used to set

amplifier gain, channel selection

and user notification.

Transmitter and receiver

circuits are the key

blocks of the analog part.

In these parts, modulation

of the audio signal from

the baseband to one of the eight

channels, transmission to the line

and selection and demodulation of

one of the transmitted channels

back to the baseband is managed.

Technology: Austria Mikro Systeme

Int. 0.6µ CMOS

Die size: 9.6 mm 2

Supply voltage: 5 V

Package: PQFP 44

Test: Mixed Signal by DELTA

Why Europractice ?

Europractice IC service and Fraunhofer

IIS-A could offer design services,

prototyping and the flexibility

of producing 400 tested and

packaged parts for field evaluation

of the ASIC and system.

Production was performed using

MPW multiple placement which

greatly reduced the non-recurring

mask costs.

(By courtesy of Comtech)

X1

X2

CLK

CLK

DATA

DCK

RIN

INMIC

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service

center

FhG-IIS

---------------

Design Partner

Comtech GmbH is a small company

founded in 1993 specialising in

communication and information

systems for home and commercial

use. The mixed mode systems

using the 4 wire bus allow complete

flexibility and simplified installation

compared to simple analog

systems.

For more information contact

Comtech GmbH

Industriestrasse 29

78112 St. Georgen

Germany

Tel.: +49 911 996730

Fax: +49 911 683181

I1MIC

O1MIC

IN

CLOUT

POR

TCOUT

TCIN

Ceramic

Filter

LIN

LOUT

Ceramic

Filter

19

---------

RCOUT1

RCOUT0

RCIN0

Pdx

RCIN1

WD/TST

TEST

EXLS

OUT


ASIC for the intelligent house

Application

Easy Living is a seven-year-old

Swedish company headquartered

in Stockholm. The company develops

integrated electronic products

for Smart Houses and manufactures

the radio solutions, the system

and the plastic housing. Easy

Living’s biggest customer is Ericsson,

and the system is developed

according to OSGI, a standard

adapted to major IT companies

such as Ericsson and IBM for “residential

gateways”.

Since 1997 Nordic VLSI has had a

close co-operation with Easy Living

AB in Stockholm giving them support

in the development and commercialisation

phase of their solutions

for intelligent houses.

Easy Living calls itself a supplier of

20

Radio module for home automation

Smart House solutions. In the future

we’ll all see the launching of

many smart solutions that will radically

change people’s everyday life.

Easy Living is developing a wide

range of products for various sensors

and control solutions, where

we envision everything from fire to

humidity alarms.

The ASIC

Nordic VLSI supplies a highly integrated

transceiver for wireless

communication, which with its size

and functionality makes it possible

to manufacture such a commercial

product for the international market.

The focus in the development

and design of the transceivers, was

to have a product that could be integrated

for volume production. All

circuits are RF tested in produc-

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service

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Nordic

---------------

tion, and designed without need

for manual adjustments. This

makes it possible for Easy Living to

use a fully automated surface production

line.

All Nordic’s devices use frequency

shift keying as robust modulation

technique for wireless communication.

This ensures high data rates,

long range and robust communication.

This gives Easy Living products

that are able to communicate

with each other anywhere in the

home and in a unique way.

The ASIC has been designed in the

AMS 0.8µ BiCMOS technology


ASIC for the electronic toll collection

Application

Nordic VLSI has played an important

part in the development of Q-

Free’s electronic toll collection solutions.

From 1999 to the present,

Nordic VLSI has delivered millions

of components comprising an important

part of Q-Free’s success in

the domestic and international

market.

What’s special about chip company

Q-Free is that they are a total supplier

that designs and develops

complete systems for electronic

toll collection. The Q-Free chip is

a tiny, but vital, part of an electronic

toll collection system. One reason

is that the systems will be running

at huge volumes and must

therefore be one hundred percent

functional from day one. A chip

currently operates according to the

European standard of 5.8 GHz and

consists mainly of an analogue and

a digital part as well as a power

supply (battery).

Nordic VLSI and Q-Free have collaborated

for many years and the

projects have become bigger. As Q-

Free consolidated its position in a

tough international market and

with considerable volumes, solutions

involving ASIC have become

more interesting to develop. This is

where Nordic VLSI has the expertise

Q-Free can use. Q-Free represents

a market where the customer

has expertise to do parts of the development

internally and where

Nordic VLSI mates its intellectual

property (IP) modules with the

customers solution. This together

with Q-Free’s internally developed

library give the customer low

power consumption as well as

compact and reliable solutions.

Q-Free stands apart from other hitech

companies in the business because

they work with very advanced

fields of technology covering

a wide range. In the systems

they use microwave communication,

analogue and digital electronics,

optical systems, realtime data

systems, databases, etc. This is required

to create a complete electronic

toll collection system.

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service

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Nordic

---------------

Technology:

ESM 0.5 CMOS (1P3M)

Packaging:

SOIC16 - OSE

Test:

EUROPRACTICE partner Delta

21


List of Customers per country and number of

designs they have sent in for MPW fabrication

CUSTOMER TOWN Number

of ASICs

Australia

Edith Cowan University

Austria

Joondalup 4

AMS Unterpremstatten 8

IEG Stockerau 1

Johannes Keppler University Linz 1

Securiton Wien 1

TU Vienna Vienna 3

University of Linz

Belgium

Linz 2

Alcatel Bell Hoboken 4

Browning International SA Herstal 1

ED&A Kapellen 3

Faculté Polytechnique de Mons Mons 5

ICI - Security Systems Everberg 7

IMEC Heverlee 62

K.H.Limburg Diepenbeek 4

K.U. LEUVEN Heverlee 32

Karel De Grote Hogeschool Hoboken 2

Katholieke Hogeschool Brugge-Oostende Oostende 23

Macq Electronique Brussel 1

Philips Hearing Implants Wilrijk 5

SDT International Bruxelles 1

SEBA Service N.V. Grimbergen 1

SIEMENS ATEA Herentals 2

Societe de Microelectronique Charleroi 1

UIA Wilrijk 3

Universite Catholique de Louvain Louvain-la-Neuve 10

University of Ghent Gent 36

Vrije Universiteit Brussel

Brazil

Brussel 23

CPqD - Telebras Campinas 7

UNESP/FE-G Guaratingueta - SP 2

UNICAMP, University of Campinas Campinas, SP 6

University of Sao Paulo

Bulgaria

Sao Paulo, SP 26

Technical University of Sofia

Canada

Sofia 2

Epic Biosonics Victoria 3

University of Alberta

China

Edmonton 1

Univ. of Beijing Beijing 1

Fudan University

Czech Republic

Shanghai 2

ASICentrum Prague 4

CTU Prague

Denmark

Prague 3

Aalborg University Aalborg 13

Center for Integrated Electronics Lyngby 25

DELTA Hoersholm 11

GN-Danavox A/S Taastrup 4

22

CUSTOMER TOWN Number

of ASICs

MICROTRONIC A/S Roskilde 10

PGS Electronic Systems

Egypt

Frb. 1

Bahgat Group - IEP 6th october city 2

International Electrical Products

Estonia

Giza 1

Tallinn Technical University

Finland

Tallinn 1

Detection Technology Inc. Li 1

Fincitec Oy Kemi 3

Helsinki Tech. University Espoo 33

Tampere University of Technology Tampere 3

University of Oulu Oulu 9

VTT Electronics

France

Espoo 61

C4I Archamps 3

CCESMAA -IXL Talence 2

CEA Gif sur Yvette 14

CMP-TIMA Grenoble 2

CNES Toulouse 4

CPPM Marseille 2

DOLPHIN INTEGRATION Meylan 1

ENSEA Cergy Pontoise 2

ENST Paris Paris 2

ESIEE Noisy-Le-Grand 1

IN2P3 - LPNHE Paris Cedex 5 2

Institut de physique Nucleaire Villeurbanne 7

Institut des Sciences Nucleaire Grenoble 3

Institut Sup. d Electronique de Bretagne Brest 2

ISEN Recherche Lille cedex 2

LAAS/CNRS Toulouse 3

Labo PCC-CNRS/IN2P3 Paris 1

Laboratoire de l Accelerateur Lineaire Orsay 2

LAPP Annecy-le-Vieux 6

LEPSI Strasbourg 8

LETI-CEA Grenoble 1

LIRMM Montpellier 1

Midi Ingenierie Labege 1

MultiMex SA Vincennes 2

MXM Laboratories Vallauris 3

NeoVision France Bagneux 1

PMIPS Orsay 1

SODERN Limeil-Brevannes 1

SUPAERO Toulouse 13

Universite Pierre et Marie Curie

Germany

Paris 3

ALV-Laser Vertriebsgesellschaft mbH Langen 1

Austria Mikro System International Dresden 1

Bergische Universitaet Wuppertal Wuppertal 1

Biotronik GmbH & Co Erlangen 4

Comtech GmbH St. Georgen 3

Daimler-Benz Aerospace AG Ulm 3


CUSTOMER TOWN Number

of ASICs

Darmstadt University of Technology Darmstadt 9

Dresden University of Technology Dresden 5

ESM Eberline Erlangen 1

Fachhochgschule Furtwangen Furtwangen 5

Fachhochschule Aalen Aalen 3

Fachhochschule Augsburg Augsburg 1

Fachhochschule Darmstadt Darmstadt 7

Fachhochschule Dortmund Dortmund 2

Fachhochschule Esslingen Goeppingen 2

Fachhochschule Giessen Giessen 6

Fachhochschule Koeln Gummersbach 1

Fachhochschule Osnabrueck Osnabrueck 4

Fachhochschule Ulm Ulm 4

Fachhochschule Wilhelmshaven Wilhelmshaven 1

FH Hannover Hannover 5

FH Karlsruhe Karlsruhe 1

Fh Niederrhein Krefeld 5

FH Offenburg Offenburg 11

FhG Erlangen 45

FH-Münster Steinfurt 1

FORMIKROSYS Erlangen 2

Fraunhofer Institut Silicontechnology Itzehoe 10

GEMAC GmbH Chemnitz 2

Geyer AG 4

GMD St.Augustin 1

GSI Damstadt Darmstadt 2

IHP Frankfurt(Oder) 1

IMKO Micromodultechnik GmbH 2

Institut fuer Physik Mainz 9

Institute for Integrated Systemes Aachen 1

Jakob Maul GmbH 1

KVG Quatrz Crystal Neckarbisch 1

Lenze GmbH 1

MAN Nüremberg 1

MAZ Brandenburg 2

Optek Systems Innovations 1

OPTRONICS 1

Physikalisches Institut Bonn 17

Ruhr-Universität Bochum Bochum 4

RWTH Aachen Aachen 5

Schleicher GmbH & Co Relais-Werke KG 1

Sican Braunschweig GmbH Braunschweig 1

Siemens AG 1

Technical University Ilmenau Ilmenau 12

Technical University of Berlin Berlin 6

Technische Universitaet Dresden Dresden 6

Technische Universitaet Hamburg-Harbur Hamburg 11

TU Chemnitz Chemnitz 6

Universitaet Dortmund Dortmund 1

Universitaet Kaiserslautern Kaiserslautern 8

University of Heidelberg Heidelberg 11

University of Bonn Bonn 11

University of Bremen Bremen 19

University of Kassel Kassel 5

University of Oldenburg Oldenburg 1

University of Paderborn Paderborn 9

University of Rostock Rostock 1

University of Saarland Saarbrcken 3

University of Ulm Ulm 3

University-GH-Siegen Siegen 5

Universtity of Magdeburg Magdeburg 8

WAGO Minden 1

CUSTOMER TOWN Number

of ASICs

Work Microwave GmbH Holzkirchen 1

Greece

University of Ioannina Ioannina 2

ACE Power Electronics LTD AG Dimitrios 1

Aristotle University of Thessaloniki Thessaloniki 2

Crypto SAMarousi 1

Datalabs Athens 1

Democritus University of Thrace Xanthi 3

ERGO SAAthene 1

Found. for Research and Techn.-Hellas Heraklion 1

HELIC SAAthens 1

Intracom Paiania 1

National Technical University of Athens Athens 15

NCSR Athens 18

RETECO LTD. Athens 1

Unibrain SAAthens 1

Univ. of Patras,VLSI Design Lab.

Hungary

Patras 13

JATE University

Ireland

Szeged 1

Cork Institute of Technology Cork 2

Farran Technology Ballincollig 1

NMRC Cork 13

Parthus Technologies plc Cork 7

TELTEC Cork 1

University of Limerick Limerick 3

Waterford Institute of Technology

Israel

Waterford 2

CoreQuest Petach Tikva 2

DSP Semiconductors

Italy

Givat Shmuel 1

Agenzia Alta Tecnologia Firenze 1

Alimare SRL Favria Canavese (Torino)1

Aurelia Microelettronica Cascina (PI) 11

BIOTRONIC SRL S. Benedetto 1

Catania University Catania 12

Cesvit Microelettronica s.r.l. Prato 1

INFN Sezione di Trieste Trieste 4

IPL Trieste 1

ISE Vecchiano 1

Istituto Nazionale di Fisica Nucleare S.Piero a Grado (PI) 4

IRST Trento 3

LABEN S.p.A. Vimodrone (MI) 2

Padova University Padova 11

Politecnico di Bari Bari 1

Politecnico di Milano Milano 19

Politecnico di Torino Torino 4

SITE Technology s.r.l. Oricola 1

SYEL S.r.l. Pontedera 1

Univ. of Rome Tor Vergata Roma 4

Universita degli Studi Dell Aquila L Aquila 2

Universita di Brescia Brescia 4

Universita di Cagliari Monserrato (CA) 8

Universita di Catania Catania 14

University of Perugia Perugia 2

Universita di Torino Torino 7

University of Ancona Ancona 2

University of Bologna Bologna 14

University of Cagliari Cagliari 4

University of Florence Firenze 2

23


CUSTOMER TOWN Number

of ASICs

University of Genoa Genoa 8

University of Parma Parma 3

University of Pavia Pavia 1

University of Pisa Pisa 5

University of Siena

Korea

Siena 1

Korean Elektrotechnology Research Institute Changwon 1

MacAM CO.,Ltd

Malta

Seoul 2

University of Malta

Mexico

10

INAOE

Netherlands

Puebla 12

AEMICS bv Hengelo 1

Delft University of Technology Delft 23

ESA AG Nordwijk ZH 2

Hogeschool Heerlen Heerlen 1

NFRA Dwingeloo 1

Smart Telecom Solutions 1

SRON Utrecht 1

T.U. Eindhoven Eindhoven 28

TNO Industrie Eindhoven 1

Universiteit Twente Enschede 1

University of Amsterdam Amsterdam 1

University of Twente

New Zealand

Enschede 3

Industrial Research Ltd

Norway

Lower Hutt 4

IDE AS Oslo 1

Nordic VLSI AS Tiller 31

NTNU Trondheim 17

SINTEF Trondheim 6

University of Bergen Bergen 6

University of Oslo

Poland

Oslo 34

Institute of Electron Technology Warsaw 30

Technical University of Gdansk Gdansk 1

Technical University of Lodz Lodz 3

Univ. of Mining and Metallurgy Kracow 7

University of Mining and Metallurgy Krakow 7

Warsaw University of Technology

Portugal

Warszawa 9

INESCLisboa 13

Instituto de Telecomunicacoes Lisboa 17

Instituto Superior Tecnico Lisbon 5

Universidade de Aveiro

Romania

Aveiro 14

Polytechnic inst. Bucharest

Slovakia

Bucharest 1

Inst. of Computer Systems Bratislava 1

Slovak University of Technology

Slovenia

Bratislava 2

Iskraemeco Kranj 14

University of Ljubljana

South Africa

Ljubljana 1

University of Pretoria

South America

Pretoria 5

CNM/Iberchip Bellaterra 61

24

CUSTOMER TOWN Number

of ASICs

Spain

Centro Nacional de Microelectronica 41

Design of Systems on Silicon Paterna 2

Esc Ingenieros; Univ Sevilla Sevilla 9

EUSS Barcelona 1

Facultad de Informatica UPV / EHU Donostia 2

Technical University of Madrid Madrid 3

UAB Bellaterra 7

Univ. Las Palmas de G.CLas Palmas de G.C. 2

Univerisdad de Extremadura Badajoz 7

Universidad de Vigo Vigo 2

Universidad de Zaragoza Zaragoza 7

Universidad del Pais Vasco Bilbao 1

Universidad Publica de Navarra Pamplona 6

Universitat de Barcelona Barcelona 11

Universitat Illes Balears Palma Mallorca 1

Universitat Politecnica de Catalunya Barcelona 10

Universitat Rovira i Virgili Tarragona 2

University of Cantabria Santander 6

University of Extremadura Badajoz 8

University of Malaga Malaga 2

University of Navarra San Sebastian 12

Sweden

Chalmers Univ. of Technology Goteborg 57

Ericsson Microwave systems Mölndal 2

Institutet for Rymdfysik Kiruna 1

Lulea University of Technology Lulea 1

Lund University Lund 114

Malardalens University Vasteras 1

Mid Sweden University Sundsvall 5

National Defence Establishment. Linkoping 5

Royal Institute of Technology Kista 7

Saab Ericsson Space AB Goteborg 1

SiliCon Construction AB Linkoping 3

Univ. of Linkoping Linkoping 119

University of Trollhattan Trollhattan 3

Uppsala University Uppsala 11

Switzerland

Asulab Marin 21

CERN Geneve 37

CSEM SA / Xemics Neuchtel 29

EPFL Lausanne 84

ETH Zurich Zurich 30

Hochschule Rapperswill Rapperswill 1

HTL Brugg-Windisch Windisch 2

Ingenieurschule Biel Biel 6

MEAD Microelectronics S.A. St-Sulpice 2

MICROSWISS Rapperswil 2

Paul-Scherrer-Institute Villigen 12

Physical Electronics Laboratory Zurich 4

Siemens Zug 1

Smart Silicon Systems SA Lausanne 1

Suter IC-Design AG Waldenburg 1

University of Neuchatel Neuchatel 5

University of Zurich Zurich 9

Taiwan

Feng Chia University Taichung 1

National Cheng Kung University Taiwan ROC 1

National Tsing-Hua University Asinchu 4


CUSTOMER TOWN Number

of ASICs

Thailand

NECTEC Bangkok 7

Turkey

ASELSAN Ankara 1

Bilkent University Ankara 5

Bogazici University Istanbul 4

Istanbul Technical University Maslak, Istanbul 8

Kardiosis Ankara 1

Middle East Technical Univ. Ankara 7

United Kingdom

Aberdeen University Aberdeen 1

BARNARD MICROSYSTEMS LIMITED London 2

Bradford University Bradford 7

Cadence Design Systems Ltd Bracknell 1

Cambridge Consultants Ltd. Cambridge 3

Cardiff University Cardiff 5

Control Technique 1

Glasgow Uninversity Glasgow 1

Heriot-Watt University Edinburgh 2

Imperial College London 1

K.J.Analogue Consulting Malmesbury 1

Lancaster University Lancaster 7

Liverpool University Liverpool 9

Manchester University Manchester 4

Middlesex University London 6

Napier University Edinburgh 4

Nokia Networks Camberley 3

Nortel Harlow 1

Oxford University Oxford 9

Plextek Ltd Saffron Walden 4

Positek Limited Glos 1

Rutherford Appleton Lab Chilton 9

Saul Research 9

Sheffield Hallam University Sheffield 1

Swindon Silicon Systems Wiltshire 1

The Queen s University of Belfast Belfast 3

The University of Hull Hull 1

UMIST Manchester 26

University College London London 3

University of Birmingham birmingham 6

University of Brighton Brighton 1

University of Cambridge Cambridge 7

University of East London London 1

University of Edinburgh Edinburgh 18

University of Hertfordshire Hatfield 1

University of Kent Canterbury 13

University of London London 27

University of Newcastle upon Tyne Newcastle upon Tyne 1

University of Nottingham Nottingham 3

University of Plymouth Devon 2

University of Reading Reading 1

University of Sheffield Sheffield 3

University Of Southampton Southampton 14

University of Stirling Stirling 1

University of Surrey Guildford 1

University of the West of England Bristol 1

University of Warwick Coventry 1

University of Westminster London 5

CUSTOMER TOWN Number

of ASICs

USA

Analog Phoenix 1

Brookhaven National Laboratory Upton, NY 1

Columbia University Irvington, New York 2

Goddard Space Flight Center, NASA Greenbelt 1

Linear Dimensions, Inc. Chicago 1

Princeton University Princeton, New Jersey 4

Stanford Linear Accelerator Meno Park 11

Symphonix Devices Inc. San Jose 1

University of Chicago Illinois 1

University of Pennsylvania Philadelphia, Pa. 2

USRA Washington 1

Yanntek, Inc Los Gatos 4


All information for MPW runs schedule, prices, etc. is on-line available on our WEB site

www.europractice.imec.be

For more information, please contact one of the EUROPRACTICE service centers.

IMEC

General EUROPRACTICE IC office &

IC Manufacturing Center

C. Das

Kapeldreef 75

B-3001 Leuven, Belgium

Tel : + 32 16 281 248

Fax : + 32 16 281 584

mpc@imec.be

http://www.europractice.imec.be/

Fraunhofer Institut for Integrated Circuits (FHG-IIS)

Integrierte Schaltungen

IC Manufacturing Center

W. McKinley, J. Sauerer

Am Weichselgarten 3

D-91058 Erlangen, Germany

Tel : + 49 9131 776 401

Fax : + 49 9131 776 499

europrac@iis.fhg.de

http://www.iis.fhg.de/asic/

Nordic VLSI AS

IC Manufacturing Center

T. Mogseth

Vestre Rosten 81

N-7075 Tiller, Norway

Tel : + 47 728 989 00

Fax : + 47 728 989 89

europrac@nvlsi.no

DELTA

IC Manufacturing Center

G. Jorgensen

Venlighedsvej 4

DK-2970 Hoersholm, Denmark

Tel : + 45 45 86 77 22

Fax : + 45 45 86 58 98

europrac@delta.dk

VIERKANT GRAFISCH

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