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Synthèse de haut-niveau de contrôleurs ultra-faible consommation ...

Synthèse de haut-niveau de contrôleurs ultra-faible consommation ...

tel-00553143, version 1

tel-00553143, version 1 - 6 Jan 2011 118 Proposed system model and design-flow for SM synthesis Task A EventA Shared Mem Task C Task B Application.sysdesc Model Transformation Guard Expression Evaluation EventB Proposed Textual DSL for System- Level Description System Monitor Synthesis Design- Flow CDFG of Micro-Tasks EMF-based Intermediate Model of the System SM Generation EMF-based RTL-Model for System Monitor Code-Generation Tool SM.vhd Figure 5.8: Design methodology for system monitor (SM) generation.

tel-00553143, version 1 - 6 Jan 2011 Design-flow for the SM generation 119 system send_receive_data { include "send_receive.gecos" /* Link to CDFG IR of micro‐task synthesis design‐flow */ /************************************************************************************* * Events existing in the system (both internal and external) * ***************************************************************************************/ events { extPB, extET, beacon_Sent, data_Received, ack_Sent, timeOut0, timeOut1, timeOut2, receiver_OFF, transmitter_OFF, counter_Start, beacon_Received, data_Sent, ack_OK, ack_NOK, radio_OFF} /*************************************************************************************/ /************************************************************************************* * Shared memories existing in the system (both gated and permanent) * ***************************************************************************************/ memory memB [gated] { contains globals {neigh_IdX,neigh_IdY, receiveFrame, sentFrame, pushButtonStatus} }; } memory memC [permanent] { contains globals {my_IdX, my_IdY} }; /*************************************************************************************/ /************************************************************************************* * Shared I/Os existing in the system * ***************************************************************************************/ ioModule led { contains ports { port LED 8} }; ioModule pushButton { contains ports { port PUSHBUTTON 7} }; ioModule cc2420 { contains ports { port P2IN 0, port P5OUT 1, port U1TCTL 2, port U1RXBUF 3, port U1TXBUF 4, port URXIFG1 5, port IFG 6} }; /*************************************************************************************/ /************************************************************************************* * Hardware micro‐tasks existing in the system * ***************************************************************************************/ microTask receiveData { activates With { beacon_Sent } produces { data_Received } reads ioModule { cc2420 } writes memory { memB } }; microTask sendBeacon { activates With { extET } produces { beacon_Sent } writes ioModule { cc2420 } reads memory { memC } }; Figure 5.9: A snapshot of the system-level execution model, of the lamp-switching example shown in Figure 5.3, described using proposed DSL.

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