Views
5 years ago

Synthèse de haut-niveau de contrôleurs ultra-faible consommation ...

Synthèse de haut-niveau de contrôleurs ultra-faible consommation ...

tel-00553143, version 1

tel-00553143, version 1 - 6 Jan 2011 156 Bibliography [37] Fin, A., Fummi, F., and Perbellini, G. 2001. Soft-Cores Generation by Instruction Set Analysis. In ISSS’01: Proceedings of the 14th International Symposium on Systems Synthesis. ACM, 227–232. [38] F.L. Lewis. 2005. Wireless Sensor Networks. Book Chapter in Smart Environments: Technologies, Protocols, Applications. [39] Fonseca, R., Dutta, P., Levis, P., and Stoica, I. 2008. Quanto: Tracking Energy in Networked Embedded Systems. In OSDI’08: USENIX Symposium on Operating Systems Design and Implementation. 323–338. [40] Forte. 2010. Cynthesizer and High-Level Design. Product. [41] Fraser, C. W., Henry, R. R., and Proebsting, T. A. 1992. BURG: Fast Optimal Instruction Selection and Tree Parsing. SIGPLAN Not. 27, 4. [42] Gajski, D. and Reshadi, M. 2005. A Cycle-Accurate Compilation Algorithm for Custom Pipelined Datapaths. In CODES+ISSS’05: Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis. 21 –26. [43] Garrett, D., Stan, M., and Dean, A. 1999. Challenges in Clockgating for a Low Power ASIC Methodology. In ISLPED’99: Proceedings of the 1999 International Symposium on Low Power Electronics and Design. 176–181. [44] Gay, D., Levis, P., von Behren, R., Welsh, M., Brewer, E., and Culler, D. 2003. The nesC Language: A Holistic Approach to Networked Embedded Systems. SIGPLAN Not. 38, 5, 1–11. [45] Glokler, T., Bitterlich, S., and Meyr, H. 2000. ICORE: A Low-Power Application Specific Instruction Set Processor for DVB-T Acquisition and Tracking. In SOCC’00: Proceedings of the13th Annual IEEE International ASIC/SOC Conference. 102 –106. [46] Gonzalez, R. 2000. Xtensa: A Configurable and Extensible Processor. IEEE Micro 20, 2 (mar/apr), 60 –70. [47] Grant Martin and Gary Smith. 2009. High-Level Synthesis: Past, Present, and Future. IEEE Design and Test of Computers 26, 18–25. [48] Gupta, Rajesh and Brewer, Forrest. 2008. High-Level Synthesis: A Retrospective. In High-Level Synthesis, Coussy, Philippe and Morawiec, Adam, Ed. Springer Netherlands, Chapter 2, 13–28. [49] H. Ritter. 2010. ScatterWeb. [50] Hadjiyiannis, G., Hanono, S., and Devadas, S. 1997. ISDL: An Instruction Set Description Language for Retargetability. In DAC’97: Proceedings of the 34th Annual Design Automation Conference. ACM, New York, NY, USA, 299–302.

tel-00553143, version 1 - 6 Jan 2011 Bibliography 157 [51] Halambi, A., Grun, P., Ganesh, V., Khare, A., Dutt, N., and Nicolau, A. 1999. EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator Retargetability. In DATE’99: Proceedings of Design, Automation and Test in Europe Conference and Exhibition. 485 –490. [52] He, T., Krishnamurthy, S., Luo, L., Yan, T., Gu, L., Stoleru, R., Zhou, G., Cao, Q., Vicaire, P., Stankovic, J. A., Abdelzaher, T. F., Hui, J., and Krogh, B. 2006. VigilNet: An Integrated Sensor Network System for Energy- Efficient Surveillance. ACM Transactions on Sensor Networks 2, 1, 1–38. [53] Hempstead, M., Wei, G.-Y., and Brooks, D. 2009. An Accelerator-Based Wireless Sensor Network Processor in 130nm CMOS. In CASES’09: Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems. ACM, New York, NY, USA, 215–222. [54] Herring, C. and Kaplan, S. 2000. Component-Based Software Systems for Smart Environments. Personal Communications, IEEE [see also IEEE Wireless Communications] 7, 5 (Oct), 60–61. [55] Hill, J., Horton, M., Kling, R., and Krishnamurthy, L. 2004. The Platforms Enabling Wireless Sensor Networks. ACM Commun. 47, 6, 41–46. [56] Hill, J., Szewczyk, R., Woo, A., Hollar, S., Culler, D., and Pister, K. 2000. System Architecture Directions for Networked Sensors. SIGPLAN Not. 35, 11, 93–104. [57] Hill, J. L. and Culler, D. E. 2002. Mica: A Wireless Platform for Deeply Embedded Networks. IEEE Micro 22, 12–24. [58] Hoffmann, A., Schliebusch, O., Nohl, A., Braun, G., Wahlen, O., and Meyr, H. 2001. A Methodology for the Design of Application Specific Instruction Set Processors (ASIP) using the Machine Description Language LISA. In ICCAD’01: Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design. Piscataway, NJ, USA, 625–630. [59] Hu, Z., Buyuktosunoglu, A., Srinivasan, V., Zyuban, V., Jacobson, H., and Bose, P. 2004. Microarchitectural Techniques for Power Gating of Execution Units. In ISLPED’04: Proceedings of the 2004 International Symposium on Low Power Electronics and Design. 32–37. [60] Huang, I.-J. and Despain, A. 1994. Synthesis of Instruction Sets for Pipelined Microprocessors. In DAC’94: Proceedings of the 31st ACM/IEEE Design Automation Conference. 5–11. [61] Hwang, C.-T., Lee, J.-H., and Hsu, Y.-C. 1991. A Formal Approach to the Scheduling Problem in High Level Synthesis . IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 10, 4 (apr.), 464 –475.

Synthèse, caractérisation et intérêt biomédical de (glyco ...
Synthèse, caractérisation et polymérisation par ouverture de cycle ...
Les bus à haut niveau de service
Analyse et synthèse de sons de piano par modèles physiques et de ...
Emission gamma de haute énergie dans les systèmes binaires ...
CONVENTION INDIVIDUELLE ATHLETES DE HAUT NIVEAU saison 2014-2015
[pastel-00600598, v1] Synthèse de composés ... - Chimie ParisTech
Martin Teichmann Atomes de lithium-6 ultra froids dans la ... - TEL
Etude des systèmes RFID opérants en rétrodiffusion modulée ultra ...
Du sillage des insectes aux gaz de Fermi ultra-froids: dynamique ...
Analyse tth, H EN WW avec ATLAS au LHC et étude des électrons à ...
Computer: PicoRadio Supports Ad Hoc Ultra-Low Power Wireless ...
Electroproduction de pions neutres dans le Hall A au Jefferson ...