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Synthèse de haut-niveau de contrôleurs ultra-faible consommation ...

Synthèse de haut-niveau de contrôleurs ultra-faible consommation ...

tel-00553143, version 1

tel-00553143, version 1 - 6 Jan 2011 60 High-level synthesis and application specific processor design 3.1.3.4 Mixed Integer Linear Programming (MILP)-based approach: Instead of using heuristic algorithms, Hwang et al. [61] proposed an MILP-based formal approach to solve the problem of scheduling for HLS. They proposed solutions for three different types of scheduling. (i) time-constrained scheduling (ii) resource-constrained scheduling and (iii) feasible-constrained scheduling, that takes both time and resource constraints and outputs a solution if it exists. The authors used a combination of ASAP, ALAP, list scheduling and MILP formulation to obtain a relatively less-complex solution with a complexity O(s.n) where s and n are number of control steps and number of operations respectively. 3.1.4 Resource allocation/binding The resource binding assigns the operations and memory accesses within each clock cycle to available hardware units. A resource such as a functional, storage, or interconnection unit can be shared by different operations, data accesses, or data transfers if they are mutually exclusive. For instance, two operations assigned to two different control steps are mutually exclusive since they will never execute simultaneously and as a result, they can be bound to the same functional unit. Binding consists of three sub-tasks based on the underlying unit type: � Storage binding assigns variables to storage units. Storage units can be of many types including registers, register files, and memory units. � Functional-unit binding assigns each operation in a control step to a functional unit. A functional unit can execute only one operation per clock cycle. � Interconnection binding assigns an interconnection unit such as a multiplexer or bus for each data transfer among ports, functional units, and storage units. There exist several approaches to resolve the problem of resource binding. Some approaches (e.g. [137]) solve all three sub-tasks simultaneously whereas other approaches either solve them one-by-one (e.g. Hybrid ALlocation (HAL) [107]) or two at a time (e.g. [102]). There are two classes of resource allocation and binding problem that are further discussed in the following section. 3.1.4.1 Interval-graph based allocation The first category of the resource allocation problems is simpler of the two where the liveness of the variables can be represented an interval-graph and an optimum solution can be found in polynomial time with a single traversal of the interval-graph. One example of such algorithms is called “Left-Edge Algorithm (LEA)” that is discussed below.

tel-00553143, version 1 - 6 Jan 2011 High-Level Synthesis (HLS) 61 Left-Edge Algorithm (LEA): LEA is an algorithm used for register allocation. It has been used previously for track assignment in channel routing [78]. It has been proven optimal, and is of complexity O(n 2 ) where n is the number of variables present in a CDFG. Essentially, the track assignment problem is solved as follows: 1. Sort the wire segments in increasing order of their left edges. 2. Assign the first segment (the leftmost edge) to the first track. 3. Find the first wire whose left edge is to the right of the last selected wire and assign it to the current track. 4. If no more, wires can be assigned to the current track, start a new track and begin again from Step 2. 5. Repeat until all wires are assigned to tracks. The life-time of each variable is mapped into a net interval in a channel routing problem. The number of tracks needed by the LEA is equal to the number of registers allocated and variables whose intervals are in the same track are assigned to the same register. 3.1.4.2 Conflict-graph based allocation The second category of resource allocation problems is harder in complexity. In such allocation problems, the liveness of the variables is difficult to calculate and it must be represented by an interference-graph or a conflict-graph. This kind of allocation problems are computationally hard and lie in the domain of NP-Complete problems. The most common algorithms to solve such resource allocation and binding problems are heuristic algorithms. Two of such algorithms are discussed in the following paragraphs. Heuristic clique partitioning [137]: For register allocation, this algorithm builds a graph where each vertex represents a variable and an edge exists between two vertices if, and only if, the two corresponding variables can share a same register (i.e. they have mutually-exclusive life-times). The graph is then partitioned into a number of cliques (a clique is a complete subgraph such that there exists an edge between every vertex of the subgraph). The number of cliques partitioned is the number of registers needed and a register is allocated for those variables corresponding to the vertices in each clique. For functional unit allocation, the vertex in the constructed graph represent the operations and an edge between the two vertices exists if, and only if, the two corresponding operations will not be performed in a same control step. The interconnect binding is performed in the similar fashion.

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