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# Synthèse de haut-niveau de contrôleurs ultra-faible consommation ...

Synthèse de haut-niveau de contrôleurs ultra-faible consommation ...

## tel-00553143, version 1

tel-00553143, version 1 - 6 Jan 2011 72 High-level synthesis and application specific processor design X0 X1 + - Y0=X0+X1 Y1=X0-X1 Figure 3.9: Data-flow graph of basic butterfly operation present in an FFT algorithm. cooling and reheating to minimize the energy of the materials. Simulated annealing is, therefore, based on a parameter that represents the temperature. Similar to the physical process of annealing, the simulated annealing algorithm modifies one simulated solution to get another new one. If the new solution is better than the initial one, it leads to the local optimum. On the other hand, a worse solution can be used to explore more widely the solution space and saves us from being trapped in a local optimum. It can be thus interesting to keep a worse solution depending on a probability calculation that is based on the cost difference and the temperature of the system. Simulated annealing has been used by several previous works to perform the instruction selection [71, 60]. Genetic Algorithm (GA): GA belong to the family of evolutionary algorithms (a sub-set of meta-heuristics). Genetic algorithms are stochastic algorithms based on adaptive search for solving optimization problems. These algorithms are based on the theory of evolution and Darwin’s principle of natural selection and apply them to a population of solutions possible to the problem. A genetic algorithm starts with a base population, generated randomly, among all solutions. Then this population undergoes cyclical stages of evaluation, selection, crossover and mutation. The algorithm stops after a given number of iterations. Constraint Satisfaction Problem (CSP): Martin et al. [91] used CSP-solving based approach to resolve the problem of instruction selection for ASIP ISE generation. A CSP is defined as a 3-tuple S = (V,D,C) where V = x1, x2, x3,..., xn is a set of variables, D = D1, D2, D3,..., Dn is a set of finite domains (FDs), and C is a set of constraints. A solution to a CSP is an assignment of a value from variable’s domain to every variable, in such a way that all constraints are satisfied. The specific problem to be modeled will determine whether we need just one solution, all solutions or an optimal solution given some cost function defined in terms of the variables. The solver builds, using the given constraints, its own consistency methods and systematic search procedures. Consistency methods try to remove inconsistent values from the domains in order to reach a set of pruned domains such that their combinations are valid solutions. Solutions to a CSP are usually found by systematically assigning values from variables domains to the variables. It is implemented as depth-first search.

tel-00553143, version 1 - 6 Jan 2011 Application Specific Instruction-set Processor (ASIP) design 73 The consistency method is called as soon as the domains of the variables for a given constraint are pruned. If a partial solution violates any of the constraints, backtracking will take place, reducing the size of the remaining search space. 3.4.3.2 Tree-based instruction selection Though the above-mentioned approaches that perform instruction selection on DAGs such as [76, 91] result in a better covering of the CDFG (i.e. lesser number of resultant patterns), the classical approach to instruction selection has been to perform tiling (pattern matching) on expression trees. The problem is simpler in complexity and can be solved in polynomial time. The problem was initially resolved using dynamic programming that is discussed in the following paragraph. Dynamic programming: Dynamic programming resolves a problem by combining solutions of sub-problems. Dynamic programming is interesting especially when the sub-problems are not independent, i.e. when sub-problems have common sub-subproblems. A dynamic programming algorithm resolves each sub-sub-problem once, and memorizes the solution. A recalculation of the solution does not take place whenever the sub-problem is encountered. Dynamic programming is thus an interesting approach when sub-problems have many sub-sub-problems in common. Most of the existing solutions to the instruction selection on expression trees are based on dynamic programming [3, 41, 114]. The instruction matching techniques on expression trees have been further developed to yield code-generator generators [41] that take a declarative specification of a processor architecture at the input and, at compiler-compile time, generate an instruction selector. These code-generator generators either perform dynamic programming at compile time [3] or use BURS (Bottom-Up Rewrite System) tree-parsing [114] to move up the dynamic programming to compiler-compile time. Bottom-Up Rewrite System (BURS) generator: Possibly the simplest way to visualize and understand complex instructions and addressing modes of a processor is to view them as expression trees in which leaves represent registers, memory locations, or constant values; whereas internal nodes represent operations. Describing even the most complex instruction is simplified when such trees are used. Figure 3.10 gives an example of tree patterns whereas Figure 3.11 shows the two possible coverings of an identical tree with different patterns. Code generators based on BURS can be extremely fast because all dynamic programming is done when the BURS automaton is built. At compile-time, it is only necessary to make two traversals of the target expression-tree: (i) bottom-up traversal to label each node with a state that encodes all optimal matches and (ii) top-down traversal that uses these states to select the instructions for each node according to the minimal cost function and emits target assembly level IR.

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