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Synthèse de haut-niveau de contrôleurs ultra-faible consommation ...

Synthèse de haut-niveau de contrôleurs ultra-faible consommation ...

tel-00553143, version 1

tel-00553143, version 1 - 6 Jan 2011 80 Hardware micro-task synthesis The design-flow under discussion in Chapter-4 .c .c .c Task C FSM.vhd Task B Task.c Compiler Front-end Tree-based Instruction Selection and Mapping Register Allocation FSM Generation Software Tasks Task A Micro-Task Synthesis Design- Flow CDFG-Level IR Assembly-Level IR Datapath.vhd Custom Datapath Model Task A Application Task C Task B Hardware Micro-Tasks .vhd .vhd .vhd .vhd System Micro-Task C Micro-Task B Micro-Task A Monitor Hardware Synthesis Tool Final IC Bitwidth Adaptation Assembly-Level IR Datapath Generation EMF-based RTL-Models for FSM and Datapath Code-Generation Tool EventA Shared Mem Model Transformation Guard Expression Evaluation Transistor Level Insertion of Power Gating EventB Proposed Textual DSL for System- Level Description Application.sysdesc System Monitor Synthesis Design- Flow CDFG of Micro-Tasks EMF-based Intermediate Model of the System SM Generation EMF-based RTL-Model for System Monitor Code-Generation Tool SM.vhd Figure 4.1: Design-flow for hardware micro-task generation.

tel-00553143, version 1 - 6 Jan 2011 Notion of hardware micro-task 81 Instruction Fetch Instruction Decode PC IMEM (external) Reg. File Instruction Execute ALU Write Back DMEM (external) (a) A simplified version of a general purpose CPU architecture with external instruction and data memories (all the components are of fixed size and cannot be customized) Reg. File Microcoded FSM Control Lines Interface for shared I/O and Mem ALU Data Lines (b) A simplified version of a generic hardware micro-task architecture (all the components can be customized to save power and area) Figure 4.2: Architectural simplicity of a hardware micro-task w.r.t. a general purpose CPU.

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