IBM AIX Continuous Availability Features - IBM Redbooks

Machine Number of
CPUs
POWER5
(1656 MHz CPU,
shared processor
LPAR, 60% ent
cap,
simultaneous
multi-threading
POWER5 (1656
MHz CPU)
To determine the total amount of memory (in bytes) being used by LMT, enter the following
shell command:
echo mtrc | kdb | grep mt_total_memory
The 64-bit kernel resizes the LMT trace buffers in response to dynamic reconfiguration events
(for POWER4 and above systems). The 32-bit kernel does not resize; it will continue to use
the buffer sizes calculated during system initialization.
Changing memory buffer sizes
For the 64-bit kernel, you can also use the /usr/sbin/raso command to increase or decrease
the memory trace buffer sizes. This is done by changing the mtrc_commonbufsize and
mtrc_rarebufsize tunable variables. These two variables are dynamic parameters, which
means they can be changed without requiring a reboot.
For example, to change the per cpu rare buffer size to sixteen 4 K pages, for this boot as well
as future boots, you would enter:
raso -p -o mtrc_rarebufsize=16
System memory Total LMT
memory: 64-bit
kernel
8 logical 16 GB 120 MB 16 MB
16 64 GB 512 MB 16 MB
Note: For either kernel, in the rare case that there is insufficient pinned memory to allocate
an LMT buffer when a CPU is being added, the CPU allocation will fail. This can be
identified by a CPU_ALLOC_ABORTED entry in the AIX error log, with detailed data
showing an Abort Cause of 0000 0008 (LMT) and Abort Data of 0000 0000 0000 000C
(ENOMEM).
For more information about the memory trace buffer size tunables, refer to raso command
documentation.
Note: Internally, LMT tracing is temporarily suspended during any 64-bit kernel buffer
resize operation.
For the 32-bit kernel, the options are limited to accepting the default (automatically
calculated) buffer sizes, or disabling LMT (to completely avoid buffer allocation).
Total LMT
memory: 32-bit
kernel
Using lightweight memory trace
This section describes various commands which are available to make use of the information
captured by lightweight memory trace. However, keep in mind that LMT is designed to be
Chapter 3. AIX advanced continuous availability tools and features 59