BLOCO DE DADOS E VHDL Contexto:
BLOCO DE DADOS E VHDL Contexto:
BLOCO DE DADOS E VHDL Contexto:
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14<br />
DP: entity work.datapath port map (clock=>clock, reset=>reset,<br />
hold=>hold, address=>address, datain=>datain, dataout=>dataout,<br />
ir=>ir, uins=>uins, n=>n, z=>z, c=>c, v=>v);<br />
Bloco de dados<br />
-- gera o clock<br />
process<br />
begin<br />
clock
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