Neuromorphic Computing From Materials to Systems Architecture
Neuromorphic-Computing-Report_FNLBLP
Neuromorphic-Computing-Report_FNLBLP
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APPENDICES <br />
Acronyms <br />
3D: Three-‐‐dimensional <br />
AER: Address Event Representation <br />
ALU: Arithmetic/Logic Unit <br />
BEOL: Back-‐‐end-‐‐of-‐‐line (BEOL) <br />
CMOS: Complementary Metal Oxide Semiconduc<strong>to</strong>r <br />
CNN: Convolutional Neural Network <br />
CPU: Central Processing Unit <br />
ColdRAM: Memory organized for infrequent access patterns <br />
DNN: Deep Neural Network <br />
DMA: Logic for supporting Direct Memory Access <br />
HotRAM: Memory organized for frequent access patterns <br />
InstRAM: Instruction Memory <br />
LIF: Leaky Integrate and Fire (neuron) <br />
LTPS: Long-‐‐Term Plasticity Synapses <br />
MLU: Machine Learning Unit, functional units optimized for ML operations <br />
MU: Memory Unit <br />
OutputRAM: Memory for holding output of operations <br />
STDP: Spike Time-‐‐Dependent Plasticity <br />
STPS: Short-‐‐Term Plasticity Synapses <br />
VLSI: Very Large-‐‐Scale Integration <br />
<strong>Neuromorphic</strong> <strong>Computing</strong>: <strong>From</strong> <strong>Materials</strong> <strong>to</strong> <strong>Systems</strong> <strong>Architecture</strong> <br />
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