Institut für Parallele und Verteilte Systeme - Universität Stuttgart
Institut für Parallele und Verteilte Systeme - Universität Stuttgart
Institut für Parallele und Verteilte Systeme - Universität Stuttgart
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2.3 Parallel Systems<br />
<strong>Universität</strong> <strong>Stuttgart</strong> - IPVS<br />
<strong>Parallele</strong> <strong>Systeme</strong><br />
<strong>Universität</strong>sstraße 38<br />
70569 <strong>Stuttgart</strong><br />
Germany<br />
Research Focus<br />
Prof. Dr.-Ing. Sven Simon<br />
� Sven.Simon@ipvs.uni-stuttgart.de<br />
� +49-711-7816450<br />
� +49-711-7816250<br />
Th e research activities of the department Parallel Systems involve the analysis and performance<br />
optimization of hardware/soft ware systems with the focus on the interaction<br />
of the diff erent levels of the system design. Th is includes the physical design level<br />
of the hardware platform, the architectural level of the devices and the algorithmic<br />
level of the application. Prototypes are built to demonstrate the effi ciency of the approach.<br />
In order to obtain very compact high performance systems the resulting hardware/soft<br />
ware systems are domain specifi c with a focus on the following research areas:<br />
▶ Parallel Real-Time Image and Video Processing<br />
In many industrial scenarios like the monitoring of manufacturing processes, the<br />
production process is controlled using image and video processing. Today’s image<br />
sensors enable resolutions well above one megapixel with frame rates exceeding<br />
several h<strong>und</strong>red fps which are well suited for monitoring even fast processes.<br />
While the raw video material can be obtained easily, its analysis using CPU-based<br />
hardware and algorithms implemented in soft ware is very time-consuming due<br />
to the huge amount of data involved. In the case of several h<strong>und</strong>red of high-resolution<br />
images per second real-time processing can be achieved by reconfi gurable<br />
hardware in conjunction with highly-parallelized algorithms. In order to apply<br />
this to process control, the latency of the algorithms mapped on the specifi c hardware<br />
platform is an important issue.<br />
▶ Hardware Accelerators for Scientifi c Computing<br />
In order to reduce the computation time in scientifi c computing, typically PC<br />
clusters or supercomputers are used. Usually, these computing resources have to<br />
be shared with other users due to cost reasons such that a certain waiting time<br />
or latency has to be accepted by the user which is the contrary of the intended<br />
acceleration. As an alternative, hardware accelerators based on GPGPUs or reconfi<br />
gurable hardware (FPGAs) can be used in personal computers such that the<br />
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