Power Block Diagram

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5 6.Schematic modify Item and History : 5 4 4 3 D D C C B B A A 3 2 2 CHANGE by IEC DATE Friday, May 21, 2010 TITLE 1 INVENTEC BAP/BXP30 SIZE CODE schematics modify DOC.NUMBER REV Custom CS CS-131 X01 SHEET 6 of 41 1
5 8.SYSTEM POWER SEQUENCE : SW OFF: 5 4 4 3 D D SW ON: RTCVCC 5VLA,3VLA 5VAUXON EC_3VLA PWR_SWIN# LATCH_ON 3VA,5VA RSMRST# PWR_BTN# SUSB# SUSC# 1.5V,1.8V 5VS,3VS 1.5VS,1.05VS 0.75VS_DIMM C C +VCCP VCCP_PWRGD VR_ON VCORE_GD CLK_PWROK ICH_PWROK PLT_RST# RTCVCC 3VLA,5VLA 5VAUXON Power on/off sequence AC insert(First) Power on sequence Power off sequence B B EC_3VLA PWR_SWIN# LATCH_ON 3VA,5VA RSMRST# PWR_BTN# SUSB# SUSC# 1.5V,1.8V 5VS,3VS 1.5VS,1.05VS 0.75VS_DIMM +VCCP Power on/off sequence AC insert(S4) MRST# PWR_BTN# SUSB# SUSC# 1.5V,1.8V 5VS,3VS 1.5VS,1.05VS 0.75VS_DIMM +VCCP VCCP_PWRGD VR_ON VCORE_GD RSMRST# PWR_BTN# SUSB# SUSC# Battery only Power on/off sequence Power on sequence Power off sequence Suspend resume sequence(S3) Suspend sequence Resume sequence A A VCCP_PWRGD VR_ON VCORE_GD CLK_PWROK ICH_PWROK PLT_RST# 99ms Power on sequence Power off sequence 99ms SW OFF: SW ON: RTCVCC 5VLA,3VLA 5VAUXON EC_3VLA PWR_SWIN# LATCH_ON 3VA,5VA CLK_PWROK ICH_PWROK PLT_RST# RTCVCC 5VLA,3VLA 5VAUXON EC_3VLA PWR_SWIN# LATCH_ON 3VA,5VA 1.5V,1.8V 5VS,3VS 1.5VS,1.05VS 0.75VS_DIMM +VCCP VCCP_PWRGD VR_ON VCORE_GD CLK_PWROK ICH_PWROK PLT_RST# 3 99ms 99ms 2 2 CHANGE by IEC DATE Friday, May 21, 2010 TITLE 1 INVENTEC BAP/BXP30 SIZE CODE Timing Diagram DOC.NUMBER REV Custom CS CS-131 X01 SHEET 7 of 41 1
Page 1 and 2: 5 5 4 4 3 D D C BAP/BXP30 C A02 Bui
Page 3 and 4: 8 3. Block Diagram : 8 Thermal 7 7
Page 5: 8 7 6 4. Net name Description : Vol
Page 9 and 10: 5 5 4 4 3 D 8,10,11,12,13,25,37 DCI
Page 11 and 12: 5 8,9,10,12,13,25,37 DCIN 5 4 C106
Page 13 and 14: 5 5 4 4 51125_SW 1 3 D 1 EC_PWR_ON
Page 15 and 16: A A B 6026B0154901-005 CN24A CN 989
Page 17 and 18: A A B VGFX_CORE 10 VCORE_CPU 9 4800
Page 19 and 20: 10 9 8 7 6 6019B0745601 U43F BD82HM
Page 21 and 22: 10 10 9 9 8 8 7 7 6 H H 1500mA 6019
Page 23 and 24: 5 10,11,12,14,15,18,19,20,21,22,24,
Page 25 and 26: 5 9,11,13,14,15,18,19,20,22,24,26,2
Page 27 and 28: 9,11,13,14,15,18,19,20,22,24,25,26,
Page 29 and 30: ODD I/F 5 5 4 4 3 CN17 Done 5VS 14,
Page 31 and 32: 32 5 CRT_RED 5 4 4 3 DOCK_DVI_CLK+
Page 33 and 34: A A B Q15 2N7002 60V 300mA SOT23 NX
Page 35 and 36: 5 5 4 4 3 U37C D C B 38 PEG_FBA_D0
Page 37 and 38: 5 5 4 4 3 PEG_1.5VS 35,38 D 31,34,3
Page 39 and 40: 5 5 4 4 3 11,15,17,23,28,29,41 1.5V
Page 41: 5 5 4 4 3 D D 11 1.5V_PWRGD 14,15,1

Power Block Diagram

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