BRKARC-3468

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Catalyst 6880-X: Packet Walks Remote Forwarding (Egress) Step 10: Fabric ASIC transmits frame to Egress Fabric Port, which is received by Egress FIRE ASIC Step 12: Inband FPGA parses Internal Header, and then it sends to Forwarding Engine Step 13: Forwarding Engine performs an egress (L2) lookup to learn MAC address. Then it returns Internal Header to FIRE ASIC (via Inband FPGA) BRKARC-3468 © 2013 Cisco and/or its affiliates. All rights reserved. Cisco Public Step 11: FIRE ASIC uses Fabric Header to derive new Internal header, which it sends to Forwarding Engine (egress lookup) Step 14: FIRE ASIC uses new Internal Header to determine Egress Port and reassemble the packet, and then it sends to MUX ASIC Step 15: MUX ASIC uses Internal Header to determine Egress Port and perform egress QoS. Then it sends to Port ASIC Step 16: Port ASIC uses removes Internal Header and rewrites VLAN, CoS, etc. Then it sends to PHY Step 17: PHY serializes the bits & converts signal, and then transmits the packet Step 18: Packet Leaves @ Egress Port 16 41
Catalyst 6880-X: Packet Walks Local Forwarding (No Fabric) Step 5: FIRE ASIC stores data payload in local buffer, and then it sends only the Internal Header to Forwarding Engine for Lookup Step 4: MUX ASIC stores packet in external buffer, and uses parsed packet to perform ingress QoS. Then it sends to 1 of 2 FIRE ASIC Step 3: Port ASIC parses packet to derive VLAN, CoS, etc. and check FCS. Then it applies Internal Header and sends to MUX ASIC Step 2: PHY converts the signal & serializes the bits, and then it sends to Port ASIC Step 1: Packet Arrives @ Ingress Port 1 Step 8: FIRE ASIC parses Internal Header to determine Egress Port & reassemble the packet, and then it sends back to MUX ASIC Step 9: MUX ASIC uses Internal Header to determine Egress Port and perform egress QoS. Then it sends to Port ASIC Step 10: Port ASIC uses removes Internal Header and rewrites VLAN, CoS, etc. Then it sends to PHY Step 11: PHY serializes the bits & converts signal, and then transmits the packet Step 12: Packet Leaves @ Egress Port 8 BRKARC-3468 © 2013 Cisco and/or its affiliates. All rights reserved. Cisco Public Step 6: Inband FPGA parses Internal Header, and then it sends to Forwarding Engine Step 7: Forwarding Engine performs L2, L3, ACL and Netflow IFE & OFE processing and determines the Egress Port & Rewrite Info. Then it returns new Internal Header to FIRE ASIC (via Inband FPGA) 42
Page 2 and 3: BRKARC-3468 Shawn Wargo - Technical
Page 4 and 5: Why is this session important? Outl
Page 6 and 7: Session Objectives At the end of th
Page 8 and 9: Enterprise Backbone Group (EBG) Bus
Page 10 and 11: EBG Product Portfolio Tomorrow Star
Page 12 and 13: Next-Generation Backbone Tomorrow S
Page 14 and 15: Introducing the New 6807-X Taking C
Page 16 and 17: Catalyst 6807-X: Mechanical View Fa
Page 18 and 19: Catalyst 6807-X: Environmental Over
Page 20 and 21: Catalyst 6807-X: PSU Redundancy & I
Page 22 and 23: Catalyst 6500-E to 6807-X: Differen
Page 24 and 25: Catalyst 6807-X: How the Current Ca
Page 26 and 27: Catalyst 6000 Goes Mini: 6880-X Opt
Page 28 and 29: 16-port SFP+ Multi-rate Port Card S
Page 30 and 31: Catalyst 6880-X: Environmental Over
Page 32 and 33: Catalyst 6880-X: PSU Redundancy & I
Page 34 and 35: Catalyst 6880-X: Fixed Supervisor D
Page 36 and 37: Catalyst 6880-X: Fixed Supervisor -
Page 38 and 39: Catalyst 6880-X: 16 x 1/10GE Port C
Page 42 and 43: Agenda Enterprise Backbone Strategy
Page 44 and 45: Catalyst 6800-X 3000+ Catalyst 6500
Page 46 and 47: Catalyst 6800-X Series: Highlights

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