An Automatic ESL Synthesis Approach by Design Space

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SYSTEMCODESIGNER • 1:23 STEFANOV, T., ZISSULESCU, C., TURJAN, A., KIENHUIS, B.,AND DEPRETTERE, E. F. 2004. System design using kahn process networks: the compaan/laura approach. In Proceedings of Design Automation & Test in Europe (DATE). 340–345. STREHL, K., THIELE, L., GRIES, M., ZIEGENBEIN, D., ERNST, R., AND TEICH, J. 2001. FunState—an internal design representation for codesign. IEEE Trans. Very Large Scale Integ. Syst. 9, 4, 524– 544. STREUBÜHR, M., FALK, J., HAUBELT, C., TEICH, J., DORSCH, R., AND SCHLIPF, T. 2006. Task-accurate performance modeling in SystemC for real-time multi-processor architectures. In Proceedings of Design, Automation and Test in Europe. IEEE Computer Society, 480–481. Synplicity. http://www.synplicity.com. XILINX 2005. Embedded SystemTools Reference Manual—Embedded Development Kit EDK 8.1i. XILINX. ZITZLER, E., LAUMANNS, M., AND THIELE, L. 2002. SPEA2: Improving the strength pareto evolutionary algorithm for multiobjective optimization. In Proceedings of the Conference on Evolutionary Methods for Design, Optimisation, and Control. 19–26. Received August 2007; revised March 2008; accepted July 2008 ACM Transactions on Design Automation of Electronic Systems, Vol. 14, No. 1, Article 1, Pub. date: January 2009.
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