J750 Interface Board Summary - Teradyne GSO
J750 Interface Board Summary - Teradyne GSO
J750 Interface Board Summary - Teradyne GSO
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<strong>J750</strong> Standard PIB/DIB Product ConfigurationsSALES P/N (Alias) Description HSD DPS HDVIS CTO MSO APMU608-382-00 <strong>J750</strong> 1024 Non MSO PIB w/HDVIS 1024 32* 96 0 No No814-671-00 (TG016) <strong>J750</strong> 512 MSO PIB w/HDVIS 512 32* 96 32 slot 7 No610-748-00 960 PIN DPS/HDVIS PIB 960 32* 96 32 No No612-429-00 512 PIN DPS/HDVIS PIB 512 32* 96 32 No No814-712-00 KIT PIB, <strong>J750</strong> TOWER 93K Compat PIB 512 16 0 16 No NoIT-900-83(232-045-00)512 PIN Standard PIB 512 32 0 32 No NoIT-900-84(232-060-00)IT-900-85(232-061-00)IT-901-29(599-015-00)1024 PIN Standard MSO PIB 1024 32 0 32 Yes No512 Pin Standard MSO PIB 512 32 0 32 Yes No1024 PIN Non-MSO PIB 1024 32 0 32 No No609-509-00 512 PIN Prototyping DIB. Uses daughter cardsfor prototyping604-637-00 512 PIN Prototyping DIB. Uses daughter cardsfor prototyping128 8 0 0 No No448 32 0 32 Yes No607-457-00 <strong>J750</strong> Training DIB (Pier DIB) 256 8 0 8 Yes NoTERADYNE CONFIDENTIAL* Due to minor pin differences between DPS and HDVIS, most but not all of the DPS features will beavailable, Please contact local <strong>GSO</strong> engineer for details7
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