Building an LLVM backend

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Part 2Creating your own target14
Bits of your ISA you need to describe●●●Target machine– Registers, register classes– Calling conventionsInstruction set– Operands and patterns– Assembly printing and/or instruction encoding– Schedule (not part of this talk)…15
Page 1 and 2: Building an LLVM BackendFraser Corm
Page 3 and 4: Overview●●●●Part 1: Backgro
Page 5 and 6: What you need to start●●●●K
Page 7 and 8: Calling convention for LEG●How va
Page 9 and 10: A look at an IR module●●●High
Page 11 and 12: A look at a MachineDAG graph●●
Page 13: A look at a MachineInstr block●
Page 17 and 18: Describing registers with TableGen
Page 19 and 20: Calling convention lowering:TableGe
Page 21 and 22: Calling convention lowering:The big
Page 23 and 24: Calling convention lowering:LowerRe
Page 25 and 26: Describing instructions:Overview●
Page 27 and 28: Describing instructions:Selection P
Page 29 and 30: Constants●Compiling this IR produ
Page 31 and 32: Constants●What if instructions ta
Page 33 and 34: Matching multiple DAG nodesmul r0,
Page 35 and 36: Frame lowering●●Example that us
Page 37 and 38: Instruction printer●●●New cla
Page 39 and 40: Instruction printer●LEGInstPrinte
Page 41 and 42: Part 3How-to for specific tasks41
Page 43 and 44: Instruction encoding●def ADDrr :
Page 45 and 46: Instruction encoding●For operand-
Page 47 and 48: Relocations and fixups●For values
Page 49 and 50: Relocations and fixups●●●●W
Page 51 and 52: Custom DAG lowering●●●●To i
Page 53 and 54: Lowering to multiple instructions
Page 55 and 56: Lowering to multiple instructions
Page 57 and 58: Part 4Troubleshooting and resources
Page 59 and 60: Debugging LLVM●●●●MIs, BBs,
Page 61 and 62: The dog ate my homework●●●Why
Page 63 and 64: You're not alone!●●●●●"Wr
Page 65:
Thank you!●●Q & AHappy to answe
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Building an LLVM backend

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