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The ARM-THUMB Procedure Call Standard

The ARM-THUMB Procedure Call Standard

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<strong>The</strong> <strong>ARM</strong>-<strong>THUMB</strong> <strong>Procedure</strong> <strong>Call</strong> <strong>Standard</strong>3 INTRODUCTIONThis standard embodies the fourth major revision of the APCS and second major revision of the TPCS. It is thefirst revision to unify the APCS and the TPCS.3.1 Design goals<strong>The</strong> goals of the ATPCS are to:ooooooSupport Thumb-state and <strong>ARM</strong>-state equally.Support inter-working between Thumb-state and <strong>ARM</strong>-state.Favor:- Small code-size.- Functionality appropriate to embedded applications.- High performance.And where these aims conflict significantly, to standardize variants covering different priorities among them.Clearly distinguish between mandatory requirements and implementation discretion.Support alternative floating-point architectures and instruction sets.Be binary compatible with:- <strong>The</strong> most commonly used variant of the previous APCS.- <strong>The</strong> most commonly used variant of the previous TPCS.3.2 ConformanceThis standard defines how separately compiled and separately assembled routines can work together. <strong>The</strong>re is anexternally visible interface between such routines. It is common that not all the externally visible interfaces tosoftware are intended to be publicly visible or open to arbitrary use. In effect, there is a mismatch between themachine-level concept of external visibility— defined rigorously by an object code format— and a higher level,application-oriented concept of external visibility— which is system-specific or application-specific.Conformance to this standard requires:ooConformance to the caller-callee contract at all publicly visible interfaces.Ubiquitous conformance to its rules of stack usage.3.3 Processes and the memory modelThis standard applies to a single thread of execution or process (the terms will be used interchangeably). A threadof execution, or process, has a memory state defined by the contents of the underlying machine registers and thecontents of the memory it can address. Memory addresses are unsigned integers.In the model used by this standard, a process can address some, or all, of these types of memory:oooRead-only memory.Statically allocated, read-write memory.Dynamically allocated read-write memory (heap memory).SWS ESPC 0002 A-05 Page 8 of 37

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