Slides - Par Lab

Coalescing ¡ GPUs and CPUs both perform memory transactions at a larger granularity than the program requests (“cache line”) ¡ GPUs have a “coalescer”, which examines memory requests dynamically from different SIMD lanes and coalesces them ¡ To use bandwidth effectively, when threads load, they should: § Present a set of unit strided loads (dense accesses) § Keep sets of loads aligned to vector boundaries 38/73