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Predicting BER with IBIS-AMI - VHDL International

Predicting BER with IBIS-AMI - VHDL International

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Jitter / Noise Modeling in HSSCDR<br />

Troy Beukema, “Challenges in Serial Electrical Interconnects at 5 to 10 GB/s and Beyond”, IEEE SSCS, 2007<br />

<strong>Predicting</strong> <strong>BER</strong> <strong>with</strong> <strong>IBIS</strong>-<strong>AMI</strong> – DesignCon 2010 – February 4, 2010 – 23<br />

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