Circuit Paradigm in the 21 Century st Circuit Paradigm in ... - Aaltodoc

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SESSION PS6: CELLULAR NONLINEAR NETWORKS. NEURAL NETWORKS. MIXED-MODE CIRCUIT DESIGN Border Connection Schemes <strong>in</strong> Partitioned Mixed-Mode CNNs Mika Laiho, Ari Paasio, Asko Kananen, Kari Halonen, Hels<strong>in</strong>ki University of Technology, F<strong>in</strong>land Paralleliz<strong>in</strong>g Image Interpolation Method by Sparse GRBF Network Sh<strong>in</strong>ji Itakura, Tsuyoshi Otake, Sophia University, Japan; Yuichi Tanji, Kagawa University, Japan; Mamoru Tanaka, Sophia University, Japan On <strong>the</strong> Oscillatory Behavior of Second Order Cell 1D CNN's Liviu Goras, Tiberiu D<strong>in</strong>u Teodorescu, Technical University Iasi, Romania Effects of Partition<strong>in</strong>g <strong>in</strong> a Mixed-Mode CNN Mika Laiho, Ari Paasio, Asko Kananen, Kari Halonen, Hels<strong>in</strong>ki University of Technology, F<strong>in</strong>land On <strong>the</strong> Class of Globally Asymptotically Stable Cellular Neural Networks with Time Delay Sabri Arik, Istanbul University, Turkey Cell and Template Order Influence on Cnn Behavior - a Comparative Study Tiberiu D<strong>in</strong>u Teodorescu, Liviu Goras, Technical University Iasi, Romania 3D Echocardiography Powered by Cnn Technology Csaba Rekeczky, PPCU, Hungary; Zsolt Czeil<strong>in</strong>ger, HIC-CPC, Hungary; György Cserey, Laszlo Kek, ANCL, Hungary; Andras Szatmari, HIC-CPC, Hungary; Tamas Roska, PPCU, Hungary Self-Organiz<strong>in</strong>g Neural Network for Fault Location <strong>in</strong> Electrical <strong>Circuit</strong>s Robert Salat, Stanislaw Osowski, Warsaw University of Technology, Poland Reduc<strong>in</strong>g Implementation Input of <strong>the</strong> Lattice-Ladder Multilayer Perceptrons Dalius Navakauskas, Vilnius Gedim<strong>in</strong>as Technical University, Lithuania Prototype <strong>Circuit</strong>s for Programmable Neural Network Krzysztof Wawryn, Andrzej Mazurek, Technical University of Koszal<strong>in</strong>, Poland III-265 III-269 III-273 III-277 III-281 III-285 III-289 III-293 III-297 III-301 XX Chaotic Sequences to Improve Genetic Algorithms Performances Riccardo Caponetto, STMicroelectronics, Soft Comput<strong>in</strong>g Group, Catania, Italy; Paolo Arena, Università di Catania, Facoltà di Ingegneria, D.E.E.S., Catania; Stefano Fazz<strong>in</strong>o, Università di Catania, Facoltà di Ingegneria, D.E.E.S., Italy; Luigi Fortuna, Università di Catania, Facoltà di Ingegneria, D.E.E.S, Italy Accuracy Improvements <strong>in</strong> a Mixed Signal Power Meter <strong>Circuit</strong> by Means of System and Design Enhancements Gerhard Fritz, Anton Prantl, Austria Mikro Systeme International AG, Austria Development and Comparison of Numerical Rounded Stripl<strong>in</strong>e Bend Models Janne Roos, Hels<strong>in</strong>ki University of Technology, F<strong>in</strong>land; Neslihan Serap Sengör, Istanbul Technical University, Turkey; Tommi Dufva, VTT Information Technology, F<strong>in</strong>land Syn<strong>the</strong>sis of Low-Power Digital <strong>Circuit</strong>s Derived from B<strong>in</strong>ary Decision Diagrams Denis Popel, University of Wollongong, Dubai Campus, United Arab Emirates 15:20 — 16:40 SESSION R22: LOW-POWER INTEGRATED CIRCUIT DESIGN Session Room A Low Power LVDS Receiver with High Common Mode Rejection Xavier Maillard, Frédéric Devisch, Maarten Kuijk, VUB/ETRO, Belgium An Analog CMOS Four Quadrant Current- Mode Multiplier for Low Power Artificial Neural Networks Implementation Maurizio Valle, Francesco Diotalevi, DIBE - University of Genova, Italy A Low-Power, High-Resolution, 6MHz Comparator Mehdi Banihashemi, Khayrollah Hadidi, Abdollah Khoei, Urmia University - eecs, Iran Estimation and M<strong>in</strong>imization of Leakage Power Dissipation <strong>in</strong> VLSI <strong>Circuit</strong>s Wen-Tsong Shiue, Silicon Metrics Corporation, USA III-305 III-309 III-313 III-317 III-3<strong>21</strong> III-325 III-329 III-333
SESSION R23: ADAPTIVE SIGNAL PROCESSING Session Room B Adaptive S<strong>in</strong>e-Modulated/Cos<strong>in</strong>e- Modulated Filter Bank Equalizer for Transmultiplexers Juuso Alhava, Markku Renfors, Tampere University of Technology/TLT, F<strong>in</strong>land Novel Stochastic Gradient Adaptive Algorithm with Variable Length Corneliu Rusu, Tampere University of Technology / Signal Process<strong>in</strong>g Laboratory/Tampere International Center for Signal Process<strong>in</strong>g, F<strong>in</strong>land; Col<strong>in</strong> F. N. Cowan, The Queen's University of Belfast / Dept. of Electrical and Electronic Eng<strong>in</strong>eer<strong>in</strong>g, UK A Robust Adaptive Scheme for L<strong>in</strong>e- Frequency Signal Process<strong>in</strong>g Olli Va<strong>in</strong>io, Tampere University of Technology, F<strong>in</strong>land A Complex Adaptive IIR Notch Filter Algorithm with Optimal Convergence Factor Yaohui Liu, Timo Laakso, Hels<strong>in</strong>ki University of Technology, F<strong>in</strong>land; Paulo D<strong>in</strong>iz, Universidade Federal do Rio de Janeiro, Brazil SESSION R24: A/D AND D/A CONVERTERS Session Room C Time Non L<strong>in</strong>earities <strong>in</strong> D/A Converters Konstant<strong>in</strong>os Doris, Technical University E<strong>in</strong>dhoven, The Ne<strong>the</strong>rlands; Dom<strong>in</strong>e Leenaerts, Philips Research Laboratories, The Ne<strong>the</strong>rlands; Arthur van Roermund, Technical University E<strong>in</strong>dhoven, The Ne<strong>the</strong>rlands A 6-bit, 1-GHz Flash ADC <strong>in</strong> 0.35 um CMOS Koen Uyttenhove, Michiel Steyaert, KUL- ESAT-MICAS, Belgium Novel High-Speed 5-bit and 6-bit A/D Converters Based on Capacitive Ripple- Flash <strong>Circuit</strong> Architecture Renato Baumgartner, Yusuf Leblebici, Worcester Polytechnic Institute, USA A Very Accurate Averag<strong>in</strong>g <strong>Circuit</strong> Technique for <strong>the</strong> Switched Capacitor DAC Hristo Hristov, Angel Popov, TU-Sofia, Bulgaria III-337 III-341 III-345 III-349 III-353 III-357 III-361 III-365 XXI SESSION R25: MICROELECTROMECHANICAL SYSTEMS Session Room D A 500 KHz Micromechanical Oscillator Based on Cantilever Resonator Miikka Ylimaula, Markku Åberg, VTT Electronics, Microelectronics, F<strong>in</strong>land Equivalence of Electrical <strong>Circuit</strong>s and Micro-Mechanical Oscillat<strong>in</strong>g Structures and its Applications to Complex Filter Structures Dimitri Galayko, Andreas Kaiser, ISEN- IEMN/CNRS, France Nonl<strong>in</strong>ear <strong>Circuit</strong> Simulation of Mems Components: Controlled Current Source Approach Timo Veijola, Hels<strong>in</strong>ki University of Technology, F<strong>in</strong>land Implementation of CMOS Compatible Conductance-Based Micro-Gas-Sensor System Muhammad Y. Afridi, John S. Suehle, NIST, USA; Mona E. Zaghloul, GWU, USA; Jason E. Tiffany, Richard E. Cavicchi, NIST, USA SESSION R26: SIMULATION AND MODELING III Session Room E A Hybrid Method for Optimal Design with General Distributions K. Ponnambalam, University of Waterloo, Canada; Jacek Wojciechowski, Warsaw University of Technology, Poland; Jiri Vlach, University of Waterloo, Canada Us<strong>in</strong>g an Event-Driven Model to Optimise Charge Pump Phase Locked Loops Pascal Acco, LESIA du DGEI, INSA, France Novel Time-Doma<strong>in</strong> Methods for Free- Runn<strong>in</strong>g Oscillators Stephan Houben, E<strong>in</strong>dhoven University of Technology, The Ne<strong>the</strong>rlands; Jan ter Maten, Philips Research Laboratories, The Ne<strong>the</strong>rlands; Jos Maubach, E<strong>in</strong>dhoven University of Technology, The Ne<strong>the</strong>rlands; Jos Peters, Philips Research Laboratories, The Ne<strong>the</strong>rlands Distortion Analysis of Balanced RF Amplifiers Us<strong>in</strong>g 2nd and 3rd Order Phasors Timo Rahkonen, Joel Vuolevi, University of Oulu, F<strong>in</strong>land III-369 III-373 III-377 III-381 III-385 III-389 III-393 III-397
Page 1 and 2: Circuit Pa
Page 3 and 4: Circuit Pa
Page 5: FOREWORD The first European Confere
Page 8 and 9: SESSION S2: APPLICATIONS OF SYMBOLI
Page 10 and 11: Fully Differential Operational Ampl
Page 12 and 13: SESSION PS2: RF CIRCUITS. POWER CIR
Page 14 and 15: SESSION S10: LOW-POWER CMOS SENSORS
Page 16 and 17: Comparison of Different Chaos Shift
Page 18 and 19: Rns-Fpl Merged Polyphase DWT Archit
Page 20 and 21: Nonlinear Analysis
Page 24 and 25: SESSION R27: NEURAL NETWORKS Sessio
Page 26 and 27: Fritz, Gerhard ....................
Page 28 and 29: Suykens, Johan..........II-273, III
Page 30 and 31: Co-operation: The Society of Electr
Page 32: ECCTD'01 Program Schedule Day Time

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