5. APLAC Editor Glossary - Niksula

Version 8.10 

APLAC 

Index & Glossaries 

Technical Support

APLAC Version 8.10 Index & Glossaries Technical Support 

c○ 2005 APLAC Solutions Corporation. All Rights Reserved. 

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any non-APLAC CAD framework you choose to use, as well as related conventions. For additional 

information, please refer to the documentation that came with your computer system or your CAD 

framework. Procedures and applications are presented for their instructional value. They have been 

carefully tested, but are not guaranteed for any specific computer system application. Complete 

manuals are delivered in PDF format. Release Notes supplement each APLAC software revision 

and manual update. 

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support@aplac.com 

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and PostScript 

are registered trademarks of Adobe Systems Incorporated. APLAC 

is 

a registered trademark of the APLAC Solutions Corporation. FLEXlm 

is a registered trademark 

of Macrovision Corporation. Hardlock 

is a registered trademark of Aladdin Knowledge Systems. 

HP-UX 

is a registered trademark of Hewlett-Packard Company. LINUX 

is a registered trademark 

of Linus Torvalds. MATLAB 

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This manual was typeset April 2005

Contents page i 

APLAC includes a rich collection of basic linear and nonlinear models, semiconductor 

models, and much more. APLAC modules Fast RF-IC and RF Board are empowered 

by application-optimized algorithms. A versatile collection of system-level 

blocks are available for the simulation and design of analog and digital communication 

systems, including Micro-Electromechanical Systems. An FDTD-based electromagnetic 

simulator and radio access modules Bluetooth and WLAN contribute 

further simulation functionality. 

New and customized models can be created, by the user or by the APLAC support 

team, using the C-model Interface or the Artificial Neural Network model generator. 

Contents 

1 TECHNICAL SUPPORT APP-1.1 

2 General Index APP-2.1 

3 Categorical Index APP-3.1 

4 APLAC Bibliography APP-4.1 

5 APLAC Editor Glossary APP-5.1 

6 APLAC Simulator Glossary APP-6.1 

7 LINK Glossary APP-7.1 

8 FLEXlm Glossary APP-8.1 

9 Complete List of APLAC 8.10 Examples APP-9.1 

9.1 Analysis methods/AC . . . . . . . . . . . . . . . . APP-9.1 

9.2 Analysis methods/ANN . . . . . . . . . . . . . . . APP-9.1 

9.2.1 Analysis methods/ANN/JFET . . . . . . . . APP-9.1 

9.2.2 Analysis methods/ANN/RSB . . . . . . . . APP-9.2 

General Index Examples Main Page

Contents page ii 

9.3 Analysis methods/Common problems . . . . . . . APP-9.2 

9.4 Analysis methods/DC . . . . . . . . . . . . . . . . APP-9.2 

9.5 Analysis methods/Graphics . . . . . . . . . . . . . APP-9.2 

9.6 Analysis methods/HB 1-TONE . . . . . . . . . . . APP-9.2 

9.7 Analysis methods/HB 1-TONE/submodels . . . . . APP-9.3 


9.9 Analysis methods/HB 2-TONE/submodels . . . . . APP-9.3 


9.11 Analysis methods/Library creation . . . . . . . . . APP-9.4 

9.12 Analysis methods/Noise . . . . . . . . . . . . . . . APP-9.4 

9.12.1 Analysis methods/Noise/leesonsub . . . . APP-9.4 

9.12.2 Analysis methods/Noise/submodels . . . . APP-9.5 

9.13 Analysis methods/Optimization . . . . . . . . . . . APP-9.5 

9.13.1 Analysis methods/Optimization/filtoptcap . APP-9.6 

9.13.2 Analysis methods/Optimization/filtoptind . . APP-9.6 

9.14 Analysis methods/S-parameters . . . . . . . . . . APP-9.6 

9.15 Analysis methods/Sensitivity . . . . . . . . . . . . APP-9.7 

9.16 Analysis methods/Stability . . . . . . . . . . . . . . APP-9.7 

9.17 Analysis methods/Statistical MC . . . . . . . . . . APP-9.7 

9.17.1 Analysis methods/Statistical MC/libraries . APP-9.8 

9.18 Analysis methods/Submodels . . . . . . . . . . . . APP-9.8 

9.18.1 Analysis methods/Submodels/submodels . APP-9.8 

9.19 Analysis methods/TRAN . . . . . . . . . . . . . . . APP-9.8 

9.19.1 Analysis methods/TRAN/submodels . . . . APP-9.8 

9.20 Devices/Amplifiers . . . . . . . . . . . . . . . . . . APP-9.9 

9.20.1 Devices/Amplifiers/RFIC libraries . . . . . . APP-9.9 

9.20.2 Devices/Amplifiers/submodels . . . . . . . APP-9.9 

9.21 Devices/BJT characterization . . . . . . . . . . . . APP-9.9 


Contents page iii 

9.21.1 Devices/BJT characterization/libraries . . . APP-9.10 

9.22 Devices/FET characterization . . . . . . . . . . . . APP-9.10 

9.22.1 Devices/FET characterization/libraries . . . APP-9.10 

9.23 Devices/Filters . . . . . . . . . . . . . . . . . . . . APP-9.10 

9.23.1 Devices/Filters/filtoptcap . . . . . . . . . . . APP-9.11 

9.23.2 Devices/Filters/filtoptind . . . . . . . . . . . APP-9.11 

9.24 Devices/MEMS . . . . . . . . . . . . . . . . . . . . APP-9.11 

9.24.1 Devices/MEMS/beamfiltersub . . . . . . . . APP-9.13 

9.24.2 Devices/MEMS/combdrive . . . . . . . . . APP-9.14 

9.24.3 Devices/MEMS/ex00reso . . . . . . . . . . APP-9.14 

9.24.4 Devices/MEMS/mechanicalfiltersub . . . . APP-9.14 

9.24.5 Devices/MEMS/reso4sub . . . . . . . . . . APP-9.14 

9.24.6 Devices/MEMS/tiltinggasdampersub . . . . APP-9.14 

9.25 Devices/Matching . . . . . . . . . . . . . . . . . . . APP-9.15 

9.26 Devices/Mixers . . . . . . . . . . . . . . . . . . . . APP-9.15 

9.26.1 Devices/Mixers/RFIC libraries . . . . . . . . APP-9.15 

9.26.2 Devices/Mixers/submodels . . . . . . . . . APP-9.15 

9.27 Devices/Multipliers . . . . . . . . . . . . . . . . . . APP-9.15 

9.27.1 Devices/Multipliers/submodels . . . . . . . APP-9.16 

9.28 Devices/Oscillators . . . . . . . . . . . . . . . . . . APP-9.16 

9.28.1 Devices/Oscillators/VCO libraries . . . . . . APP-9.16 

9.29 Devices/PLL . . . . . . . . . . . . . . . . . . . . . APP-9.16 

9.30 Devices/Switches . . . . . . . . . . . . . . . . . . . APP-9.17 

9.31 Measurements/amps . . . . . . . . . . . . . . . . . APP-9.17 

9.31.1 Measurements/amps/more . . . . . . . . . APP-9.17 

9.32 Measurements/bias . . . . . . . . . . . . . . . . . APP-9.18 

9.32.1 Measurements/bias/more . . . . . . . . . . APP-9.18 

9.33 Measurements/dividers . . . . . . . . . . . . . . . APP-9.18 


Contents page iv 

9.34 Measurements/filters . . . . . . . . . . . . . . . . . APP-9.18 

9.35 Measurements/generic . . . . . . . . . . . . . . . . APP-9.18 

9.36 Measurements/mixers . . . . . . . . . . . . . . . . APP-9.19 

9.36.1 Measurements/mixers/more . . . . . . . . . APP-9.19 

9.36.2 Measurements/mixers/more/differential/down APP-9.19 

9.36.3 Measurements/mixers/more/differential/up . APP-9.19 

9.36.4 Measurements/mixers/more/singleended/down APP-9.20 

9.36.5 Measurements/mixers/more/singleended/up APP-9.20 

9.37 Measurements/models . . . . . . . . . . . . . . . . APP-9.20 

9.38 Measurements/oscillators . . . . . . . . . . . . . . APP-9.20 

9.38.1 Measurements/oscillators/more . . . . . . . APP-9.21 

9.39 Measurements/switches . . . . . . . . . . . . . . . APP-9.21 

9.40 System/16-QAM . . . . . . . . . . . . . . . . . . . APP-9.21 

9.41 System/32-TCM . . . . . . . . . . . . . . . . . . . APP-9.21 

9.42 System/64-QAM . . . . . . . . . . . . . . . . . . . APP-9.21 

9.43 System/AGC . . . . . . . . . . . . . . . . . . . . . APP-9.22 

9.44 System/AM . . . . . . . . . . . . . . . . . . . . . . APP-9.22 

9.45 System/BER . . . . . . . . . . . . . . . . . . . . . APP-9.22 

9.46 System/BLUETOOTH . . . . . . . . . . . . . . . . APP-9.22 

9.47 System/CONSTELLATION . . . . . . . . . . . . . APP-9.22 

9.48 System/COSIMULATION . . . . . . . . . . . . . . APP-9.23 

9.49 System/DIGITAL . . . . . . . . . . . . . . . . . . . APP-9.23 

9.50 System/EYE . . . . . . . . . . . . . . . . . . . . . APP-9.23 

9.51 System/FM . . . . . . . . . . . . . . . . . . . . . . APP-9.23 

9.52 System/FORMULA BASED . . . . . . . . . . . . . APP-9.24 

9.53 System/FREQRESPONSE . . . . . . . . . . . . . APP-9.24 

9.54 System/FSK . . . . . . . . . . . . . . . . . . . . . APP-9.24 

9.55 System/GSM . . . . . . . . . . . . . . . . . . . . . APP-9.24 


Contents page v 

9.56 System/IMAGE REJECTION . . . . . . . . . . . . APP-9.24 

9.57 System/IQ . . . . . . . . . . . . . . . . . . . . . . . APP-9.25 

9.58 System/PSK . . . . . . . . . . . . . . . . . . . . . APP-9.25 

9.59 System/PWM . . . . . . . . . . . . . . . . . . . . . APP-9.25 

9.60 System/QPSK . . . . . . . . . . . . . . . . . . . . APP-9.25 

9.61 System/SNR . . . . . . . . . . . . . . . . . . . . . APP-9.25 

9.62 System/SPECTRUM . . . . . . . . . . . . . . . . . APP-9.25 

9.63 System/SYNCHRONIZATION . . . . . . . . . . . . APP-9.26 

9.64 System/VECTOR SIGNALS . . . . . . . . . . . . . APP-9.26 

9.65 System/WAVEFORM . . . . . . . . . . . . . . . . . APP-9.26 

9.66 System/WLANa . . . . . . . . . . . . . . . . . . . . APP-9.26 

9.66.1 System/WLANa/WLANSubModels . . . . . APP-9.27 

9.67 System/WLANb . . . . . . . . . . . . . . . . . . . . APP-9.27 

9.67.1 System/WLANb/WLANSubModels . . . . . APP-9.27 


TECHNICAL SUPPORT page APP-1.1 

1. TECHNICAL SUPPORT 

APLAC software is under constant, intense development. Service contract customers receive regular 

updates of new product functionality with examples. Help Desk staff deals confidentially with APLACrelated 

questions and currently active design issues. Your feedback sets the guidelines. 

If you have questions or comments regarding APLAC software, services or training, you can contact 

APLAC Solutions user support staff: 

by email - support@aplac.com 

by phone - +358 9 5404 5010 (GMT+2) 

Many corporate customers host structured training on their premises to increase user productivity. 

Participants should be familiar with the basics of analog electronics and the Microsoft Windows 

operating system. 

Basic courses include: 

• Basic concepts, benefits, and parameters in circuit simulation 

• Various circuit analysis methods, theory and demonstrated examples 

• Use of variables, manual tuning and statistical analysis 

• Hierarchical modelling using the schematic entry tool 

Advanced courses include: 

• Nonlinear simulation, steady-state and transient analysis, harmonic balance 

• Theory and methods of communications system design and simulation 

• Optimization & statistical methods, automated features and design quality 

• Component modelling, evaluation, implementation and conversion 

The APLAC Website is available at http://www.aplac.com. 

Please let us know how our user documentation serves you best, by contacting us at 

publications@aplac.com. 


Symbols A B C D E F G H I J K L M N O P Q R S T U V W X Y Z Categorical Index page APP-2.1 

2. General Index 

.asd (file type), EM-2.4 

.dvl (file type), EM-2.4 

.eir (file type), EM-2.4 

.i (file type), EM-2.4, RIV-4.18 

.n (file type), RIV-4.18 

.rdp (file type), EM-2.4 

.s1p (file type), EM-2.4 

.sar (file type), EM-2.4 

.ssd (file type), EM-2.4 

.t (file type), EM-2.4 

#, see directive 

3D graphics, RIV-3.106 

AC analysis, RIV-3.6 

Amplifier matching, RIV-3.53 

Balanced mixer, RIV-3.72 

Basic receiver design, RIV-3.83 

Chua’s circuit, RIV-3.86 

Colpitts oscillator, RIV-3.75 

Coupled line, RIV-3.97 

Current mirror, RIV-3.113 

DC analysis, RIV-3.4 

DC characteristics of a simple Ebers-Moll model, RIV-3.39 

Design centering, RIV-3.28 

FET frequency multiplier, RIV-3.58 

For-loop example, RIV-3.88 

Frequency doubler, RIV-3.61 

Harmonic balance analysis, RIV-3.11, RIV-3.78 

Main Page Online Help Index


Ideal switched-capacitor circuit, RIV-3.90 

JFET model parameter extraction, RIV-3.117 

Line fitting, RIV-3.104 

Mathematics, RIV-3.111 

Monte Carlo analysis, RIV-3.24 

Noise analysis, RIV-3.14 

Nominal optimization using GoalData, RIV-3.21 

Nominal optimization, RIV-3.16 

Nonideal switched-capacitor circuit, RIV-3.94 

Optimization example, including design centering, RIV-3.30 

Output intercept point calculation, RIV-3.69 

PLL transient analysis, RIV-3.63 

Printed circuit board (PCB) example, RIV-3.101 

Representing numerical data graphically, RIV-3.108 

S parameter presentation of an amplifier, RIV-3.43 

Stability and gain circles, RIV-3.50 

Transient analysis, RIV-3.75, RIV-3.8 

Transistor DC curves, RIV-3.41 

Transistor S parameters, RIV-3.46 

Transmission line with an S parameter example, RIV-3.35 

About APLAC Editor, RIV-4.26 

AC analysis, RIV-2.21, RIV-3.6, UMAN-2.1 

sensitivity, RIV-2.23 

AC sensitivity, RIV-2.23 

AC voltage, RIV-2.21 

Accelerometer, Accelerometer-1 

Accuracy 

harmonic balance analysis, RIV-6.3 



transient analysis, RIV-6.3 

Aclin, Aclin-1 

ADC, ADC-1 

Add 

External Library, RIV-4.14 

Adder, Adder-1 

Air core inductor, AirInd-1 

AirInd, AirInd-1 

Almost-periodic Fourier transform, RIV-2.46 

Alt 

L, RIV-4.11 

U, RIV-4.10 

Amplifier, Amplifier-1, Amplifier-1, Amplifier-1 

common emitter, RIV-3.1 

optimization, RIV-3.53 

transistor, RIV-3.69 

Amplitude dump, AmplShot-1 

Amplitude modulator, AmplModulator-1 

AmplModulator, AmplModulator-1 

AmplShot, AmplShot-1 

AmplShot (file type), EM-2.4 

Analog-to-digital converter, ADC-1 

Analysing, RIV-4.2 

Analysis 

H parameter, RIV-2.25 

n port analysis, RIV-2.25 

S parameter, RIV-2.25 

Y parameter, RIV-2.25 



Z parameter, RIV-2.25 

analysis, RI-1.3, RII-1.1, RIII-1.1, RIV-1.1 

Analysis modes 



harmonic balance, RIV-2.37, RIV-2.44, RIV-2.49 

large-signal/small-signal noise analysis, RIV-2.51 

noise analysis, RIV-2.32 

sensitivity functions, RIV-2.19, RIV-2.23 


Wizards, RIV-4.2 

Analysis setup, Prepare-1 

Analysis Statement Pages, RI-1.6, RII-1.4, RIII-1.4, RIV-1.4 

Analysis Types, Analyze-1 

Analyze, Analyze-1 

And, And-1 

Angular frequency, RIV-2.23 

Anneal, Anneal-1 

Annealing optimization, Anneal-1 

ANNModel, ANNModel-1 

Antenna, Antenna-1 

Antenna Input Block, Antenna-1 

APFT, RIV-2.46 

APLAC 

Editor, RIV-4.7 

Program, RIV-4.21 

APLAC Function Pages, RI-1.6, RII-1.4, RIII-1.4, RIV-1.4 

APLAC Language, UMAN-1.7 



APLAC Simulator 

UNIX, RIV-4.52 

Windows, RIV-4.48 

APLAC Version Info 

F1, RIV-4.26 

AplacVar, RIV-2.9, RIV-4.2, see Var 

Application error, RIV-6.1 

Arguments 

multiple, RIV-6.4 

Arrow keys, RIV-4.62 

Artificial Neural Network Model, ANNModel-1 

Asynchronous FIFO, FIFO-1 

Attenuator, Attenuator-1 

Backlash, Backlash-1 

Backlash nonlinearity (hysteresis), Backlash-1 

Baseband To Vector Converter, BBToBus-1 

Baseband waveform generator, Waveform-1 

BBToBus, BBToBus-1 

BeamElement, BeamElement-1 

BERMeter, BERMeter-1 

Bessel bandpass filter, BesselBP-1 

Bessel bandstop filter, BesselBS-1 

Bessel highpass filter, BesselHP-1 

Bessel lowpass filter, BesselLP-1 

BesselBP, BesselBP-1 

BesselBS, BesselBS-1 

BesselHP, BesselHP-1 

BesselLP, BesselLP-1 



Bias, Bias-1 

Binary symmetric channel, BinaryChannel-1 

BinaryChannel, BinaryChannel-1 

Bipolar transistor, BJT-1, Trans-1 

example, RIV-3.2 

Bit detector, BitDetector-1 

Bit mapper, BitMapper-1 

Bit Remover, BitRemover-1 

Bit sequence source, BitGenerator-1, BitGenerator-1 

Bit Vector Puncturer, Puncturer-1, Puncturer-1 

Bit-error-rate meter, BERMeter-1 

BitDetector, BitDetector-1 

BitGenerator, BitGenerator-1, BitGenerator-1 

BitMapper, BitMapper-1 

BitRemover, BitRemover-1 

BJT, BJT-1 

BJT, UMAN-2.2 

Black box, BlackBox-1 

BlackBox, BlackBox-1 

Blocking, Blocking-1 

Blocking a system, Blocking-1 

BLT Forward Error Correction (FEC) Coder, BltFec23Cod-1 

BLT Forward Error Correction (FEC) Decoder, BltFec32DeCod-1 

BLT Frequency Demodulator, BltDeMod-1 

BLT Frequency Demodulator with Frequency Hopping, BltHopDeMod-1 

BLT GFSK Modulator, BltModulator-1 

BLT Signal Source, BltSource-1 

BltDeMod, BltDeMod-1 



BltFec23Cod, BltFec23Cod-1 

BltFec32DeCod, BltFec32DeCod-1 

BltHopCnt, BltHopCnt-1 

BltHopDeMod, BltHopDeMod-1 

BltModulator, BltModulator-1 

BltSource, BltSource-1 

Boolean functions, UMAN-2.1 

Branch swapping, SwapBranch-1 

Broadside-coupled stripline, Sbclin-1 

BSIM, BSIM-1 

BSIM level 3 MOS transistor, BSIM3-1 

BSIM level 4 MOS transistor, BSIM4-1 

BSIM MOS transistor model, BSIM-1 

BSIM3, BSIM3-1 

BSIM3SOI, BSIM3SOI-1 

BSIM3SOI MOS transistor, BSIM3SOI-1 

BSIM4, BSIM4-1 

Buffer, Buffer-1 

Building block for flexible beams, BeamElement-1 

Burst noise, RIV-2.32, RIV-2.35 

Bus Combiner, BusCombiner-1 

Bus error, RIV-6.1 

Bus Inverter, BusInverter-1 

Bus Splitter, BusSplitter-1 

BusCombiner, BusCombiner-1 

BusInverter, BusInverter-1 

BusSplitter, BusSplitter-1 

BusToBB, BusToBB-1 



Butterworth bandpass filter, ButterworthBP-1 

Butterworth bandstop filter, ButterworthBS-1 

Butterworth highpass filter, ButterworthHP-1 

Butterworth lowpass filter, ButterworthLP-1 

ButterworthBP, ButterworthBP-1 

ButterworthBS, ButterworthBS-1 

ButterworthHP, ButterworthHP-1 

ButterworthLP, ButterworthLP-1 

Bypass, Bypass-1 

Bypass Block, Bypass-1 

Capacitor, RIV-2.3, see Capacitance 

Cap, UMAN-2.2 

Change Symbol and Pin Order, RIV-4.19 

Chaos 


Cir2Sys, UMAN-2.1 

Circuit description, RIV-3.2 

Circuit Diagram, RIV-4.11 

Circuit diagram, UMAN-2.1 

Circuit hierarchy, UMAN-2.1 

Close, RIV-4.12, RIV-4.8 


Colors, RIV-4.22 


Command, RIV-4.18 

Command line arguments 

UNIX, RIV-5.1 

Windows, RIV-5.1 



Comment Note Box, RIV-4.15 

Complex 

arithmetic, see Input file 

Complex numbers, RIV-6.4 

Component 

Add, RIV-4.1 

Insert, RIV-4.13 

Selecting, RIV-4.10 

Component Editor, RIV-4.29 

Component Library 

F1, RIV-4.26 

Component Menu, UMAN-2.1 

Component Pages, RI-1.6, RII-1.4, RIII-1.4, RIV-1.4 

components, RI-1.3, RII-1.1, RIII-1.1, RIV-1.1 

Conducting patch, Patch-1 

Constant noise circles, RIV-2.35 

Control + +, RIV-4.11 

Control + -, RIV-4.11 

Control + C, RIV-4.10 

Control + D, RIV-4.11 

Control + F, RIV-4.11 

Control + H, RIV-4.13 

Control + I, RIV-4.13 

Control + O, RIV-4.13 

Control + Q, RIV-4.17 

Control + R, RIV-4.11 

Control + Return, RIV-4.19 

Control + V, RIV-4.11 



Control + W, RIV-4.17 

Control + X, RIV-4.10 

Control + Z, RIV-4.13 

Control Object, RIV-4.15, UMAN-2.1 

As Text, RIV-4.15 

Predefined, RIV-4.30 

Controlled voltage source, Formula-1 

Convergence 

controlling DC voltages, RIV-6.3 

derivatives, RIV-6.3 

impedance level, RIV-6.1 

improving convergence, RIV-6.1 

nonlinear analysis, RIV-6.2 

voltage level, RIV-6.1 

CCCS, RIV-6.3 

CCVS, RIV-6.3 

VCCS, RIV-6.3 

VCVS, RIV-6.3 

Convolution analysis 


Copy, RIV-4.10 

Core dumped, RIV-6.1 

Crash, RIV-6.1 

Crosstalk 

PCB transient analysis, RIV-3.101 

MultiLayerStruct, RIV-3.101 

Current 

AC current, RIV-2.21 



Branch, RIV-2.17 

DC current, RIV-2.17 

transient, RIV-2.36 

waveform, RIV-2.39 

Current Measurement, RIV-4.1 

Current measurement, UMAN-2.1 

IWf, Harmonic-1 

Cut, RIV-4.10 

Cut-off frequency 

Chebyshev filter, RIV-3.90 

DataVolume (file type), EM-2.4 

DC analysis, RIV-2.16, RIV-3.39, RIV-3.4, UMAN-2.1 

DC charcteristics, RIV-3.41 

sensitivity, RIV-2.19 

DC operating point, RIV-2.17 


DC sensitivity, RIV-2.19 

DC source, RIV-2.16 

DCINIT SOURCE STEP (convergence), GetParam-2, SetParam-3 

DCSOURCE STEP CYCLES (convergence), GetParam-3, SetParam-5 

Default, Procedure-2 

Default model parameter, Param-1 

default values, RI-1.5, RII-1.3, RIII-1.3, RIV-1.3 

Default Zoom, RIV-4.13 

DefaultString, Procedure-2 

define (directive), RIV-2.14, UMAN-2.39, UMAN-2.60 

DefModel, UMAN-2.1 

DefNPort, UMAN-2.1 



Delete, RIV-4.11 

Del, RIV-4.11 

Delimiters, UMAN-2.1 

Design centering, RIV-3.28, RIV-3.30 

Normalized, RIV-2.29 

Diagram, UMAN-2.1 

Difference Computation, Subtractor-1 

Differential equation 

Diode 

solving, RIV-3.111 

doubler, RIV-3.61 

mixer, RIV-3.72 

Disable, RIV-4.11 

Discrete-time system structure, System-1 

Dispersion 

transmission line, RIV-3.97 

Dispersive transmission line, TLineDisp-1 

Displacement limiter, NormalLimiter-1 

Display, UMAN-2.1 

Displaying results, Show-1 

Distortion, RIV-2.41, UMAN-2.1 

Down-converter analysis, RIV-2.44 

Dublicate, RIV-4.11 

Duplicate, RIV-4.11 

Ebers-Moll model, RIV-3.2, RIV-3.39 

Edit, RIV-4.12 

Copy, RIV-4.10 

Cut, RIV-4.10 






Edit Object List, RIV-4.11 

Enable, RIV-4.11 

Find, RIV-4.11 

Horizontal Flip, RIV-4.11 

Paste, RIV-4.11 

Rotate, RIV-4.11 

Select All, RIV-4.11 

Edit menu, RIV-4.10, RIV-4.54 

Edit Object List, RIV-4.11 

Edit Objects 

Editor 

Close, RIV-4.12 


Disable/Enable, RIV-4.11 


Edit, RIV-4.12 

Editor, RIV-4.12 

New, RIV-4.11 

Up/Down, RIV-4.11 

Help, RIV-4.26 

EEFET3, EEFET3-1 

EEHEMT1, EEHEMT1-1 

EEsof Scalable Nonlinear GaAsFet, EEFET3-1 

EEsof Scalable Nonlinear HEMT, EEHEMT1-1 

EKVMOS, EKVMOS-1 



Electromagnetic port, EMPort-1 

Electromechanical contact, NormalContact-1 

Electrothermal components, RI-1.10, RII-1.8, RIII-1.8, RIV-1.8 

Ellipsoid, Ellipsoid-1 

else (directive), RIV-2.15 

d, EM-2.4 

EMCap, EMCap-1 

EMConnector, EMConnector-1 

EMInd, EMInd-1 

EMPort, EMPort-1 

EMRes, EMRes-1 


End Wiring, RIV-4.17 

endif (directive), RIV-2.15, UMAN-2.60 

EndSweep, RIV-2.3 

EPFL-EKV MOS transistor, EKVMOS-1 

Error, RIV-4.6 

Error vector measuring device, ErrorVector-1 

ErrorVector, ErrorVector-1 

Exhaustive, Exhaustive-1 

Exhaustive search, Exhaustive-1 

Exit, RIV-4.10 

Monte Carlo, RIV-4.54 

Optimization, RIV-4.54 

Simulation, RIV-4.54 

Expander, Expander-1 

External Editor, RIV-4.12 

External Library 



Add, RIV-4.14 


View, RIV-4.14 

FDTD – lumped element interface, EMConnector-1 

FET 

frequency multiplier, RIV-3.58 

Field dump, SnapShot-1 

FIFO, FIFO-1 

File 

.lib, UMAN-2.1 

.s2p, UMAN-2.1 

.sub, UMAN-2.1 



Exit Monte Carlo, RIV-4.54 

Exit Optimization, RIV-4.54 

Exit Simulation, RIV-4.54 

Guess File, RIV-4.52 

New Circuit, RIV-4.8 

New System, RIV-4.8 

Open, RIV-4.8 

Print, RIV-4.52 

Print Schematic, RIV-4.9 

Print View, RIV-4.9 

Save, RIV-4.8, UMAN-2.1 

Save As, RIV-4.52, RIV-4.8 

Save Current Config, RIV-4.54 

Save Selected as Template, RIV-4.9 



Save Special, RIV-4.8 

Save Template as, RIV-4.9 

File based source, ReadFile-1 

File menu, RIV-4.52, RIV-4.8 

Filter, Filter-1, Filter-1 

biquad, RIV-3.94 

Chebyshev, RIV-3.90 

electromagnetic simulation, RIV-2.59 

low-pass ladder, RIV-3.63 

sampling frequency, RIV-3.90 

switched-capacitor, RIV-3.94 

Filter Block, Filter-1 

Filter gain and phase, ReadNthFilter-1 

Find, RIV-4.11 

Fitting lines, RIV-3.104 

Flat wire, Ribbon-1 

Flicker noise, RIV-2.32, RIV-2.35 

Flow impedance/admittance of a channel, FlowChannel-1 

FlowChannel, FlowChannel-1 

Fonts, RIV-4.22, RIV-5.3, RIV-5.9 

Formula, Formula-1 

Fourier, Fourier-1, Fourier-1 

almost-periodic transform, RIV-2.46 

generalized series, RIV-2.44 

multidimensional transform, RIV-2.46 

Fourier and Inverse Fourier, Fourier-1, Fourier-1 

Fourier transformation, UMAN-2.1 

FreqConverter, FreqConverter-1 



FreqCounter, FreqCounter-1 

FreqDivider, FreqDivider-1, UMAN-2.1 

Frequency, RIV-2.23 

doubler, RIV-3.61 

multiplier, RIV-3.58 

Frequency converter, FreqConverter-1 

Frequency counter, FreqCounter-1 

Frequency divider, FreqDivider-1 

Frequency Hopping Control Block, BltHopCnt-1 

Frequency-dependent impedance, Zblock-1 

Frequency-domain analysis 


harmonic balance, RIV-2.37, RIV-2.44, RIV-2.49 

Full Adder, FullAdder-1 

FullAdder, FullAdder-1 

Function 

function 

mathematical functions, RIV-2.12 

sensitivity functions, RIV-2.19, RIV-2.23 

input (.i) file, RIV-2.13 

user-defined, RIV-2.13 

Functional variable 

functional, see Variable 

Gain, Gain-1 

circles, RIV-3.50 

Gain budget, GainBudget-1 

GainBudget, GainBudget-1 

Gap discontinuity in a stripline, Sgap-1 



Gaussian bandpass filter, GaussianBP-1 

Gaussian lowpass filter, GaussianLP-1 

Gaussian noise source, GaussianNoise-1 

GaussianBP, GaussianBP-1 

GaussianLP, GaussianLP-1 

GaussianNoise, GaussianNoise-1 

General, RIV-4.20, RIV-4.21 

Actual Grid Size, RIV-4.20 

Auto Connection, RIV-4.21 

Draw Text Boxes, RIV-4.21 

Enable Dublicate Nodes Name Warning, RIV-4.20 

N simulators open at a time, RIV-4.21 

Show APLAC File, RIV-4.20 

Show Aplac File before simulation, RIV-4.21 

Show DCVoltages in statusbar after simulation, RIV-4.21 

Show Grid, RIV-4.20 

Show Text Output window, RIV-4.21 

Show Verbose window, RIV-4.21 

Start APLAC with APLAC Editor, RIV-4.21 

Thick Wires, RIV-4.21 

Visible Grid Size, RIV-4.20 

General coupled line, Aclin-1 

General reluctance, RmRel-1 

Generalized Fourier series, RIV-2.44 

Generate Simulation File, RIV-4.18 

Generic, Generic-1 

Genetic, Genetic-1 

Genetic optimization, Genetic-1 



GetParam, GetParam-1 


Global stripline substrate parameters, Ssub-1 

Global suspended substrate parameters, Sssub-1 

Gm, Gm-1 

Goal, Goal-1, UMAN-2.1 

Acceptance, Goal-1 

GoalData, RIV-3.21, RIV-3.30 

GoalData, GoalData-1 

Gradient, Gradient-1 

Gradient optimization, Gradient-1 

Graphics, Graphics-1, RIV-2.11 


numerical data, RIV-3.108 

Graphics windows, RIV-4.38 

GravCenter, GravCenter-1 

Gravity center optimization, GravCenter-1 

Grid, RIV-4.20 

Grid Size, RIV-4.20 

Ground, UMAN-2.2 

Group delay analysis, RIV-2.23 

Guess, Guess-1 

Guess File, RIV-4.52 

Guess file, Guess-1 

Gyrator, Gyrator-1 

Half Adder, HalfAdder-1 

HalfAdder, HalfAdder-1 

Harmonic, Harmonic-1 



Harmonic analysis source, RIV-2.39 

Harmonic balance, RIV-2.39, RIV-2.44, RIV-2.49, RIV-3.11 

balanced mixer, RIV-3.72 

frequency doubler, RIV-3.61 

large-signal/small-signal analysis, RIV-2.49 

multitone analysis, RIV-2.44, RIV-2.49 

single-tone analysis, RIV-2.37 

Sweep, RIV-3.12 

Harmonic balance (HB) analysis, UMAN-2.1 

Harmonic steady-state analysis 

harmonic balance, RIV-2.37, RIV-2.44 


large-signal/small-signal harmonic balance, RIV-2.49 

multitone harmonic balance, RIV-2.44, RIV-2.49 

Harmonic steady-state functions, Harmonic-1 

HBINIT SOURCE STEP (convergence), GetParam-2, SetParam-3 

HBSOURCE STEP CYCLES (convergence), GetParam-3, SetParam-5 

HBT, HBT-1 

Helical wire, Helix-1 

Helix, Helix-1 

Help 

About APLAC Editor, RIV-4.26 

APLAC Version Info, RIV-4.26 

Component Library, RIV-4.26 

PDF Books, RIV-4.26 

Read Application Note, RIV-4.26 

Help menu, RIV-4.26, RIV-4.62 

Heterojunction Bipolar Transistor, HBT-1 



HICUM, HICUM-1 

HICUM Level 0 Transistor Model, HICUML0-1 

HICUML0, HICUML0-1 

Hide Component Attributes, RIV-4.17 

Hide Component Name, RIV-4.17 

Hide Control Object, RIV-4.16 

Hide Object List, RIV-4.17 

Hierarchy 

Change Symbol and Pin Order, RIV-4.19 

List All Schematics, RIV-4.19 

Open hierarchical schematic, RIV-4.19 

Hierarchy menu, RIV-4.19 

High Current Bipolar Transistor Model , HICUM-1 

Hole in a stripline, SViaHole-1 

Hooke-Jeeves optimization, HookeJeeves-1 

HookeJeeves, HookeJeeves-1 

Horizontal Flip, RIV-4.11 

Hpar (parameter), Sweep-4, UMAN-2.66 

Huygen’s surface, HuygenSurface-1 

HuygenSurface, HuygenSurface-1 

electromechanical, MEMS-2.13 



ifdef (directive), RIV-2.15, UMAN-2.60, UMAN-2.63 


include (directive), RIV-2.15 

Inductor, RIV-2.3 

INIT SOURCE STEP (convergence), GetParam-2, Prepare-13, SetParam-3 



Initializing the optimizer, OptimMethod-1 

Input, UMAN-2.1 


Input file 

complex arithmetic, RIV-2.13 

complex number, RIV-2.13 

mathematical functions, RIV-2.12 

structure, RIV-2.5 

Insert, UMAN-2.1 

Analysis, RIV-4.15 

Comment Note Box, RIV-4.15 

Component, RIV-4.13 

Control Object, RIV-4.15 

Control Object as Text, RIV-4.15 

NodeName, RIV-4.14 

Recently Used Components, RIV-4.15 

Symbol, RIV-4.14 

Insert Menu 

External Library Component, RIV-4.14 

Intercept point 

OIP3 calculation, RIV-3.69 

Interface port, RmPort-1 

Internal, RIV-6.1 


JFET, JFET-1 

Jitter producer, PulseJitter-1 

JJ, JJ-1 

JKFlip flop, JKFlip flop-1 



Josephson junction, JJ-1 

Junction Field-effect Transistor, JFET-1 

Keyboard settings, RIV-4.62 

Keystrokes, RIV-4.64 

LaplaceTransform, Responsefunc-3 

Large-signal/small-signal analysis 

harmonic balance, RIV-2.49 

Launch, UMAN-2.1 

LC-resonator, Resonator-1 

libcrypt.exe (utility), RII-11.1 

libdir (directive), RIV-2.15 

Library, UMAN-2.1 

library (directive), RIV-2.15, UMAN-2.65 

Library Directory, RIV-4.22 

Linear or Nonlinear Amplifier, Amplifier-1, Amplifier-1 

LineFit, RIV-3.104 

Load, UMAN-2.1 

Logic and circuit, And-1 

Logic Buffer, Buffer-1 

Logic four-bit adder, Adder-1 

Logic JK flip-flop, JKFlip flop-1 

Logic nand circuit, Nand-1 

Logic nor circuit, Nor-1 

Logic not circuit, Not-1 

Logic or circuit, Or-1 

Logic signal edge indicator, TrigPulse-1 

Logic State Indicator, Sink-1 



Logic up-down counter, UpDownCounter-1 

Losses 

frequency-dependent, RIV-3.97 

Lumped capacitor, EMCap-1 

Lumped inductor, EMInd-1 

Lumped resistor, EMRes-1 

Manuals, UMAN-1.3 


Maximum value trace, TraceMax-1 

Measurement, Amplifier-1, Bias-1, Filter-1, Generic-1, Oscillator-1, Switch-1 

Memory fault, RIV-6.1 

Micromechanical Accelerometer, Accelerometer-1 

Microstrip 

line, RIV-3.43 

Minimum noise figure, RIV-2.35 

Mixer 

balanced, RIV-3.72 

mixer analysis, RIV-2.44 

Model, UMAN-2.1 

Parameters, RI-1.8, RII-1.6, RIII-1.6, RIV-1.6 

Model parameter extraction 

Transistor modelling, RIV-3.117 

models, RI-1.3, RII-1.1, RIII-1.1, RIV-1.1 

Modifying variables, SetVar-1 

Monte Carlo 


Monte Carlo analysis, RIV-3.24, UMAN-2.1 

Mouse, RIV-4.64 



Multidimensional Fourier transform, RIV-2.46 

MultiLayerStruct 

PCB crosstalk, RIV-3.101 

Multiple arguments, RIV-6.4 

Multitone harmonic balance analysis, see Harmonic balance 

N simulators open at a time, RIV-4.21 

n port 

analysis, RIV-2.25 

n-port circuit, NPort-1 

Nand, Nand-1 

Nelder-Mead optimization, NelderMead-1 

NelderMead, NelderMead-1 

Netlist, RIV-4.11 

Network analyzer measurements, NWA-1 

New, RIV-4.11 

New Center, RIV-4.13 

New Circuit, RIV-4.8 

New System, RIV-4.8 

NFBudget, NFBudget-1 

Node, UMAN-2.1 

NodeName, RIV-4.14 

Noise, Noise-1 


analysis, RIV-2.32, RIV-3.14 

circles, RIV-2.35 

contribution, RIV-2.32, RIV-2.51 

figure, RIV-2.33 

large-signal/small-signal noise analysis, RIV-2.51 



mechanisms, RIV-2.33 

noise analysis, RIV-2.32 

source, RIV-2.35 

temperature, RIV-2.33 

Effrn, Noise-7 

FreqNoise2L, Noise-5 

IacNoise, Noise-2 

IacNoiseContrib, Noise-3 

IhbNoise, Noise-3 

IhbNoiseContrib, Noise-3 

MinNoiseFigure, Noise-7 

MinNoiseFigureZ, Noise-7 

NoiseData, Noise-7 

PhaseNoise2L, Noise-5 

VacNoise, Noise-2 

VacNoiseContrib, Noise-3 

VhbNoise, Noise-3 

VhbNoiseContrib, Noise-3 

Noise analysis, Noise-1 

Noise figure, NoiseFigure-1 

Noise figure budget, NFBudget-1 

NoiseFigure, NoiseFigure-1 


Nonlinear 

resistance, RIV-3.86 

Nor, Nor-1 

Normal variable, see Variable 

NormalContact, NormalContact-1 



NormalLimiter, NormalLimiter-1 

Not, Not-1 

notextwindows, RIV-4.52 

NPort, NPort-1 

Nth power nonlinearity, NthPower-1 

NthPower, NthPower-1 

ntw, RIV-4.52 

Numerical data 

representing, RIV-3.108 

NWA, NWA-1 

Object 



Objective function for optimization, Goal-1 

OIP, see Intercept point 

OIP3, see Intercept point 

SCSwitch, RIV-3.94 

OpAmp, OpAmp-1 

Open, RIV-4.8 

Open ended stripline, Sloc-1 

Operating point, RIV-2.17 


Operating point analysis, UMAN-2.1 

Operational amplifier, OpAmp-1 

Optimization, UMAN-2.1 

amplifier, RIV-3.53 


nominal, RIV-3.16, RIV-3.21, RIV-3.30 



Optimization objective definition, GoalData-1 

Optimizing, RIV-4.6 

OptimMethod, OptimMethod-1, RIV-4.6 

Options 

Colors, RIV-4.22 

Fonts, RIV-4.22 

General, RIV-4.20 

Paths, RIV-4.21 

Prefix for Names, RIV-4.22 

Simulator, RIV-4.21 

Options menu, RIV-4.19 

Or, Or-1 

UNIX version, RIV-4.57 

Origo Pole, Pole-1 

Origo Zero, Zero-1 

OscGoal, RIV-3.78 

Oscil, Oscil-1 

Oscillator, Oscillator-1, Oscillator-1, Oscillator-1, UMAN-2.1 

chaotic, RIV-3.86 

Colpitts, RIV-3.75, RIV-3.78 

steady-state analysis, RIV-3.78 


Oscillator analysis, Oscil-1 

OscVar, RIV-3.78 

Output, UMAN-2.1 


Output functions referring to an EMBlock, Outputfunc-1 

Output intercept point, see Intercept point 



Outputfunc, Outputfunc-1 

Pad, Pad-1 

Param, Param-1 

Parameters 

arguments, RI-1.3, RII-1.1, RIII-1.1, RIV-1.1 

Backward Euler, RI-1.8, RII-1.6, RIII-1.6, RIV-1.6 

Electrothermal components, RI-1.10, RII-1.8, RIII-1.8, RIV-1.8 

Gear-Shichman, RI-1.8, RII-1.6, RIII-1.6, RIV-1.6 

Integration methods, RI-1.8, RII-1.6, RIII-1.6, RIV-1.6 

Model, RI-1.8, RII-1.6, RIII-1.6, RIV-1.6 

Obligatory Parameters, RI-1.3, RII-1.1, RIII-1.1, RIV-1.1 

Optional Parameters, RI-1.3, RII-1.1, RIII-1.1, RIV-1.1 

Trapezoidal, RI-1.8, RII-1.6, RIII-1.6, RIV-1.6 

Passband ripple 

Chebyshev filter, RIV-3.90 

Paste, RIV-4.11 

Patch, Patch-1 

Paths, RIV-4.21 

Aplac Program, RIV-4.21 

Library Directory, RIV-4.22 

Text Editor, RIV-4.21 

Working Directory, RIV-4.21 

Pattern Adder, PatternAdder-1, PatternAdder-1 

PatternAdder, PatternAdder-1, PatternAdder-1 

PCB 

Examples, RIV-3.101 


PCB example, RIV-3.101 



pd ctrls.dat file, RIV-4.30 

PDF Books 

F1, RIV-4.26 

Permittive and Conductive Ellipsoid, Ellipsoid-1 

Phase detector, PhaseDetector-1, PhaseDetector-1 

Phase locked loop, PLL-1, RIV-3.63 


Phase shifter, PhaseShifter-1 

PhaseDetector, PhaseDetector-1, PhaseDetector-1, UMAN-2.1 

PhaseShifter, PhaseShifter-1 

Piecewise linear nonlinearity, PWL-1 

PIN diode, PINDiode-1 

PIN diode RC, PINDiodeRC-1 

PINDiode, PINDiode-1 

PINDiodeRC, PINDiodeRC-1 

PLL, PLL-1 

Pole, Pole-1 

Pole, Responsefunc-3 

Poly, Poly-1 

Polynomial, Polynomial-1 

Polynomial nonlinearity, Polynomial-1 

Polynomial source, Poly-1 

Port, Port-1, UMAN-2.1 

Port definition, Port-1 

Post-processing, RIV-4.38 

Power Combiner, PowerCombiner-1 

Power Divider, PowerDivider-1 

Power divider, PowerDivider-1 



Power up, UMAN-2.1 

PowerCombiner, PowerCombiner-1 

PowerDivider, PowerDivider-1, PowerDivider-1 

Predefined Control Objects, RIV-4.30 

Prefix, RIV-4.22 

Prepare, Prepare-1 

Preprocessor statements, RIV-2.14 

Presentation, UMAN-2.1 

Hide Component Attributes, RIV-4.17 

Hide Component Name, RIV-4.17 

Hide Control Object, RIV-4.16 

Hide Object List, RIV-4.17 

Show Component Attributes, RIV-4.17 

Show Component Name, RIV-4.17 

Show Control Object, RIV-4.16 

Show Object List, RIV-4.16 

Previous Zoom, RIV-4.13 

VBIC, RIV-4.52 

Print, Print-1, RIV-4.52, UMAN-2.1 

HPGL, RIV-4.52 

PS, RIV-4.52 

Print Schematic, RIV-4.9 

Print View, RIV-4.9 


Printing data, Print-1 

Printing Schema 

UNIX, RIV-4.9 

Windows, RIV-4.9 



Probability, Probability-1 

Probability estimator, Probability-1 

Procedure, Procedure-1 

Procedure, Modular Customization, Procedure-1 

Procedures, RIV-4.1 

Programming, Programming-1 

Programming Statements, Programming-1 

Pulse, Pulse-1 

Pulse source, Pulse-1 

PulseJitter, PulseJitter-1 

Puncturer, Puncturer-1, Puncturer-1 

PWL, PWL-1 

PWL ACC, RIV-6.2 

PWL GRID, RIV-6.2 

PWL ITER, RIV-6.2 

QADemodulator, QADemodulator-1 

QAModulator, QAModulator-1 

Quadrature amplitude demodulator, QADemodulator-1 

Quadrature amplitude modulator, QAModulator-1 

Quantizer, Quantizer-1 

Quantizer, Sampling Clock, Quantizer-1 

Quasi-periodic waveform, RIV-2.44 

Radiated power, RadPower-1 

Radiation pattern, RadPat-1 

Radio channel, RadioChannel-1 

RadioChannel, RadioChannel-1 

RadPat, RadPat-1 



RadPower, RadPower-1 

RaisedCosineLP, Responsefunc-3 

Random, Random-1 

Random optimization, Random-1 

RC highpass filter, RCHP-1 

RCHP, Responsefunc-3 

RC lowpass filter, RCLP-1 

RCLP, Responsefunc-3 

RC-ladder, RIV-3.88 

RCHP, RCHP-1 

RCLP, RCLP-1 

RCWire, RCWire-1 

Read, Read-1, UMAN-2.1 

Read Application Note 

F1, RIV-4.26 

ReadFile, ReadFile-1 

Reading data, Read-1 

ReadNthFilter, ReadNthFilter-1 

Receiver 

design, RIV-3.83 

Rectangular inductor, Rind-1 

Rectangular stripline inductor, Srind-1 

Rectangular subarea, Slab-1 

Rectifier, Rectifier-1 

Rectifier, Maximum Hold, Rectifier-1 

REDU FILE (file type), NPort-1 

Reference Pages, RI-1.6, RII-1.4, RIII-1.4, RIV-1.4 

Reload, NWA-2, NPort-5 



Report menu, RIV-4.59 

Reroute Wire, RIV-4.17 

Res, Res-1 

RESETDC (convergence), Sweep-3 

Resistor, RIV-2.3 

Res, UMAN-2.2 

Resistor, Parasitics, Res-1 

Resonator, Resonator-1 

Response functions, Responsefunc-1 

Responsefunc, Responsefunc-1 

Ribbon, Ribbon-1 

Rind, Rind-1 

RmsRipple, RIV-2.41 

RmPort, RmPort-1 

RmRel, RmRel-1 

Rotate, RIV-4.11 

Round wire, Wire-1 

Run, RIV-4.18 

Sample-and-hold circuit, SampleHold-1 

SampleHold, SampleHold-1 

SAR value, SarSeek-1 

SarSeek, SarSeek-1 

SarSeek (file type), EM-2.4 

Save, RIV-4.8, UMAN-2.1 

Current Config, RIV-4.54 

Save As, RIV-4.52, RIV-4.8 

Save Selected as Template, RIV-4.9 

Save Special, RIV-4.8 



Save Template as, RIV-4.9 

Sbclin, Sbclin-1 

Sbend, Sbend-1 

Scales menu 

UNIX version, RIV-4.56 

Scattering parameters, see S parameter analysis 

Schmitt, Schmitt-1 

Schmitt trigger, Schmitt-1 

Sclin, Sclin-1 

Scrambler, Scrambler-1 

Scrambler, Descrambler, Scrambler-1 

SCSwitch, SCSwitch-1 

ideal, RIV-3.90 

sec:Object Editor, RIV-4.26 

Select All, RIV-4.11 

Selectable Waveform Oscillator, Oscillator-1, Oscillator-1 

Selecting Component, RIV-4.10 

Selection Indication, RIV-4.10 

Sensitivity analysis 



SetParam, SetParam-1 

SetParam, RIV-6.1 

Setting parameters, SetParam-1 

SetVar, SetVar-1 

Sgap, Sgap-1 

Shift F4 

Tile Windows, RIV-4.25 



Shift F5 

Cascade Windows, RIV-4.25 

Short, RIV-2.18, RIV-4.1, Short-1, UMAN-2.1 

Short Circuit, Ammeter, Short-1 

Short-circuited stripline, Slsc-1 

Shortcuts, RIV-4.63 

Shot noise, RIV-2.32, RIV-2.35 

Show, RIV-2.11, RIV-2.3, Show-1, UMAN-2.1 

APLAC file, RIV-4.20 

Show Aplac File before simulation, RIV-4.21 

Show Component Attributes, RIV-4.17 

Show Component Name, RIV-4.17 

Show Control Object, RIV-4.16 

Show DCVoltages in statusbar after simulation, RIV-4.21 

Show Grid, RIV-4.20 

Show Object List, RIV-4.16 

Show Simulation File, RIV-4.18 

Show Text Output window, RIV-4.21 

Show Verbose window, RIV-4.21 

Signal Attenuator, Attenuator-1 

Signal time average, TimeAverage-1 

Signal-to-noise meter, SNRMeter-1 

SIGSEGV, RIV-6.1 

simple amplifier 

Examples, RIV-3.6 

Simulate (in Windows), RIV-4.18 

Simulating, RIV-4.2 

Simulation, RIV-4.18 



Command, RIV-4.18 


Generate Simulation File, RIV-4.18 

Run (UNIX), RIV-4.18 

Show Simulation File, RIV-4.18 

Simulation controls, UMAN-2.1 

Simulation File, RIV-4.11 

Simulation menu, RIV-4.18 

Sinc Filter, SincFilter-1 

SincFilter, SincFilter-1 

Single Stripline, Slin-1 

Sink, Sink-1 

Slab, Slab-1 

Slin, Slin-1 

Slip decoder, SlipDecoder-1 

Slip encoder, SlipEncoder-1 

SlipDecoder, SlipDecoder-1 

SlipEncoder, SlipEncoder-1 

Sloc, Sloc-1 

Slsc, Slsc-1 

Small-signal analysis 


harmonic balance, RIV-2.49 

large-signal/small-signal analysis, RIV-2.49 

Smith chart, RIV-2.27, RIV-3.43 

Smith Diagram, UMAN-2.1 

SMOS, SMOS-1 

SnapShot, SnapShot-1 



SnapShot (file type), EM-2.4 

SNRMeter, SNRMeter-1 

SOURCE STEP CYCLES (convergence), GetParam-3, Prepare-13, SetParam-4 

Spar (parameter), NWA-1, RI-1.1, RIV-6.8, TwoPort-1, UMAN-2.66 

SpectralLine, UMAN-2.1 

Spectrum, RIV-2.39 

Spectrum, Harmonic-2 

SpectrumAnalyzer, UMAN-2.1 

spi2a.exe (utility), RII-11.2 

Spind, Spind-1 

Spiral inductor, Spind-1 

Spurious sidebands 

phase locked loop, RIV-3.63 

Srind, Srind-1 

SSCheck, SSCheck-1 

Ssclin, Ssclin-1 

Sslin, Sslin-1 

Sslot, Sslot-1 

SSPower, SSPower-1 

Sssub, Sssub-1 

Sstep, Sstep-1 

Ssub, Ssub-1 

Stability, Stability-1 

advanced analysis, RIV-2.29 

analysis, RIV-2.27 

circles, RIV-2.28, RIV-3.50 

envelope, RIV-2.29 

traditional analysis, RIV-2.27 



Stability and gain functions, Stability-1 

Start Wiring, RIV-4.17 

For, RIV-3.88 

Statistical analysis, UMAN-2.1 

Statistical MOS model, SMOS-1 

stderr, RIV-4.52 

stdout, RIV-4.52 

Steady state check, SSCheck-1 

Steady state power, SSPower-1 

Steady-state analysis 

harmonic balance, RIV-2.37, RIV-2.44 


multitone harmonic balance, RIV-2.44 

Steady-state source, RIV-2.39 

Stee, Stee-1 

StoreFile, StoreFile-1 

Storing and Loading Graphics, Graphics-1 

String, String-1 

String functions, String-1 

Stripline bend, Sbend-1 

Stripline impedance step, Sstep-1 

Stripline slot, Sslot-1 

Stripline T-junction, Stee-1 

Subtractor, Subtractor-1 

Sum point, SumPoint-1 

Summer, Summer-1, Summer-1 

Summing block, Summer-1, Summer-1 

SumPoint, SumPoint-1 



Surface pad, Pad-1 

Suspended substrate microstrip line, Sslin-1 

SViaHole, SViaHole-1 

SwapBranch, SwapBranch-1 

Sweep, RIV-2.11, RIV-2.3, RIV-6.1, Sweep-1, UMAN-2.1 

SweepIndex, Sweep-16 

SweepIndex, UMAN-2.1 

Switch, Switch-1, Switch-1 

Switch for SC analysis, SCSwitch-1 

rise-time, RIV-3.94 

Switched-capacitor analysis 

filter, RIV-3.90 

nonideal, RIV-3.94 

Symbol, RIV-4.15 

Symmetric coupled suspended substrate microstrips, Ssclin-1 

Symmetric edge coupled stripline, Sclin-1 

Sys2Cir, UMAN-2.1 

System, System-1, System-1 

System definition, System-1 

System functions, Systemfunc-1 

System Gain, Gain-1 

System simulation, UMAN-2.1 

Systemfunc, Systemfunc-1 

Table-based model, TableModel-1 

TableModel, TableModel-1 

Temperature, RIV-2.18 

Text Editor, RIV-4.21 

Text Output, RIV-4.52 



Text output window 

TF, TF-1 

Thermal 

Windows version, RIV-4.48 

noise, RIV-2.32, RIV-2.35 

Thick Wires, RIV-4.21 

Thin conducting wire, ThinWire-1 

ThinWire, ThinWire-1 


Time Domain Windowing for WLAN Transmitter, WLANWindow-1 

Time probe, TimeProbe-1 

Time-domain analysis, see Transient analysis 

TimeAverage, TimeAverage-1 

TimeProbe, TimeProbe-1 

TLine, TLine-1 

TLineDisp, TLineDisp-1 

Tolerance 


TONE source, RIV-2.39 

Tools menu, RIV-4.22 

Topology 

programming, RIV-3.88 

Toroid, Toroid-1 

Toroid Transformer, Toroid-1 

TraceMax, TraceMax-1 

Trans, Trans-1 

Transadmittance, VCCS, Gm-1 

Transfer function, TF-1 



Transient analysis, RIV-2.35, RIV-2.36, RIV-3.35, RIV-3.8, see Analyze TRAN, UMAN-2.1 

convolution, RIV-3.97 

frequency-domain components, RIV-3.97 

PCB crosstalk, RIV-3.101 

Transient current, RIV-2.36 

Transient source, RIV-2.36 

Transient voltage, RIV-2.36 

Transistor 

S parameters, RIV-3.46 

amplifier, RIV-3.1 

Transistor modelling 

Model parameter extraction, RIV-3.117 

Transmission line, TLine-1 

Triangle, Triangle-1 

Triangular patch, Triangle-1 

TrigPulse, TrigPulse-1 

TS2A.EXE (utility), RII-11.9 

Tuning, Tuning-1 

Tuning of optimization variables, Tuning-1 

Two-port S parameter file, TwoPort-1, TwoPort-1 

TwoPort, TwoPort-1, TwoPort-1 

TwoPort, Responsefunc-4 

undef (directive), RIV-2.16 

Undo, RIV-4.10 

Uniform noise source, UniformNoise-1 

UniformNoise, UniformNoise-1 

Up sampler, UpSampler-1 

Up/Down, RIV-4.11 



Update View, RIV-4.13 

UpDownCounter, UpDownCounter-1 

UpSampler, UpSampler-1 


Vac, RIV-2.3 

Validate Node Names, RIV-4.18 

Value of a parameter, GetParam-1 

Var, RIV-4.2, UMAN-2.1 

brace definition, RIV-2.8 

Variable, RIV-2.7 

Variable, RIV-4.2, UMAN-2.1 

brace definition, RIV-2.8 

functional, RIV-2.8 

normal, RIV-2.7 

Variable Sweeps, Sweep-1 

DC voltage, RIV-2.16 


Vector, UMAN-2.1 

Vector To Baseband Converter, BusToBB-1 

VERBOSE, RIV-4.52 

Verbose Output, RIV-4.52 

Verbose output window, RIV-4.50 


View 

Default Zoom, RIV-4.13 


New Center, RIV-4.13 

Previous Zoom, RIV-4.13 



Update View, RIV-4.13 

Zoom In, RIV-4.13 

Zoom Out, RIV-4.13 

Zoom Region, RIV-4.13 

Zoom Wholw Diagram, RIV-4.13 

View menu, RIV-4.13 

Visible Grid, RIV-4.20 

Volt, UMAN-2.1 

Volt(dc source), UMAN-2.2 

Voltage 

AC voltage, RIV-2.21 



waveform, RIV-2.39 

Voltage Controlled Switch, Switch-1 

Voltage expander, Expander-1 

Voltage source, RIV-2.3 

AC source, RIV-2.21 

DC source, RIV-2.16 

TONE, RIV-2.39 


VWf, Harmonic-2 


Waveform, RIV-2.39, Waveform-1 

quasi-periodic, RIV-2.44 



WVf, MEMS-2.14 



Waveform storing block, StoreFile-1 

Window 

Arrange Icons, RIV-4.25 

Cascade, RIV-4.25 

Eldo to APLAC, RIV-4.22 

HSpice to APLAC, RIV-4.22 

library encryption, RIV-4.23 

List of all Windows in Editor, RIV-4.25 

Mapping Definition Tool, RIV-4.23 

Microstrip Calculator, RIV-4.23 

Spice to APLAC, RIV-4.22 

Tile, RIV-4.25 

Window bandpass filter, WindowBP-1 

Window bandstop filter, WindowBS-1 

Window highpass filter, WindowHP-1 

Window lowpass filter, WindowLP-1 

WindowLP, Responsefunc-4 

Window menu, RIV-4.25 

WindowBP, WindowBP-1 

WindowBS, WindowBS-1 

WindowHP, WindowHP-1 

WindowLP, WindowLP-1 

Wire, Wire-1 

End Wiring, RIV-4.17 

Reroute Wire, RIV-4.17 

Split Wire with Short, RIV-4.18 

Start Wiring, RIV-4.17 

Validate Node Names, RIV-4.18 



Wire menu, RIV-4.17 

Wire model, RCWire-1 

Wires, RIV-4.21 

Wiring, UMAN-2.1 

Wizard, RIV-4.2 

WLAN Modulator, WLANModulator-1 

WLAN Preamble Symbol Generator, WLANGenerator-1 

WLAN Subcarrier Organizer, WLANFFTPadder-1 

WLAN Tail-bits to Zero, WLANZeroTail-1 

WLANFFTPadder, WLANFFTPadder-1 

WLANGenerator, WLANGenerator-1 

WLANModulator, WLANModulator-1 

WLANWindow, WLANWindow-1 

WLANZeroTail, WLANZeroTail-1 

Word generator, WordGenerator-1 

Word indicator, WordIndicator-1 

WordGenerator, WordGenerator-1 

WordIndicator, WordIndicator-1 

Working Directory, RIV-4.21 

Yield, UMAN-2.1 

Ypar (parameter), NWA-2, Prepare-10 

Z-transform, ZTransform-1 

Zblock, Zblock-1 

Zero, Zero-1 

Zoom In, RIV-4.13 

Zoom Out, RIV-4.13 

Zoom Region, RIV-4.13 



Zoom Whole Diagram, RIV-4.13 

ZTransform, ZTransform-1 

ZTransform, Responsefunc-4 


Categorical Index page APP-3.1 

3. Categorical Index 

APLAC LANGUAGE 

Acceptance, Goal-1 



Default, Procedure-2 

DefaultString, Procedure-2 

Effrn, Noise-7 

electromechanical, MEMS-2.12, MEMS-2.13, MEMS-2.14 

FreqNoise2L, Noise-5 


IacNoise, Noise-2 

IacNoiseContrib, Noise-3 

IhbNoise, Noise-3 

IhbNoiseContrib, Noise-3 


LaplaceTransform, Responsefunc-3 

LineFit, RIV-3.104 

MinNoiseFigure, Noise-7 

MinNoiseFigureZ, Noise-7 

NoiseData, Noise-7 

Normalized, RIV-2.29 

PhaseNoise2L, Noise-5 

Pole, Responsefunc-3 

RaisedCosineLP, Responsefunc-3 

RCHP, Responsefunc-3 

RCLP, Responsefunc-3 



Reload, NWA-2, NPort-5 

RmsRipple, RIV-2.41 

Spectrum, Harmonic-2 

SweepIndex, Sweep-16 

TwoPort, Responsefunc-4 

Vac, RIV-2.3 

VacNoise, Noise-2 

VacNoiseContrib, Noise-3 

Variable, RIV-2.7 

VhbNoise, Noise-3 

VhbNoiseContrib, Noise-3 


WindowLP, Responsefunc-4 

WVf, MEMS-2.14 

ZTransform, Responsefunc-4 

COMPONENTS 

BJT, UMAN-2.2 

Cap, UMAN-2.2 

Ground, UMAN-2.2 



Res, UMAN-2.2 

Volt(dc source), UMAN-2.2 

CONVERGENCE 

DCINIT SOURCE STEP, GetParam-2, SetParam-3 

DCSOURCE STEP CYCLES, GetParam-3, SetParam-5 

HBINIT SOURCE STEP, GetParam-2, SetParam-3 

HBSOURCE STEP CYCLES, GetParam-3, SetParam-5 



INIT SOURCE STEP, GetParam-2, Prepare-13, SetParam-3 

RESETDC, Sweep-3 

SOURCE STEP CYCLES, GetParam-3, Prepare-13, SetParam-4 

DIRECTIVES 

#define, RIV-2.14, UMAN-2.39, UMAN-2.60 

#else, RIV-2.15 

#endif, RIV-2.15, UMAN-2.60 

#ifdef, RIV-2.15, UMAN-2.60, UMAN-2.63 

#include, RIV-2.15 

#libdir, RIV-2.15 

#library, RIV-2.15, UMAN-2.65 

#undef, RIV-2.16 

ELECTROMAGNETICS 

d, EM-2.4 

Examples 



Amplifier matching, RIV-3.53 

Balanced mixer, RIV-3.72 

Basic receiver design, RIV-3.83 



Coupled line, RIV-3.97 

Current mirror, RIV-3.113 


DC characteristics of a simple Ebers-Moll model, RIV-3.39 

Design centering, RIV-3.28 



FET frequency multiplier, RIV-3.58 

For-loop example, RIV-3.88 

Frequency doubler, RIV-3.61 

Harmonic balance analysis, RIV-3.11, RIV-3.78 

Ideal switched-capacitor circuit, RIV-3.90 

JFET model parameter extraction, RIV-3.117 

Line fitting, RIV-3.104 



Noise analysis, RIV-3.14 

Nominal optimization using GoalData, RIV-3.21 


Nonideal switched-capacitor circuit, RIV-3.94 

Optimization example, including design centering, RIV-3.30 

Output intercept point calculation, RIV-3.69 

PLL transient analysis, RIV-3.63 

Printed circuit board (PCB) example, RIV-3.101 

Representing numerical data graphically, RIV-3.108 

S parameter presentation of an amplifier, RIV-3.43 

Stability and gain circles, RIV-3.50 

Transient analysis, RIV-3.75, RIV-3.8 

Transistor DC curves, RIV-3.41 

Transistor S parameters, RIV-3.46 

Transmission line with an S parameter example, RIV-3.35 

FILE TYPES 

.asd, EM-2.4 

.dvl, EM-2.4 

.eir, EM-2.4 



.i, EM-2.4, RIV-4.18 

.n, RIV-4.18 

.rdp, EM-2.4 

.s1p, EM-2.4 

.sar, EM-2.4 

.ssd, EM-2.4 

.t, EM-2.4 

AmplShot, EM-2.4 

DataVolume, EM-2.4 

REDU FILE, NPort-1 

SarSeek, EM-2.4 

SnapShot, EM-2.4 

PARAMETERS 

UTILITY 

Hpar, Sweep-4, UMAN-2.66 

Spar, NWA-1, RI-1.1, RIV-6.8, TwoPort-1, UMAN-2.66 

Ypar, NWA-2, Prepare-10 

TS2A.EXE, RII-11.9 

libcrypt.exe, RII-11.1 

spi2a.exe, RII-11.2 


APLAC Bibliography page APP-4.1 

4. APLAC Bibliography 

[1] M. Abramowitz and I. Stegun, Handbook of Mathematical Functions. New York, New York: 

Dover Publications, Inc., New York, 1970. 

[2] H. Altschuler and A. Oliner, “Discontinuities in the Center Conductor or Symmetric Strip Transmission 

Line,” IRE Transactions on Microwave Theory and Techniques, vol. 8, pp. 328–339, 

May 1960. 

[3] D. Anand, Introduction to Control Systems. Pergamon Press, 1974. 

[4] M. Andersson, A. Kankkunen, and M. Valtonen, MOSFET Level 3 Model in APLAC, Report 

CT-9, Helsinki University of Technology, Circuit Theory Laboratory, 1991. 

[5] M. Andersson and M. Valtonen, BJT Model in APLAC, Report CT-17, Helsinki University of 

Technology, Circuit Theory Laboratory, 1992. 

[6] M. Andersson and M. Valtonen, IGBT Model in APLAC, Report CT-14, Helsinki University of 


[7] M. Andersson, Z. Xia, P. Kuivalainen, and H. Pohjonen, A Physical Si1−xGex/Si Heterojunction 

Bipolar Transistor Model for Device and Circuit Simulation, Report 1994/8, VTT Electronics, 

Integrated Circuits, 1994. 

[8] R. Anholt, Electrical and Thermal Characterization of MESFETs, HEMTs, and HBTs. Artech 

House, Norwood, Massachusetts, 1995. 

[9] P. Antognetti and G. Massobrio, Semiconductor Device Modeling with SPICE. McGraw-Hill, 

1988. 

[10] E. B. Arkilic, Measurement of the Mass Flow and Tangential Momentum Accommodation Coefficient 

in Silicon Micromachined Channels. PhD thesis, Massachusetts Institute of Technology, 

Cambridge, England, January 1997. 

[11] H. Atwater, “Simplified Design Equations for Microstrip Line Parameters,” Microwave Journal, 

pp. 109–115, November 1989. 

[12] I. Bahl and P. Bhartia, Microwave Solid State Circuit Design. John Wiley & Sons, Inc., 1988. 

[13] I. Bahl and D. Trivedi, “A Designer’s Guide to Microstrip Lines,” Microwaves, vol. 16, pp. 174– 

182, May 1977. 

[14] P. Balaban, M. Jeruchim, and K. Shanmugan, Simulation of Communication Systems. Elsevier 

Scientific Publishing Company, CEI-EUROPE/ELSEVIER Course duplicate edition, 1991. 

[15] C. A. Balanis, Antenna Theory, Analysis and Design. New York, New York: Harper & Row 

Publishers, 1982. 

[16] C. A. Balanis, Advanced Engineering Electromagnetics. New York, New York: John Wiley & 

Sons, Inc., 1989. 

[17] L. L. Beranek, Acoustics. American Institute of Physics, New York, 1986. 

[18] J. Berenger, “A perfectly matched layer for the absorption of electromagnetic waves,” Journal 

of Computational Physics, pp. 185–200, October 1994. 

[19] R. Blum and M. Jeruchim, “A Note on Windowing in the Simulation of Continuous-Time Communication 

Systems,” IEEE Transactions on Communications, vol. 45, pp. 889–892, August 

1997. 



[20] I.-S. S. Board, “Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications: 

High-speed Physical Layer in the 5 GHz Band,” IEEE Std. 802.11a-1999, vol. 11, 

September 1999. 

[21] M. R. Boyd, S. B. Crary, and M. D. Giles, “A Heuristic Approach to the Electromechanical Modeling 

of MEMS Beams,” Solid-State Sensor and Actuator Workshop, (Hilton Head Is., South 

Carolina), pp. 123–126, June 1994. 

[22] R. Brayton, F. Gustavson, and G. Hachtel, “A New Efficient Algorithm for Solving Differential- 

Algebraic Systems Using Implicit Backward Differentiation Formulas,” Proceedings of the IEEE, 

vol. 60, pp. 98–108, January 1972. 

[23] R. Brayton, G. Hachtel, and A. Sangiovanni-Vincentelli, “A Survey of Optimization Techniques 

for Integrated-Circuit Design,” Proceedings of the IEEE, vol. 69, no. 10, pp. 1334–1363, 1981. 

[24] R. Brayton and R. Spence, CAD of Electronic Circuits, Vol. 2, Sensitivity and Optimization. 

Elsevier Scientific Publishing Company, 1980. 

[25] G. Breed, “A Few RF Applications of Digital ICs,” Applied Microwave & Wireless, p. 58, March 

1998. 

[26] British Approvals Board for Telecommunications, BABT Special Investigation Test Schedule for 

the Type Approval of Terminal Apparatus for Use in the Total Access Communications System 

(TACS), September 1984. 

[27] G. Broyden, “A Class of Methods for Solving Nonlinear Simultaneous Equations,” Math. Comput., 

vol. 19, pp. 577–593, October 1965. 

[28] Brüel & Kjær, Windows to FFT Analysis (Part I), Technical Review, 1987. 

[29] M. Bucher, C. Lallement, C. Enz, and F. Krummenacher, The EPFL-EKV MOSFET Model, 

Version 2.3, Report, Electronics Laboratory LEG, Swiss Federal Institute of Technology EPFL, 

Lausanne, Switzerland, December 1995. 

[30] M. Bucher, C. Lallement, C. Enz, F. Theodoloz, and F. Krummenacher, The EPFL-EKV MOS- 

FET Model Equations for Simulation, Model Version 2.6, June, 1997, Revision II, July, 1998, 

Report, Electronics Laboratories, Swiss Federal Institute of Technology (EPFL), Lausanne, 

Switzerland, July 1998. 

[31] R. Caverly, N. V. Drozdovski, L. M. Drozdovskaia, and M. J. Quinn, “Spice Modeling of Microwave 

and RF Control Diodes,” Proc. 43rd IEEE Midwest Symp. On Circuits and Systems, 

August 2000. 

[32] CCITT, “Characteristics of compandors for telephony,” CCITT Recommendations G.162, 

pp. 178–185, 1989. 

[33] E. K. Chan and R. W. Dutton, “Electrostaic Micromechanical Actuator with Extended Range of 

Travel,” Journal of Microelectromechanical Systems, vol. 9, pp. 321–328, September 2000. 

[34] E. K. Chan, K. Garikipati, and R. W. Dutton, “Characterization of Contact Electromechanics 

Through Capacitance-Voltage Measurements and Simulations,” Journal of Microelectromechanical 

Systems, vol. 8, pp. 208–217, January 1999. 

[35] W. R. Chang, I. Etsion, and D. B. Bogy, “An Elastic-Plastic Model for the Contact of Rough 

Surfaces,” Journal of Tribology, Trans. ASME, vol. 109, pp. 257–263, April 1987. 

[36] W. Chang, “The Inductance of a Superconducting Strip Transmission Line,” Journal of Applied 

Physics, vol. 50, pp. 8129–8134, December 1979. 

[37] S. Chennakeshu and G. Saulnier, “Differential Detection of π/4-Shifted-DQPSK for Digital Cellular 

Radio,” IEEE Transactions on vehicular technology, vol. 42, February 1993. 



[38] Y. Cho, A. P. Pisano, and R. T. Howe, “Viscous Damping Model for Laterally Oscillating Microstructures,” 

Journal of Microelectromechanical Systems, vol. 3, pp. 81–87, June 1994. 

[39] L. Chua and P. Lin, Computer-Aided Analysis of Electronic Circuits. Prentice-Hall, Inc., 1975. 

[40] S. Cohn, “Problems in strip transmission lines,” IRE Transactions on Microwave Theory and 

Techniques, vol. 3, pp. 119–126, March 1955. 

[41] P. L. Corbeiller and Y.-W. Yeung, “Duality in Mechanics,” Journal of the Acoustical Society of 

America, vol. 24, pp. 643–648, November 1952. 

[42] L. J. Costa, Implementation of a Superconducting Microstrip Line, Master’s thesis, Helsinki 

University of Technology, Department of Electrical Engineering, 1995. 

[43] W. Curtice, “GaAs MESFET Modeling and Nonlinear CAD,” IEEE Transactions on Microwave 

Theory and Techniques, vol. 36, pp. 220–230, February 1988. 

[44] T. Cuthbert, Circuit Design Using Personal Computers. John Wiley & Sons, Inc., 1983. 

[45] T. Cuthbert, Optimization Using Personal Computers. John Wiley & Sons, Inc., 1987. 

[46] B. Demidovich and I. Maron, Computational Mathematics. Mir Publishers, 1976. 

[47] E. Denlinger, “Losses of Microstrip Lines,” IEEE Transactions on Microwave Theory and Techniques, 

vol. 28, pp. 101–110, June 1980. 

[48] J. E. Dennis, Jr., and V. Torczon, “Direct Search Methods on Parallel Machines,” SIAM Journal 

of Optimization, vol. 1, no. 4, pp. 448–474, 1991. 

[49] M. Edwards, “A New Criterion for Linear 2-Port Stability Using a Single Geometrically Derived 

Parameter,” IEEE Transactions on Microwave Theory and Techniques, vol. 40, pp. 2303–2310, 

December 1992. 

[50] F. E. Ehlers, “Response of Internally Damped Beams on Vibrating Supports,” Journal of the 

Acoustical Society of America, vol. 34, no. 1, pp. 40–53, 1962. 

[51] Electronic Industries Association Engineering Department, EIA/IS-19-B, Recommended Minimum 

Standards for 800-MHz Cellular Subsciber Units, May 1988. 

[52] C. H. et al., BSIMSOI3.1 MOSFET MODEL Users’ Manual, Report, University of California, 

Berkeley, Dept. of Electrical Engineering and Computer Sciences, 2003. 

[53] D. S. et al., “Application of the Three-Dimensional Finite-Difference Time-Domain Method to 

the Analysis of Planar Microstrip Circuits,” IEEE Transactions on Microwave Theory and Techniques, 

vol. 38, pp. 849–856, July 1990. 

[54] S. M. et al., “Study of Contacts in an Electrostatically Actuated Microswitch,” Proceedings of the 

1998 44th IEEE Holm Conference on Electrical Contacts, (Arlington, Virginia), pp. 127–132, 

October 1998. 

[55] Y. C. et al., BSIM3v3 Manual, Report, University of California, Berkeley, Dept. of Electrical 

Engineering and Computer Sciences, 1996. 

[56] Y. C. et al., BSIM4 Manual, Report, University of California, Berkeley, Dept. of Electrical Engineering 

and Computer Sciences, 2004. 

[57] “European Digital Cellular Telecommunications System (Phase 1).” ETSI, 1992. 

[58] R. Fletcher and C. Reeves, “Function Minimization by Conjugate Gradients,” Computer Journal, 

vol. 7, pp. 149–154, July 1964. 

[59] C.-E. Fröberg, Introduction to Numerical Analysis. Addison-Wesley Publishing Company, 

1972. 



[60] S. Fukui and R. Kaneko, “Analysis of Ultra-Thin Gas Film Lubrication Based on the Linearized 

Boltzmann Equation,” JSME International Journal, vol. 30, pp. 1660–1666, 1987. 

[61] S. Fukui and R. Kaneko, “Analysis of Ultra-Thin Gas Film Lubrication Based on Linearized 

Boltzmann Equation: First Report – Derivation of a Generalized Lubrication Equation Including 

Thermal Creep Flow,” Journal of Tribology, Trans. ASME, vol. 110, pp. 253–262, April 1988. 

[62] S. Fukui and R. Kaneko, “A Database for Interpolation of Poiseuille Flow Rates for High Knudsen 

Number Lubrication Problems,” Journal of Tribology, Trans. ASME, vol. 112, pp. 78–83, 

January 1990. 

[63] T. B. Gabrielson, “Mechanical-Thermal Noise in Micromachined Acoustic and Vibration SensorsA,” 

IEEE Transactions on Electron Devices, vol. 40, pp. 903–909, May 1993. 

[64] N. Garcia, A. P. Levanyuk, S. A. Minyukov, and V. T. Binh, “Estimations of the Characteristics 

of GHz Range Nanocantilevers: Eigenfrequencies and Quality Factors,” Surface Science, 

vol. 328, pp. 337–342, 1995. 

[65] R. Garg and I. Bahl, “Microstrip Discontinuities,” International Journal of Electronics, vol. 45, 

pp. 81–87, July 1978. 

[66] H. Gaunholt, P. H. Mannersalo, V. Porra, and M. Valtonen, “Gyrator Transformation - A Better 

Way for Modified Nodal Approach,” Proceedings of the 10th European Conference on Circuit 

Theory and Design, vol. II, (Copenhagen, Denmark), pp. 864–872, July 1991. 

[67] J. Gavan and M. Shulman, “Effects of Desensitization on Mobile Radio System Perfomance, 

Part I: Qualitative Analysis,” IEEE Transactions on Vehicular Technology, vol. VT-33, November 

1984. 

[68] S. D. Gedeny, “An anisotropic perfectly matched layer-absorbing medium for the truncation of 

FDTD lattices,” IEEE Trans. Antennas Propagat., pp. 1630–1639, December 1996. 

[69] I. Getreu, Modeling the Bipolar Transistor. Tektronix, Elsevier Scientific Publishing Company, 

1988. 

[70] G. Ghione and C. Naldi, “Parameters of Coplanar Waveguides with Lower Ground Plane,” 

Electronics Letters, vol. 19, pp. 734–735, September 1983. 

[71] G. Ghione and C. Naldi, “Analytical Formulas for Coplanar Lines in Hybrid and Monolithic 

MICs,” Electronics Letters, vol. 20, pp. 179–181, February 1984. 

[72] S. Glisic, “Spread Spectrum / CDMA.” CEI-Europe Course Duplicate, 1997. 

[73] M. Goldfarb and R. Pucel, “Modeling Via Hole Grounds in Microstrip,” IEEE Microwave and 

Guided Wave Letters, vol. 1, pp. 135–137, June 1991. 

[74] H. Greenhouse, “Design of Planar Rectangular Microelectronic Inductors,” IEEE Transactions 

on Parts, Hybrids and Packaging, vol. 10, pp. 101–109, June 1974. 

[75] J. A. Greenwood and J. H. Tripp, “The Contact of Two Nominally Flat Rough Surfaces,” Proc. 

Instn. Mech. Engrs., vol. 185, pp. 625–633, 1970. 

[76] J. A. Greenwood and J. P. B. Williamsson, “Contact of Nominally Flat Surfaces,” Proc. R. Soc. 

A., vol. 295, pp. 300–319, 1966. 

[77] B. Gross, “Calculating the cascade intercept point of communications receivers,” Ham Radio, 

p. 50, August 1980. 

[78] W. A. Gross, Gas Film Lubrication. Wiley, New York, 1962. 

[79] P. C. Grossman and J. Choma, “Large Signal Modeling of HBT’s Including the Self-Heating and 

Transit Time Effects,” IEEE Transactions on Microwave Theory and Techniques, vol. MTT-40, 

pp. 449–464, March 1992. 



[80] K. Gupta, R. Garg, and R. Chadha, Computer-Aided Design of Microwave Circuits. Artech 

House, Norwood, Massachusetts, 1981. 

[81] T. Ha, Solid-State Microwave Amplifier Design. John Wiley & Sons, Inc., 1981. 

[82] S. Haikarainen, Large-Signal-Small-Signal and Nonlinear Noise Analysis for Circuits with 

Quasiperiodic Large-Signal Solution, Master’s thesis, Helsinki University of Technology, Department 

of Electrical and Communications Engineering, 1998. 

[83] E. Hammerstad, “Computer-Aided Design of Microstrip Couplers with Accurate Discontinuity 

Models,” IEEE MTT-S Symposium Digest, pp. 54–56, June 1980. 

[84] E. Hammerstad and O. Jensen, “Accurate Models for Microstrip Computer-Aided Design,” IEEE 

MTT-S Symposium Digest, pp. 407–409, June 1980. 

[85] V. Hanna and D. Thebault, “Theoretical and Experimental Investigations of Asymmetric Coplanar 

Waveguides,” IEEE Transactions on Microwave Theory and Techniques, vol. MTT-32, December 

1984. 

[86] F. Harris, “On the Use of Windows for Harmonic Analysis with the Discrete Fourier Transform,” 

Proceedings of the IEEE, vol. 66, January 1978. 

[87] P. Heikkilä, Object-Oriented Approach to Numerical Circuit Analysis. Doctoral thesis, Helsinki 

University of Technology, Department of Electrical Engineering, 1992. 

[88] P. Heikkilä, M. Valtonen, and T. Veijola, “Harmonic Balance of Nonlinear Circuits with Multitone 

Excitation,” Proceedings of the 10th European Conference on Circuit Theory and Design, vol. II, 

(Copenhagen, Denmark), pp. 802–811, July 1991. 

[89] J. Heinonen, Oscillator, Course duplicate, Nokia Mobile Phones, 1985. In Finnish. 

[90] W. Hoefer, “Equivalent Series Inductivity of a Narrow Transverse Slit in Microstrip,” IEEE Transactions 

on Microwave Theory and Techniques, vol. 25, pp. 822–824, October 1977. 

[91] W. Hoefer, “Theoretical and Experimental Characterization of Narrow Transverse Slits in Microstrip,” 

NTZ, vol. 30, pp. 582–585, July 1977. 

[92] R. Hoffmann, Handbook of Microwave Integrated Circuits. Norwood, Massachusetts: Artech 

House, Norwood, Massachusetts, 1987. 

[93] R. Holm, Electric Contacts. Almquist & Wicksell, Stockholm, 1946. 

[94] R. Hooke and T. Jeeves, “’Direct search’ solution of numerical and statistical problems,” J. 

Assoc. Comp. Mach., vol. 8, pp. 212–229, April 1961. 

[95] E. S. Hung and S. D. Senturia, “Generating Efficient Dynamical Models for Microelectromechanical 

Systems from a Few Finite-Element Simulation Runs,” Journal of Microelectromechanical 

Systems, vol. 8, pp. 280–289, September 1999. 

[96] E. S. Hung, Y.-J. Yang, and S. D. Senturia, “Low-Order Models for Fast Dynamical Simulation 

of MEMS Microstructures,” Proceedings of Transducers’97, (Chicago, Illinois), pp. 1101–1104, 

June 1997. 

[97] E. Ifeachor and B. Jervis, Digital Signal Processing: A Practical Approach. Addison-Wesley 

Publishing Company, 1993. 

[98] D. IJntema and H. A. C. Tilmans, “Static and Dynamic Aspects of an Air-Gap Capacitor,” Sensors 

and Actuators A, vol. 35, pp. 121–128, 1992. 

[99] L. Ingber, “Very Fast Simulated Re-annealing,” Math. Comput. Modelling, vol. 12, no. 8, 

pp. 967–973, 1989. 



[100] J. Jacobi, “IMD: Still Unclear After 20 Years,” Microwaves & RF, November 1986. 

[101] W. Jakes, ed., Microwave Mobile Communications. Wiley, New York, 1974. 

[102] R. Jansen and M. Kirschning, “Arguments and an Accurate Model for the Power-Current Formulation 

of Microstrip Characteristic Impedance,” AEÜ, vol. 37, pp. 108–112, March-April 

1983. 

[103] M. Jeruchim, P. Balaban, and K. Shanmugan, Simulation of Communication Systems. Plenum 

Press, 1992. 

[104] D. Jiles and D. Atherton, “Theory of Ferromagnetic Hysteresis,” Journal of Magnetism and 

Magnetic Materials, vol. 61, pp. 48–60, 1986. 

[105] H. Jokinen, Analysis of Switched Capacitor Networks Using Convolution, Master’s thesis, 

Helsinki University of Technology, Department of Electrical Engineering, 1992. In Finnish. 

[106] H. Jokinen, Convolution-Based Steady State Analysis Methods, Licentiate’s thesis, Helsinki 


[107] H. Jokinen, Computation of the Steady-State Solution of Nonlinear Circuits with Time-Domain 

and Large-Signal-Small-Signal Analysis Methods. PhD thesis, Acta Polytechnica Scandinavica, 

1997. Electrical Engineering Series No. 87. 

[108] H. Jokinen and M. Valtonen, “Small Signal Analysis of Nonideal Switched-Capacitor Circuits,” 

IEEE International Symposium on Circuit and Systems, vol. 1, pp. 395–398, May-June 1994. 

[109] H. Jokinen and M. Valtonen, “Small-Signal Harmonic Analysis of Nonlinear Circuits,” International 

Journal of Circuit Theory and Applications, vol. 23, pp. 325–343, August 1995. 

[110] H. Jokinen and M. Valtonen, Small-Signal Harmonic Analysis of Nonlinear Circuits, Report 

CT-23, Helsinki University of Technology, Circuit Theory Laboratory, 1995. 

[111] H. Jokinen and M. Valtonen, “Steady State Time-Domain Analysis Including Frequency- 

Dependent Components,” Proceedings of the 12th European Conference on Circuit Theory 

and Design, August 1995. 

[112] H. Jokinen and M. Valtonen, Steady State Time-Domain Analysis Including Frequency- 

Dependent Components, Report CT-24, Helsinki University of Technology, Circuit Theory Laboratory, 

1995. 

[113] H. Jokinen, M. Valtonen, and T. Veijola, “Fast Analysis of Nonideal Switched Capacitor Circuits 

Using Convolution,” Proceedings of the 11th European Conference on Circuit Theory and 

Design, Part II, (Davos, Switzerland), pp. 941–946, August-September 1993. 

[114] W. B. Joyce, “Thermal Resistance of Heat Sinks With Temperature-Dependent Conductivity,” 

Solid-State Electronics, vol. 18, pp. 321–322, 1975. 

[115] O. Juntunen, Implementation of New Stability Analysis Methods in APLAC Circuit Simulator, 

Master’s thesis, Helsinki University of Technology, Department of Electrical and Communications 

Engineering, 1998. 

[116] O. Juntunen, A Two-Port S Parameter Data Transformation Utility Implemented in APLAC Circuit 

Simulator, Report CT-35, Helsinki University of Technology, Circuit Theory Laboratory, 

1998. 

[117] O. Juntunen, J. Virtanen, and M. Valtonen, Normalized Determinant Function and Stability 

Envelope, Report CT-30, Helsinki University of Technology, Circuit Theory Laboratory, 1998. 

[118] D. Kajfez and T. S. Sadaka, “Edge Capacitance of a Finite-Thickness Plate Above the Ground 

Plane,” Sensors and Actuators A, vol. 64, pp. 216–218, 1998. 



[119] A. Kankkunen, M. Andersson, and M. Valtonen, BSIM Model in APLAC, Report CT-10, Helsinki 

University of Technology, Circuit Theory Laboratory, 1991. 

[120] A. Kankkunen, M. Andersson, and M. Valtonen, MOSFET Level 1 and 2 Models in APLAC, 

Report CT-8, Helsinki University of Technology, Circuit Theory Laboratory, 1991. 

[121] V. Karanko, On the Numerics of Frequency-Domain Representations of Signals with a Discrete 

Frequency Content, Master’s thesis, Helsinki University of Technology, Department of 

Engineering Physics and Mathematics, 1999. 

[122] R. Kautz, “Picosecond Pulses on Superconducting Striplines,” Journal of Applied Physics, 

vol. 49, pp. 308–314, January 1978. 

[123] C. T. Kelley, Iterative Methods for Optimization. Philadelphia, Pennsylvania: SIAM, 1999. 

[124] S. Kirkpatrick, C. Gelatt, Jr., and M. Vecchi, “Optimization by Simulated Annealing,” Science, 

vol. 220, pp. 671–680, May 1983. 

[125] M. Kirschning and R. Jansen, “Accurate Model for Effective Dielectric Constant of Microstrip 

with Validity up to Millimetre-wave Frequencies,” Electronics Letters, vol. 18, pp. 272–273, 

March 1982. 

[126] M. Kirschning and R. Jansen, “Accurate Wide-Range Design Equations for the Frequency- 

Dependent Characteristic of Parallel Coupled Microstrip Lines,” IEEE Transactions on Microwave 

Theory and Techniques, vol. 32, pp. 83–90, January 1984. 

[127] M. Kirschning, R. Jansen, and N. Koster, “Measurement and Computer-Aided Modeling of 

Microstrip Discontinuities by an Improved Resonator Method,” IEEE MTT-S Symposium Digest, 

pp. 495–497, June 1983. 

[128] W. Kloosterman and H. de Graaff, “Avalanche Multiplication in a Compact Bipolar Transistor 

Model for Circuit Simulation,” Proc. 1988 BCTM, pp. 103–106, 1988. 

[129] M. J. Kobrinsky, E. R. Deutsch, and S. D. Senturia, “Effect of Support Compilance and Residual 

Stress on the Shape of Double Supported Surface-Micromachined Beams,” Journal of Microelectromechanical 

Systems, vol. 9, pp. 361–369, 2000. 

[130] A. S. Kouri, Antenna Switch Module for GSM Network Terminal, Master’s thesis, University of 

Oulu, Department of Electrical Engineering, 1996. 

[131] M. Kraft, C. P. Lewis, and T. G. Hesketh, “Closed-loop Silicon Accelerometer,” IEE Proc. Circuits 

Devices Syst., vol. 145, no. 5, pp. 325–331, 1998. 

[132] G. Kull, L. Nagel, S. Lee, P. Lloyd, E. Prendergast, and H. Dirks, “A Unified Circuit Model for 

Bipolar Transistors Including Quasi-Saturation Effects,” IEEE Transactions on Electron Devices, 

vol. 32, pp. 1103–1113, June 1985. 

[133] K. S. Kundert, J. K. White, and A. Sangiovanni-Vincentelli, Steady-State Methods for Simulating 

Analog and Microwave Circuits. Kluwer Academic Publishers, 1990. 

[134] K. S. Kunz and R. J. Luebbers, The Finite Difference Time Domain Method for Electromagnetics. 

Boca Raton, Florida: CRC Press, Boston, 1993. 

[135] J. Kuzdrall, “Algorithm Finds EIA-Standard 5% And 10% Component Values,” Electronic Design, 

vol. 39, pp. 81–84, May 1991. 

[136] H. Laamanen, Numerical Models of Microstrip Structures, Master’s thesis, Helsinki University 

of Technology, Department of Electrical Engineering, 1980. In Finnish. 

[137] B. T. Laboratories, Physical Design of Electronic Systems, vol. I. Prentice-Hall, Inc., 1971. 



[138] M. Lähepelto, A Measurement-Based MESFET Model for APLAC Circuit Simulator, Master’s 

thesis, Helsinki University of Technology, Department of Electrical Engineering, 1993. 

[139] M. Lähepelto and M. Valtonen, “A Measurement-Based MESFET Model with Frequency- 

Dispersive Transconductance Approximation,” Proceedings of the 12th European Conference 

on Circuit Theory and Design, (Istanbul, Turkey), August 1995. 

[140] M. Lähepelto and M. Valtonen, MEXTRAM 503 BJT Model in APLAC, Report CT-26, Helsinki 

University of Technology, Circuit Theory Laboratory, 1995. 

[141] T. Lamminmäki, K. Ruokonen, I. Tittonen, T. Mattila, O. Jaakkola, A. Oja, and H. S. S. Kiihamäki, 

“Electromechanical Analysis of Micromechanical SOI-Fabricated RF Resonators,” 

Proceedings of the 3rd International Conference on Modeling and Simulation of Microsystems, 

(San Diego, California), pp. 217–220, April 2000. 

[142] W. E. Langlois, “Isothermal Squeeze Film,” Quarterly of Appl. Math., vol. 20, pp. 131–150, 

1962. 

[143] H. Lee and T. Itoh, “Phenomenological Loss Equivalence Method for Planar Quasi-TEM Transmission 

Lines with a Thin Normal Conductor or Superconductor,” IEEE Transactions on Microwave 

Theory and Techniques, vol. 37, pp. 1904–1909, December 1989. 

[144] W. Lee, Mobile Communications Engineering. McGraw-Hill, 1982. 

[145] M. S. Lehtinen, V.Porra, and M. Valtonen, “Determination of Some Nonlinear Transistor Model 

Parameters by Using Periodic Time Domain Measurements,” Proceedings of the 32nd ARFTG 

Conference, (Tempe, Arizona), December 1988. 

[146] O. Lehtinen, Development of the RF section of the mobile station for the TDD option of UMTS, 

Master’s thesis, Helsinki University of Technology, 1999. In English. 

[147] A. Lehtovuori, Time-domain model of dispersive transmission line, Master’s thesis, Helsinki 


[148] A. Lehtovuori, M. Valtonen, and J. Virtanen, “The Implementation and Development of a Time- 

Domain Model of Dispersive Transmission Line,” Proceedings of ECCTD’01, vol. 2, (Espoo, 

Finland), pp. 65–68, August 2001. 

[149] P. Leturcq, J. Dorkel, A. Napieralski, and E. Lachiver, “A New Approach to Thermal Analysis 

of Power Devices,” IEEE Transactions on Electron Devices, vol. ED-34, pp. 1147–1156, May 

1987. 

[150] H. Levine, “On the Radiation Impedance of a Rectangular Piston,” Journal of Sound and Vibration, 

vol. 89, no. 4, pp. 447–455, 1983. 

[151] L. Lin, R. T. Howe, and A. P. Pisano, “Microelectromechanical Filters for Signal Processing,” 

Journal of Microelectromechanical Systems, vol. 7, no. 3, pp. 286–294, 1998. 

[152] E. Lindberg, “A Simple Explanation of the Physical Behaviour of Chua’s Circuit or a Route to 

the Hearts of Chua’s Circuit,” Proceedings of the Workshop Nonlinear Dynamics of Electronic 

System, (Dresden,Germany), pp. 1–6, July 1993. 

[153] L. L. Liou, J. L. Ebel, and C. I. Huang, “Thermal Effects on the Characteristics of AlGaAs/GaAs 

Heterojunction Bipolar Transistors Using Two-Dimensional Numerical Simulation,” IEEE Transactions 

on Electron Devices, vol. ED-40, pp. 35–43, January 1993. 

[154] G. Lorenz and R. Neul, “Network-Type Modeling of Micromachined Sensor Systems,” Proceedings 

of the 1st International Conference on Modeling and Simulation of Microsystems, 

Semiconductors, Sensors and Actuators, (Santa Clara, California), pp. 233–238, 1998. 

[155] W. Lorenz, “Dimensionierung einlagiger Zylinderluftspulen mit optimaler Güte,” FREQUENZ, 

1970. 



[156] S. Maas, Nonlinear Microwave Circuits. Norwood, Massachusetts: Artech House, Norwood, 

Massachusetts, 1988. 

[157] O. Macchi, “Advances in Adaptive Filtering,” Digital Communications (E. Biglieri and G. Prati, 

eds.), Elsevier Scientific Publishing Company, 1986. 

[158] R. H. MacNeal, “The Solution of Elastic Plate Problem by Electrical Analogies,” Journal of 

Applied Mechanics, pp. 59–67, March 1951. 

[159] K. Madsen, O. Nielsen, H. Schjær-Jacobsen, and L. Thrane, “Efficient Minimax Design of 

Networks without Using Derivatives,” IEEE Transactions on Microwave Theory and Techniques, 

vol. 23, pp. 803–809, October 1975. 

[160] S. March, “Microstrip Packaging: Watch the Last Step,” Microwaves, vol. 20, pp. 83–94, December 

1981. 

[161] S. March, “Analyzing Lossy Radial-Line Stubs,” IEEE Transactions on Microwave Theory and 

Techniques, vol. 33, pp. 269–271, March 1985. 

[162] M. Marsan, S. Benedetto, E. Biglieri, V. Castellani, M. Elia, and L. Presti, “Digital Simulation 

of Communication Systems with TOPSIM III,” IEEE Journal on Selected Areas of Communications, 

vol. SAC-2, January 1984. 

[163] D. Maugis, “Adhesion of Spheres: The JKR-DMT Transition Using a Dugdale Model,” Journal 

of Colloid and Interface Science, vol. 150, pp. 243–269, April 1992. 

[164] P. D. Maycock, “Thermal Conductivity of Silicon, Germanium III-V Compounds and III-V Alloys,” 

Solid-State Electronics, vol. 10, pp. 161–168, 1967. 

[165] C. C. McAndrew and L. W. Nagel, “Early Effect Modeling in SPICE,” IEEE Journal of Solid-State 

Circuits, vol. 31, pp. 136–138, January 1996. 

[166] C. McAndrew, J. Seitchik, D. Bowers, M. Dunn, M. Foisy, I. Getreu, M. McSwain, S. Moinian, 

J. Parker, D. Roulston, M. Schröter, P. van Wijnen, and L. Wagner, “VBIC95, The Vertical 

Bipolar Inter-Company Model,” IEEE Journal of Solid-State Circuits, vol. 31, pp. 1476–1482, 

October 1996. 

[167] W. McCalla, Fundamentals of Computer-Aided Circuit Simulation. Kluwer Academic Publishers, 

1988. 

[168] A. McCamant, G. McCormack, and D. Smith, “An Improved GaAs MESFET Model for SPICE,” 

IEEE Transactions on Microwave Theory and Techniques, vol. 38, pp. 822–824, June 1990. 

[169] F. P. Mechel, “Notes on the Radiation Impedance, Especially of Piston-Like Radiators,” Journal 

of Sound and Vibration, vol. 123, no. 3, pp. 437–572, 1988. 

[170] Q. Meng, M. Mehregany, and R. L. Mullen, “Theoretical Modeling of Microfabricated Beams 

with Elastically Restained Supports,” Journal of Microelectromechanical Systems, vol. 2, 

pp. 128–137, September 1993. 

[171] N. Metropolis, A. Rosenbluth, M. Rosenbluth, and A. Teller, “Equation of State Calculations by 

Fast Computing Machines,” Journal of Chemical Physics, vol. 21, pp. 1087–1092, June 1953. 

[172] C. Michael, Statistical Modeling for Computer-Aided Design of Analog MOS Integrated Circuits. 

PhD thesis, The Ohio State University, 1991. 

[173] C. Michael and M. Ismail, Statistical Modeling for Computer-Aided Design of MOS VLSI Circuits. 

Kluwer Academic Publishers, 1993. 

[174] C. Michael, H. Su, M. Ismail, A. Kankkunen, and M. Valtonen, “Statistical Techniques for the 

Computer-Aided Optimization of Analog Integrated Circuits,” IEEE Transactions on Circuits and 

Systems, vol. 43, pp. 410–413, May 1996. 



[175] Z. Michalewicz, Genetic Algorithms + Data Structures = Evolution Programs. Springler-Verlag, 

Berlin, 1992. 

[176] J. Modestino and K. Matis, “Interactive Simulation of Digital Communication Systems,” IEEE 

Journal on Selected Areas of Communications, vol. SAC-2, January 1984. 

[177] J. Mondal, “Octagonal spiral inductor measurement and modelling for MMIC applications,” International 

Journal of Electronics, vol. 68, no. 1, pp. 113–125, 1990. 

[178] M. Morgan, ed., Finite Element and Finite Difference Methods in Electromagnetic Scattering. 

New York, New York: Elsevier Scientific Publishing Company, 1990. 

[179] P. M. Morse and K. U. Ingard, Theoretical Acoustics. McGraw-Hill, 1968. 

[180] P. Munro and F. Ye, “Simulating the Current Mirror with a Self-Heating BJT Model,” IEEE Journal 

of Solid-State Circuits, vol. 26, pp. 1321–1324, September 1991. 

[181] G. Mur, “Absorbing Boundary Condition for the Finite-Difference Approximation of the Time- 

Domain Electromagnetic Field Equations,” IEEE Transactions on Electromagnetic Compatibility, 

vol. EMC-23, pp. 377–382, November 1981. 

[182] L. Nagel, SPICE2: A Computer Program to Simulate Semiconductor Circuits, Report ERL- 

M520, University of California, Electronics Research Laboratory, Berkeley, California, May 


[183] L. Nagurney, “Using a Spreadsheet in Receiver Design.” Computers in education division of 

ASEE. 

[184] F. Najm, “VBIC95: An Improved Bipolar Transistor Model,” IEEE Circuits & Devices, vol. 12, 

pp. 11–15, March 1996. 

[185] V. Nalbandian and W. Steenaart, “Discontinuities in Symmetric Striplines Due to Impedance 

Steps and Their Compensation,” IEEE Transactions on Microwave Theory and Techniques, 

vol. 20, pp. 573–578, September 1972. 

[186] T. Närhi and M. Valtonen, “Stability Envelope - New Tool For Generalized Stability Analysis,” 

IEEE MTT-S International Microwave Symposium Digest, pp. 623–626, June 1997. 

[187] Y. Nemirovsky and O. Bochobza-Degani, “A Methodology and Model for the Pull-In Parameters 

of Electrostatic Actuators,” Journal of Microelectromechanical Systems, vol. 10, pp. 601–615, 

December 2001. 

[188] T. T.-C. Nguyen, L. P. B. Katehi, and G. M. Rebeiz, “Micromachined Devices for Wireless Communications,” 

Proceeding of the IEEE, vol. 86, pp. 1756–1768, August 1998. 

[189] R. Niutanen and M. Valtonen, APLAC Optimization Interface, Report CT-7, Helsinki University 

of Technology, Circuit Theory Laboratory, 1991. 

[190] R. Niutanen, M. Valtonen, and K. Mannersalo, Optimization Methods in APLAC, Report CT-15, 

Helsinki University of Technology, Circuit Theory Laboratory, 1992. 

[191] Nordic Mobile Telephone group, NMT DOC. 900-3, Technical Specification for the Mobile Station, 

January 1985. 

[192] Nordic Mobile Telephone group, Addenum to NMT DOC 900-3 Technical Specification for Mobile 

Station Annex 3. Handheld Mobile Stations (HMS), 1986. 

[193] A. Odabasioglu, M. Celic, and L. Pileggi, “PRIMA: Passive Reduced-Order Interconnect Macromodeling 

Algorithm,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and 

Systems, vol. 17, pp. 645–654, August 1998. 

[194] A. Oppenheim and R. Schafer, Discrete-Time Signal Processing. Prentice-Hall, Inc., 1989. 



[195] S. P. Pacheco, L. P. B. Katechi, and C. T.-C. Nguyen, “Design of Low Actuation Voltage RF 

MEMS Switch,” 2000 IEEE MTT-S International Microwave Symposium Digest, (Boston, Massachusetts), 

pp. 165–168, June 2000. 

[196] A. Parker and J.B.Scott, “Modelling and characterisation of GaAs devices,” Low-power HF 

Microelectronics - a unified approach (G. Machado, ed.), ch. 6, London, England: Institution of 

Electrical Engineers, 1996. 

[197] T. Parks and C. Burrus, Digital Filter Design. John Wiley & Sons, Inc., 1987. 

[198] M. Pedersen, W. Olthuis, and P. Bergveld, “On the Mechanical Behaviour of Thin Perforated 

Plates and Their Application in Silicon Condenser Microphones,” Sensors and Actuators A, 

vol. 54, pp. 499–504, 1996. 

[199] D. Peroulis, S. P. Pacheco, K. Sarabandi, and L. P. B. Katehi, “Electromechanical Considerations 

in Developing Low-Voltage RF MEMS Switches,” IEEE Transactions on Microwave Theory 

and Techniques, vol. 51, no. 1, pp. 259–270, 2003. 

[200] B. N. J. Persson, Sliding Friction. Springler-Verlag, Berlin, 1998. 

[201] R. Pettai, Noise in Receiving Systems. John Wiley & Sons, Inc., 1984. 

[202] A. Platzker, W. Struble, and K. Hetzler, “Instabilities Diagnosis and the Role of K in the Microwave 

Circuits,” IEEE MTT-S International Microwave Symposium Digest, pp. 1185–1188, 

1993. 

[203] J. Poklemba, “An All-Pole Approximation for the Reciprocal sin (x)/(x) Frequency Response,” 

COMSAT Technical Review, vol. 17, pp. 467–479, Fall 1987. 

[204] J. Poklemba, “Pole-Zero Approximations for the Raised Cosine Filter Family,” COMSAT Technical 

Review, vol. 17, pp. 127–157, Spring 1987. 

[205] J. Pölönen, A CMOS Technology Integrated Compandor of a Mobile Telephone, Master’s thesis, 

Tampere University of Technology, 1991. In Finnish. 

[206] T. Poutanen, Specifying duplex filter, Course duplicate, Nokia Mobile Phones course duplicate, 

1988. In Finnish. 

[207] P. Pramanick and P. Bhartia, “CAD Models for Millimeter-Wave Finlines and Suspended- 

Substrate Microstrip Lines,” IEEE Transactions on Microwave Theory and Techniques, 

vol. MTT-33, pp. 1429–1435, December 1985. 

[208] W. Press, B. Flannery, S. Teukolsky, and W. Vetterling, Numerical Recipes in C. Cambridge 

University Press, 1990. 

[209] J. Proakis, Digital Communications. McGraw-Hill, 1985. 

[210] G. Quinn and H. Singer, “Determining Receiver Perfomance With a Computer Spreadsheet,” 

RF-Design, p. 48, April 1985. 

[211] L. Rabiner, R. Schafer, and D. Dlugos, “Periodogram Method for Power Spectrum Estimation,” 

Programs for Digital Signal Processing, 1979. IEEE Press. 

[212] “Reference Data for Radio Engineers.” Howard W. Sams & Co., 1972. 

[213] H. Rekonen, High Frequency Simulation of Printed Circuit Boards, Master’s thesis, Helsinki 


[214] P. Robrish, “An Analytic Algorithm for Unbalanced Stripline Impedance,” IEEE Transactions on 

Microwave Theory and Techniques, vol. 38, August 1990. 

[215] P. J. C. Rodrigues, Computer-Aided Analysis of Nonlinear Microwave Circuits. Artech House, 

1998. 



[216] U. Rohde, Digital PLL Frequency Synthesizers. Prentice-Hall, Inc., 1983. 

[217] J. Rollett, “Stability and Power-Gain Invariants of Linear Two-Ports,” IRE Transactions on Circuit 

Theory, vol. CT-9, pp. 29–32, March 1962. 

[218] F. Romeo and M. Santomauro, “Time-Domain Simulation of n Coupled Transmission Lines,” 

IEEE Transactions on Microwave Theory and Techniques, vol. 35, pp. 131–136, February 

1987. 

[219] J. Roos, Development of the Speed and Convergence of APLAC’s DC Analysis by Means of Interpolated 

and Piecewise-Linear Models, Licentiate’s thesis, Helsinki University of Technology, 

Department of Electrical and Communications Engineering, 1996. 

[220] J. Roos, “Comparison of Simplicial Piecewise-Linear Approximations of Nonlinear Mappings,” 

Proceedings of NOLTA’99, vol. 2, (Waikoloa, Hawaii), pp. 839–842, November-December 

1999. 

[221] J. Roos, Improving the Speed and Convergence of DC Analysis by Means of Self-Generating 

Lookup Tables and Piecewise-Linear Analysis. PhD thesis, Helsinki University of Technology, 

Department of Electrical and Communications Engineering, 1999. 

[222] J. Roos and V. Karanko, “Always Convergent Piecewise-Linear DC Analysis by an Appropriate 

Choice of Initial Conditions,” Proceedings of ISCAS’2000, vol. 3, (Geneva, Switzerland), 

pp. 403–406, May 2000. 

[223] J. Roos and M. Valtonen, “General-Purpose Piecewise-Linear DC Analysis,” Proceedings of 

ICECS’96, vol. 2, (Rodos, Greece), pp. 792–795, October 1996. 

[224] J. Roos and M. Valtonen, “Piecewise-Linear DC Analysis of Nonlinear Circuits,” Proceedings 

of BEC’96, (Tallinn, Estonia), pp. 281–284, October 1996. 

[225] J. Roos and M. Valtonen, “An Efficient Piecewise-Linear DC Analysis Method for Circuits Containing 

Realistic Component Models,” Proceedings of ECCTD’97, vol. 2, (Budapest, Hungary), 

pp. 486–491, August-September 1997. 

[226] J. Roos and M. Valtonen, “Efficient Piecewise-Linear DC Analysis Using Projections of Simplices,” 

Proceedings of ICECS’97, vol. 1, (Cairo, Egypt), pp. 143–147, December 1997. 

[227] J. Roos and M. Valtonen, “An Adaptive Modeling Method for Speeding Up Piecewise-Linear 

DC Analysis,” Proceedings of CSC’98, vol. 2, (Piraeus, Greece), pp. 868–873, October 1998. 

[228] J. Roos and M. Valtonen, “Modified Nodal Formulation Method Applied to Piecewise-Linear 

DC Analysis,” Proceedings of ISCAS’98, vol. 3, (Monterey, California), pp. 403–406, May-June 

1998. 

[229] J. Roos and M. Valtonen, “Performance Evaluation of General-Purpose Piecewise-Linear DC 

Analysis,” Proceedings of NOLTA’98, vol. 1, (Crans-Montana, Switzerland), pp. 109–112, 


[230] J. Roos and M. Valtonen, “An Efficient Piecewise-Linear DC Analysis Method for General Non- 

Linear Circuits,” International Journal of Circuit Theory and Applications, vol. 27, pp. 311–330, 

1999. 

[231] J. Roos and M. Valtonen, “On the Boundary Crossing of Linear Regions in Piecewise- 

Linear DC analysis,” Proceedings of ECCTD’99, vol. 1, (Stresa, Italy), pp. 463–466, August- 


[232] J. Roos and M. Valtonen, “Selection of Iteration Variables in Piecewise-Linear DC Analysis,” 

Proceedings of NDES’99, (Bornholm, Denmark), pp. 33–36, July 1999. 

[233] A. Roth, Vacuum Technology. North Holland Publishing Company, 1976. 



[234] D. Rowe and B. Lao, “Numerical Analysis of Shielded Coplanar Waveguides,” IEEE Transactions 

on Microwave Theory and Techniques, vol. 31, pp. 911–915, November 1983. 

[235] S. N. Rschevkin, The Theory of Sound. Pergamon Press, 1963. 

[236] Y. Saad and M. Schultz, “GMRES: a Generalized Minimal Residual Algorithm for Solving Nonsymmetric 

Linear Systems,” SIAM Journal on Scientific and Statistical Computing, vol. 7, July 

1986. 

[237] A. Sanderson, “Effect of Surface Roughness on Propagation of TEM Mode,” Advances in Microwaves 

(L. Young, ed.), vol. 7, Cambridge, Massachusetts: Academic Press, 1971. 

[238] T. K. Sarkar and O. Pereira, “Using the Matrix Pencil Method to Estimate the Parameters of a 

Sum of Complex Exponentials,” IEEE Antennas and Propagation Magazine, vol. 37, pp. 48–55, 

February 1995. 

[239] J. Scholliers and T. Yli-Pietilä, “A SPICE-Based Library for Mechatronic Systems,” Proceedings 

of the 1995 IEEE International Symposium on Circuits and Systems, (Seattle, Washington), 

pp. 668–671, 1995. 

[240] M. Schröter, HICUM - A scalable physics-based compact bipolar transistor model. Electron 

Devices and Integrated Circuits, Technische Universität Dresden, December 2000. 

[241] F. Sellberg, “Simple and Accurate Algorithms to Include Lange and Asymmetric Microstrip Couplers 

in CAD-Packages,” Proceedings of the 18th European Microwave Conference, (Stockholm, 

Sweden), pp. 1157–1162, September 1988. 

[242] L. Selmi and B. Ricco, “Modeling Temperature Effects in the DC I-V Characteristics of GaAs 

MESFET’s,” IEEE Transactions on Electron Devices, vol. ED-40, pp. 273–277, February 1993. 

[243] S. Senturia, “CAD for Microelectromechanical Systems,” Proceedings of Transducers’95 and 

Eurosensors IX, vol. 2, (Stockholm, Sweden), pp. 5–8, June 1995. 

[244] S. D. Senturia, “CAD Challenges for Microsensors, Microactuators, and Microsystems,” Proceedings 

of the IEEE, vol. 86, pp. 1611–1626, 1998. 

[245] H. Seppä, Analysis of an R-SQUID Noise Thermometer, VTT Publications 54, Technical Research 

Centre of Finland, 1989. 

[246] F. Sharipov and V. Seleznev, “Data on Internal Rarefied Gas Flows,” Journal of Physical and 

Chemical Reference Data, vol. 27, no. 3, pp. 657–706, 1998. 

[247] Y. Shu, X. Qi, and Y. Wang, “Analysis Equation for Shielded Suspended Microstrip Line 

and Broadside-Coupled Stripline,” IEEE MTT-S International Microwave Symposium Digest, 

pp. 693–696, 1987. 

[248] L. J. Sivian, “Acoustic Impedance of Small Orfices,” Journal of the Acoustical Society of America, 

vol. 7, pp. 94–101, 1935. 

[249] B. Sklar, Digital Communications. Prentice-Hall, Inc., 1988. 

[250] Z. Skvor, “On the Acoustic Resistance Due to Viscous Losses in Air Gap of Electrostatic Transducers,” 

Acoustica, vol. 19, pp. 295–299, 1967. 

[251] D. Smith, TOM-2: An Improved Model for GaAs MESFETs, TriQuint Proprietary Report, 

TriQuint Semiconductor, Inc., February 1995. 11 pages. 

[252] J. C. Snowdon, “Representation of the Mechanical Damping Possessed by Rubberlike Materials 

and Structures,” Journal of the Acoustical Society of America, vol. 35, no. 6, pp. 821–829, 

1963. 



[253] P. Somervuo, Noise measurements, Course duplicate, Insinöörijärjestöjen koulutuskeskus, 

1975. In Finnish. 

[254] R. Spence and R. Soin, Tolerance Design of Electronic Circuits. Addison-Wesley Publishing 

Company, 1988. 

[255] V. Starck, Implementation of Simulated Annealing Optimization Method for APLAC Circuit Simulator, 

Master’s thesis, Helsinki University of Technology, Department of Electrical and Communications 

Engineering, 1996. 

[256] P. Stenius, Development of an Operational Amplifier Macromodel for APLAC Circuit Simulator, 


[257] P. Stenius and P. H. Valtonen, “Transient Analysis of Circuits Including Frequency-Dependent 

Components Using Transgyrator and Convolution,” Proceedings of the 11th European Conference 

on Circuit Theory and Design, Part II, (Davos, Switzerland), pp. 1299–1304, August- 


[258] S. Sundström, Stripline Simulation Models with Conductor Surface Roughness, Master’s thesis, 

Helsinki University of Technology, Department of Electrical Engineering, February 2004. 

[259] M. Suzuki, Circuit Parameters of a Tuning Post in a Rectangular Waveguide and its Applications, 

Report R-591-57, PIB-519, Microwave Res. Inst., Polytechnic Inst. of Brooklyn, New 

York, New York, 1957. 

[260] H. Szu and R. Hartley, “Fast Simulated Annealing,” Physics Letters A, vol. 122, pp. 157–162, 

June 1987. 

[261] A. Taflove, Computational Electrodynamics: The Finite-Difference Time-Domain Method. 

Boston, Massachusetts: Artech House, Norwood, Massachusetts, 1995. 

[262] C. G. D. W. TDMA/CDMA, Evaluation Report - TDoc SMG2 368/97, Report ERL-M520, Concept 

Group Delta Wideband TDMA/CDMA, May 1997. 42 pages. 

[263] J. Thompson and T. Apel, “Simplified Microstrip Discontinuity Modeling Using the Transmission 

Line Matrix Method Interfaced to Microwave CAD,” Microwave Journal, vol. 33, pp. 79–88, July 

1990. 

[264] H. A. C. Tilmans, “Equivalent Circuit Representation of Electromechanical Transducers: 

I. Lumped-Parameter Systems,” Journal of Micromechanics and Microengineering, vol. 6, 

pp. 157–176, September 1996. 

[265] H. A. C. Tilmans, “Equivalent Circuit Representation of Electromechanical Transducers: II. 

Distributed-Parameter Systems,” Journal of Micromechanics and Microengineering, vol. 7, 

pp. 285–308, December 1997. 

[266] T. Tinttunen, T. Veijola, H. Nieminen, V. Ermolov, and T. Ryhänen, “Static Equivalent Circuit 

Model for a Capacitive MEMS RF Switch,” Proceedings of the 5th International Conference on 

Modeling and Simulation of Microsystems, (San Juan, Puerto Rico), pp. 166–169, April 2002. 

[267] R. Tomar and P. Bhartia, “New Quasi-Static Models for the Computer-Aided Design of Suspended 

and Inverted Microstrip Lines,” IEEE Transactions on Microwave Theory and Techniques, 

vol. MTT-35, pp. 453–457, April 1987. corrections in No. 11, p. 1076, November 1987. 

[268] V. Tripathi, “A Dispersion Model for Coupled Microstrips,” IEEE Transactions on Microwave 

Theory and Techniques, vol. 34, pp. 66–71, January 1986. 

[269] V. Tripathi and J. Rettig, “A SPICE Model for Multiple Coupled Microstrips and Other Transmission 

Lines,” IEEE Transactions on Microwave Theory and Techniques, vol. 33, pp. 1513–1518, 

December 1985. 



[270] C. Tsai and K. Gupta, “Generalized Model for Coupled Lines and its Applications to Two-Layer 

Planar Circuits,” IEEE Transactions on Microwave Theory and Techniques, vol. 40, pp. 2190– 

2199, December 1992. 

[271] D. Valtchev and V. Georgiev, “Time-Frequency Transform for the Spectral Balance Method,” 

International Journal of Electronic Communication (AEÜ), vol. 49, pp. 50–53, January 1995. 

[272] M. Valtonen, APLAC1 - A Flexible Frequency Domain Circuit Analysis Program for Small Computers, 

Report S55, Helsinki University of Technology, Radio Laboratory, 1973. 

[273] M. Valtonen, APLAC2 - A Flexible DC and Time Domain Circuit Analysis Program for Small 

Computers, Report S56, Helsinki University of Technology, Radio Laboratory, 1973. 

[274] M. Valtonen, “Computer-Aided Analysis of Mixed Lumped and Distributed Circuits in Time 

Domain,” Proceedings of the 1978 IEEE International Symposium on Circuits and Systems, 

pp. 762–766, 1978. 

[275] M. Valtonen, APLAC - A Frequency Domain Program for Microwave Circuit Analysis and Design, 

Report 1252-79-05, Twente University of Technology, Microwave Laboratory, 1979. 

[276] M. Valtonen, Microwave Circuit Simulation Using Higher-Order Dynamic Elements, Report CT- 

20, Helsinki University of Technology, Circuit Theory Laboratory, 1994. 

[277] M. Valtonen, “APLAC - Object-Oriented Circuit Simulation and Design Tool,” Proceedings of 

the 4th Brazilian Microelectronics School (IV EBMicro), (Recife, Brazil), pp. 483–517, 1995. 

[278] M. Valtonen, “APLAC - Object-Oriented Circuit Simulation and Design Tool,” Proceedings of 

Microwave and RF Conference ’97, (London, England), 1997. 

[279] M. Valtonen, P. H. Jokinen, and T. Veijola, “APLAC - Object-Oriented Circuit Simulation and 

Design Tool,” Low-power HF Microelectronics - a unified approach (G. Machado, ed.), ch. 9, 

London, England: IEE Circuits and Systems, 1996. 40 pages. 

[280] M. Valtonen, P. H. Kankkunen, K. Mannersalo, R. Niutanen, P. Stenius, T. Veijola, and J. Virtanen, 

“APLAC - A New Approach to Circuit Simulation by Object-Orientation,” Proceedings of 

the 10th European Conference on Circuit Theory and Design, vol. 1, (Copenhagen, Denmark), 

pp. 351–360, July 1991. 

[281] M. Valtonen and T. Veijola, “APLAC - A Microcomputer Tool Especially Suited for Microwave 

Circuit Design in Frequency and Time Domains,” Proceedings of URSI/IEEE National Convention 

on Radio Science, (Espoo, Finland), p. 20, 1986. 

[282] R. P. van Kampen, Bulk-Micromachinend Capacitive Servo-Accelerometer. PhD thesis, Technical 

University of Delft, Delft, Netherlands, September 1995. 

[283] M. van Valkenburg, Analog Filter Design. Holt-Saunders, 1982. 

[284] T. Veijola, Modeling and Analysis of Mixed Lumped and Distributed Lossy Circuits in the Time 

Domain, Licentiate’s thesis, Helsinki University of Technology, Department of Electrical Engineering, 

1986. In Finnish. 

[285] T. Veijola, Accelerometer Model in APLAC, Report CT-18, Helsinki University of Technology, 

Circuit Theory Laboratory, February 1994. 

[286] T. Veijola, “Model for Thermal Spreading Impedance in GaAs MESFETs,” Proceedings of 

ICECS’96, (Rodos, Greece), October 1996. 

[287] T. Veijola, “Simple Model for Thermal Spreading Impedance,” Proceedings of Baltic Electronics 

Conference BEC’96, (Tallinn, Estonia), p. 73, October 1996. 

[288] T. Veijola, Accelerometer Level 3 and 4 Models in APLAC, Report CT-36, Helsinki University of 




[289] T. Veijola, “Finite-Difference Large-Displacement Gas-Film Model,” Proceedings of Transducers’99, 

(Sendai, Japan), pp. 1152–1155, June 1999. 

[290] T. Veijola, “Compact Damping Models for Lateral Structures Including Gas Rarefaction Effects,” 

Proceedings of the 3rd International Conference on Modeling and Simulation of Microsystems, 

(San Diego, California), pp. 162–165, April 2000. 

[291] T. Veijola, “Acoustic Impedance Elements Modeling Oscillating Gas Flow in Micro Channels,” 

Proceedings of the 4th International Conference on Modeling and Simulation of Microsystems, 

(Hilton Head Is., South Carolina), pp. 96–99, April 2001. 

[292] T. Veijola, “End Effects of Rare Gas Flow in Short Channels and in Squeezed-Film Dampers,” 

Proceedings of the 5th International Conference on Modeling and Simulation of Microsystems, 

(San Juan, Puerto Rico), pp. 104–107, April 2002. 

[293] T. Veijola and M. Andersson, “Combined Electrical and Thermal Parameter Extraction for Transistor 

Model,” Proceedings of the European Conference on Circuit Theory and Design ’97, 

(Budapest, Hungary), 1997. 

[294] T. Veijola and L. Costa, Combined Electrical and Thermal Circuit Simulation Using APLAC. Part 

C: Thermal Spreading Impedance Models, Report CT-34, Helsinki University of Technology, 

Circuit Theory Laboratory, 1998. 

[295] T. Veijola, H. Kuisma, and J. Lahdenperä, Model for Gas Film Damping in a Silicon Accelerometer, 


[296] T. Veijola, H. Kuisma, and J. Lahdenperä, “Model for Gas Film Damping in a Silicon Accelerometer,” 

Proceedings of Transducers’97, (Chicago, Illinois), pp. 1097–1100, June 1997. 

[297] T. Veijola, H. Kuisma, and J. Lahdenperä, “Dynamic Modelling and Simulation of Microelectromechanical 

Devices with a Circuit Simulation Program,” Proceedings of MSM’98, (Santa 

Clara, California), March 1998. 

[298] T. Veijola, H. Kuisma, and J. Lahdenperä, “The Influence of Gas-Surface Interaction on Gas 

Film Damping in a Silicon Accelerometer,” Sensors and Actuators A, vol. 66, pp. 83–92, 1998. 

[299] T. Veijola, H. Kuisma, and J. L. Ryhänen, “Equivalent Circuit Model of the Squeezed Gas Film 

in a Silicon Accelerometer,” Sensors and Actuators A, vol. 48, no. 3, pp. 239–248, 1995. 

[300] T. Veijola and S. Lähteenmäki, “Electrical Equivalent-Circuit Model for Small-Current Electromechanic 

Metal Contact,” Proceedings of the 16th European Conference on Cicuit Theory 

and Design ’03, (Krakow, Poland), pp. 203–212, September 2003. 

[301] T. Veijola and T. Mattila, “Modelling of Nonlinear Micromechanical Resonators and their Simulation 

with the Harmonic Balance Method,” International Journal of RF and Microwave Computer- 

Aided Engineering, vol. 11, no. 5, pp. 310–321, 2001. 

[302] T. Veijola, T. Mattila, O. Jaakkola, J. Kiihamäki, T. Lamminmäki, A. Oja, K. Ruokonen, H. Seppä, 

P. Seppälä, and I. Tittonen, “Large-Displacement Modelling and Simulation of Micromechanical 

Electrostatically Driven Resonators Using the Harmonic Balance Method,” Proceedings of the 

International Microwave Symposium, (Boston, Massachusetts), pp. 99–102, June 2000. 

[303] T. Veijola, T. Ryhänen, H. Kuisma, and J. Lahdenperä, “Circuit Simulation Model of Gas Damping 

in Microstructures With Nontrivial Geometries,” Proceedings of Transducers’95 and Eurosensors 

IX, vol. 2, (Stockholm, Sweden), pp. 36–39, June 1995. 

[304] T. Veijola, T. Tinttunen, H. Nieminen, V. Ermolov, and T. Ryhänen, “Gas Damping Model for a 

RF MEMS Switch and Its Dynamic Characteristics,” Proceedings of the International Microwave 

Symposium, (Seattle, Washington), pp. 1213–1216, January 2002. 



[305] T. Veijola and M. Turowski, “Compact Damping Models for Lateral Structures Including Gas 

Rarefaction Effects,” Journal of Microelectromechanical Systems, vol. 10, pp. 263–272, June 

2001. 

[306] T. Veijola and M. Valtonen, “Dispersive Transmission Line Model for Nonlinear Time Domain 

Circuit Analysis,” Proceedings of the 1988 IEEE Symposium on Circuits and Systems, (Espoo, 

Finland), pp. 2839–2842, June 1988. 

[307] T. Veijola and M. Valtonen, Combined Electrical and Thermal Circuit Simulation Using APLAC. 

Part A: Basic Implementation and Component Models, Report CT-25, Helsinki University of 

Technology, Circuit Theory Laboratory, 1995. 

[308] T. Veijola and M. Valtonen, Combined Electrical and Thermal Circuit Simulation Using APLAC. 

Part B: Electrothermal Diode and Transistor, Report CT-27, Helsinki University of Technology, 

Circuit Theory Laboratory, 1996. 

[309] R. Velghe, D. Klaassen, and F. Klaassen, MOS MODEL 9 level 902, Unclassified Report NL-UR 

003/94, Philips Research Laboratories, Eindhoven, Netherlands, June 1995. 

[310] M. Vidyasagar, Nonlinear Systems Analysis. Prentice-Hall, Inc., 1978. 

[311] J. Virtanen, Modeling of Lossy Transmission Lines in the Time Domain, Master’s thesis, 

Helsinki University of Technology, Department of Electrical Engineering, 1991. In Finnish. 

[312] J. Virtanen, Toroid Model in APLAC, Report CT-32, Helsinki University of Technology, Circuit 

Theory Laboratory, 1997. 

[313] B. C. Wadell, Transmission Line Design Handbook. Norwood, Massachusetts: Artech House, 

Norwood, Massachusetts, 1991. 

[314] H. Walker, “High Speed Data Communications System Using Phase Shift Key Coding.” U.S. 

patent 5 185 765, 1993. 

[315] H. Walker, “VPSK Modulation: A Tutorial,” Conference Proceedings RF Expo West, pp. 86–92, 


[316] H. Walker, “VPSK and VMSK Modulation Transmit Digital Audio and Video at 15 bits/sec/Hz,” 

IEEE Transactions on Broadcasting, vol. 43, pp. 454–462, March 1997. 

[317] J. Walston, “Spice Circuit Yields Recipe for PIN Diode,” Microwaves & RF, pp. 78–89, November 

1992. 

[318] S. Watanabe and M. Taki, “An improved FDTD model for the feeding gap of a thin-wire antenna,” 

IEEE Microwave and Guided Wave Letters, pp. 152–154, April 1998. 

[319] P. W. Webb, “Thermal Modeling of Power Gallium Arsenide Microwave Integrated Circuits,” 

IEEE Transactions on Electron Devices, vol. ED-40, pp. 867–877, May 1993. 

[320] P. W. Webb and I. A. D. Russell, “Thermal Resistance of Gallium-Arsenide Field-Effect Transistors,” 

IEE Proceedings G, vol. 136, pp. 229–234, October 1989. 

[321] P. Welch, “The Use of Fast Fourier Transform for the Estimation of Power Spectra: A Method 

Based on Time Averaging Over Short, Modified Periodograms,” IEEE Transactions on Audio 

Electroacoustics, vol. AU-15, June 1967. 

[322] G. Wexler, “The Size Effect and the Non-Local Boltzmann Transport Equation in Orfice and 

Disk Geometry,” Proc. Phys. Soc., vol. 89, pp. 927–941, 1966. 

[323] H. Wheeler, “Transmission-Line Properties of Parallel Wide Strips by a Conformal-Mapping 

Approximation,” IEEE Transactions on Microwave Theory and Techniques, vol. 12, pp. 280– 

289, May 1964. 



[324] H. Wheeler, “Transmission-Line Properties of a Stripline Between Parallel Planes,” IEEE Transactions 

on Microwave Theory and Techniques, vol. 26, pp. 866–876, November 1978. 

[325] H. Wheeler, “Transmission-Line Properties of a Round Wire in a Polygon Shield,” IEEE Transactions 

on Microwave Theory and Techniques, vol. 27, pp. 717–721, August 1979. 

[326] B. Widrow and S. Stearns, Adaptive Signal Processing. Prentice-Hall, Inc., 1985. 

[327] Y. Z. William and W. Yiyan, “COFDM: an Overview,” IEEE Transactions on Broadcasting, 

vol. 41, pp. 1–8, March 1995. 

[328] R. P. v. F. Wolffenbuttel, “Modeling the Mechanical Behavior of Bulk-Micromachined Silicon 

Accelerometers,” Sensors and Actuators A, vol. 64, pp. 137–150, 1998. 

[329] H. H. Woodson and J. R. Melcher, Electromechanical Dynamics, Part 1: Discrete Systems. 

Wiley, New York, 1968. 

[330] K. Y. Yasumura, T. D. Stowe, E. M. Chow, T. Pfafman, T. W. Kenny, B. C. Stipe, and D. Rugar, 

“Quality Factors in Micron- and Submicron-Thick Cantilevers,” Journal of Microelectromechanical 

Systems, vol. 9, no. 1, pp. 117–125, 2000. 

[331] K. S. Yee, “Numerical Solution of Initial Boundary Value Problems Involving Maxwell’s Equations 

in Isotropic Media,” IEEE Transactions on Antennas and Propagation, vol. 14, pp. 302– 

307, May 1966. 

[332] P. Zhao, J. Littva, and K. Wu, “A New Stable and Very Dispersive Boundary Condition for the 

FD-TD Method,” 1994 IEEE MTT-S Digest TU1B-4, pp. 35–38, 1994. 

[333] Y. Zhao, D. M. Maietta, and L. Chang, “An Asperity Microcontact Model Incorporating the 

Transition From Elastic Deformation to Fully Plastic Flow,” Journal of Tribology, Trans. ASME, 

vol. 122, pp. 86–93, January 2000. 

[334] V. Ziebart, O. Paul, U. Münch, J. Schwizer, and H. Baltes, “Mechanical Properties of Thin 

Films From the Load Deflection of Long Clamped Plates,” Journal of Microelectromechanical 

Systems, vol. 7, no. 3, pp. 320–328, 1998. 

[335] R. Ziemer and W. Tranter, Principles of Communications. Houghton Mifflin Company, 1985. 


APLAC Editor Glossary page APP-5.1 

5. APLAC Editor Glossary 

AC: This is the basic frequency domain analysis. It is based on a linearized circuit at the operating 

point. As a conseguence of linearity, if the amplification of the device is 20dB, 1 mV in input 

creates 10 mV in output and if the input is 1 MV, output reads 10 MV (even though the operating 

voltage of the device can be such as 10 V). NOTE: Be careful with the validity of AC results. 

APLAC Editor: This is the graphical entry tool for APLAC Simulator. You can easily create the circuit 

/ system topology with APLAC Editor, add Control Objects to the schematic that describe 

the desired analysis and then automatically launch APLAC Simulator to perform the analysis. 

APLAC Simulator: This is the simulator executable. In UNIX, it is a batch program that runs the 

analysis and terminates when all analysis windows are closed. In Windows, it has a main 

window and the program exits only after this window is closed. 

Circuit Diagram: meant for circuit analysis (as opposed to system level design) built from electrical 

components 

Control Object: contains all simulation definitions that are not part of the schematic diagram, used 

to control the analysis of the circuit/system under study. In APLAC Language, a statement can 

be a component or a Control Object. 

DC: The basis of almost every other analysis, initial operating point calculation. DC means, of 

course, that frequency in the circuit is zeroed and all reactive component values are set to 

zero or infinity. 

Diagram: means the topology of the circuit or system in the APLAC Editor, components and their 

interconnecting wires. 

Element: In APLAC Editor, your circuit diagram consists typically of components (resistors, capacitors...) 

and their interconnections. However, it is also possible to enter such objects into the 

diagram that have no direct counterpart in physical reality, like NodeNames, Shorts, Outputs... 

These parts are denoted as elements of the diagram. 

Harmonic Balance: Nonlinear analysis which can include frequency dependent components. Also 

known as the steady state analysis. 

Schematic: This is the diagram and the associated Control Objects: Schematic = Diagram + 

Control Objects. 

Statement: APLAC Language statement, for example Analyze, Tran or Sweep. 

System Diagram: Diagram for system level design built of system blocks. 

Transient analysis: This is the time domain analysis. The waveform can be of an arbitrary shape. 


APLAC Simulator Glossary page APP-6.1 

6. APLAC Simulator Glossary 

Access function A user-defined function which gives access to the parameters of an object is called 

the access function. The body of an access function must include either a Return block or a 

minimum of one Ret function call. The access function is defined explicitly by the Function 

statement. The access function may be used in APLAC expressions. 

Example: 

Function RDep(x) [ 1, sqr(x), 2*x ] 

Var TempDep FUNC=RDep(Temp) 

Above RDep is an access function of a three-dimensional temperature-dependent variable, 

TempDep. A reference to TempDep causes the execution of the access function RDep, which 

returns three values to TempDep. 

Variable TempDep above can also be defined in a more compact way (the access function is 

implicit): 

Example: 

Var TempDep FUNC=[ 1, sqr(Temp), 2*Temp ] 

An access function fi returns 10 integers 0, 1, ..., 9: 

Example: 

* note the definition of local variable i in function fi 

Function fi {i} for(i=0, i


Definition The introduction of an object is called the definition. The definition creates an object with 

a unique name and defines its properties using the parameters. Lines beginning with Res, Cap 

and MOSFET are definitions. Programming statements which define variables and functions 

are often also called definitions. 

Delimiter In lines beginning with Function or Call the following characters are considered delimiters: 

ASCII codes from 1 to 32 (ASCII code 32 = blank). In expressions the characters ”=” and ”,” are 

also delimiters. 

Directive Input file (.i) may have directives either for controlling or text editing purposes. All directives 

begin with the symbol #. 

Input file preprocessor recognizes the following directives: 

#CaseSensitiveUnits This directive makes the scaling factors case sensitive except Meg, Pet 

and mil. 

#define name replace text name is replaced by replace text whenever it appears after the 

#define definition in the input file, except inside comments, strings and other preprocessor 

directives. The position of #define affects the operation of the Ifdef directive. 

#else #else can be used inside Ifdef...#endif block. 

Example: 

#ifdef MSWINDOWS 

Print S "MSWINDOWS is defined" LF 

#else 

Print S "MSWINDOWS is not defined" LF 

#endif 

#endif #endif terminates a block beginning with Ifdef. 

Ifdef name Ifdef begins a block ending at #endif. All input lines between Ifdef name . . . 

#endif block are interpreted normally if name was previously defined with the #define 

directive. Otherwise the input lines within the block are ignored. Note that nested Ifdefs 

are allowed. There are six platform-dependent names available: MSWINDOWS (defined 

under Win95/NT environment), UNIX (defined under any UNIX system), DGUX (defined 

under Digital UNIX), HPUX (defined under Hewlett-Packard UNIX), LINUX (defined under 

Linux), and SOLARIS (defined under Sun/Solaris). These can be tested for creating 

common input files for various hardware environments. 

Example: 

#ifdef MSWINDOWS 

OpenFile R "C:MODELS\\BJT.I" 

#endif 

#ifdef UNIX 

OpenFile R "/users/my/models/bjt.i" 

#endif 

Ifndef name Ifndef begins a block ending at #endif. Ifndef is the complemented version of 

Ifdef (if not defined). 

#include filename Includes the file filename in the Input file. #includes can be nested at any 

level. Each file included is processed at the same directory where the actual file is. This 

allows the nested #includes relative to the current directory. 

#libdir pathname1:pathname2:...:pathnameN in UNIX and 

#libdir pathname1;pathname2;...;pathnameN in Win95/NT 

This directive is used together with the #library directive. The delimiter between pathnames 

should be a colon in UNIX and a semicolon in Win95/NT to preserve the colon 

for defining the drive (e.g., C:). If the opening of libraryfile in the current directory fails 



APLAC tries to open the files (/ for UNIX, use \ in Win95/NT) pathname1/libraryfile, pathname2/libraryfile 

etc. Instead of #libdir directive an environment string called APLACDIR 

could be used. In the UNIX environment the following environment string could be used: 

Example: 

setenv APLACDIR /lib/aplac/:/appl/ele/aplac/lib/ 

Example: (WinNT) 

set APLACDIR=\lib\aplac\;\appl\ele\aplac\lib\ 

#library libraryfile name1 name2 ... nameN This directive includes file libraryfile and in addition 

sends the specified #define directives name1 name2 ... nameN to the file. This 

enables, for example, selective use of component model parameters in the library. All 

previously introduced #define directives are not valid in libraryfile. 

Example: As a simple example, let the following lines 

#ifdef a 

Print S "a" LF 

#endif 

#ifdef version 

Print APLACVERSION LF 

#endif 

#ifdef b 

Print S "b" LF 

#endif 

form a file under name libfile. Then the following file 

#define b 27 

#library libfile a version 

Print REAL b LF 

yields, after preprocessing, the following input for the APLAC Language 

Print S "a" LF 

Print APLACVERSION LF 

Print REAL 27 LF 

NOTE: #define b did not affect the library file because it was not mentioned in the line 

#library libfile a version. 

Any #include-files defined inside libraryfile are first sought from the directory where libraryfile 

is stored, and thereafter from the current directory, and the directory list defined 

by APLACDIR. 

#undef name name must be a symbol, which is previously defined using the #define directive. 

name is not replaced in the rest of the file after the #undef directive. 

#ver Displays APLAC version information. 

Expression Mathematical statements composed of integers, real or complex numbers, integer, real 

or complex vectors, real or complex matrices, variables, access functions, functions, Math functions 

and/or user-defined functions, and operators are called expressions. Several expressions 

may be cascaded using a semicolon as a delimiter. In this case the value of the cascaded 

expressions is equal to the value of the last expression. 

Example: 

Declare VAR a b c 

Call a=(7*8; b=5; 9);c=a 

Print REAL a BL REAL b BL REAL c LF 

yields the output 

9.000 5.000 9.000 

Note the effect of parentheses. The example above without parentheses is shown below. 

Example: 




Call a=7*8; b=5; 9;c=a 


would output 

56.000 5.000 56.000 

On the other hand, if the parentheses are misplaced as in the following 

Example: 


Call a=(7*8; b=5; 9;c=a) 


the result is surpringly 

0.000 5.000 0.000 

because there is, in fact, an assignment a = a and thus a preserves its default value 0 due to 

the Declare statement. 

NOTE: Side effects may occur when using the cascade of expressions as was done above. 

Functions A function which gives access to the analyzer and optimizer parameters as well as the 

results of the analysis and optimization. A function may be used in expressions. Yield, Get- 

Param, and Distortion are examples of functions. 

Identifier The optional parameters are composed of identifiers alone or identifiers followed by identifierdependent 

information usually composed of other identifiers and/or references to previously 

defined objects. In the following 

Example: 

Var k1=0.99 MIN=0.9 OPT 

Ind L1 2 3 10n 

Ind L2 6 0 100n 

Muc M1 L1 L2 K=k1 

a variable, two inductances and a mutual inductance are defined. The optional parameters 

above include three identifiers, MIN, OPT and K. MIN is followed by a real-valued expression 

(real number in this case), OPT is a pure identifier defining an optimization variable and K is 

followed by the previously defined variable k1. 

Input File A normal ASCII-file including comments, directives, definitions, and statements understood 

by APLAC Language is called input file. The structure of the input file is as follows: 

Example: 

* this is a comment line. 

* directives 

* definitions and statements, i.e. commands 

Analyze $ this is a simple job definition 

Sweep $ this begins a versatile job definition 

* any lines not containing circuit definition 

* all commands here are executed for each sweep point 

EndSweep $ this terminates the job definition 

Statements and commented lines can be placed anywhere. However, the circuit must have 

been completely defined before the first job statement Sweep or Analyze. You may use Sweep 

or Analyze alone or combine them. The number of job statements is not limited. 

Integer number A normal integer, which may be followed by a scaling factor, such as 21 k. 

If the syntax of the APLAC Language expects an integer, a real function or a real expression 

may also be specified. In these cases, the value of the function or expression is rounded to 

the nearest integer. Note that the value of the function or expression is usually evaluated only 



once. Inside Sweep. . . EndSweep block, however, the evaluation takes place for each sweep 

point. 

Math function A standard function such as sin, sqrt or pow, or an extended library function included 

in APLAC, such as Csqrt, Fourier or Interpol. The standard functions are written in 

lower-case letters while the internal library functions begin with capital letters in this volume. 

APLAC Language, however, is case insensitive. A math function may be used in expressions. 

Name Each object has a unique name, which is symbolic and not case sensitive. If a name includes 

blanks, it must be packaged within double quotes. If it begins with a number, it must be 

packaged within double quotes, unless it is the name of a Node, branch or component. 

Nodes and branches should not share the same name, but can share names with components, 

DataFiles, GoalDatas, Models, NPorts, NWAs and Vars. Example: A Var may have the same 

name as a node. 

If the same name is used for a user-defined function and a variable, the name of the variable 

has higher priority in positions where both are allowed. If the name of a predefined function 

such as sin is used as a name, then the function must not be used in the same input file. 

Every circuit must have a ground node denoted either by GND or 0. 

Object Most modules of the APLAC program are written as objects. Each type of object is called 

a class. Examples of such classes are all the component models, variables, graphics, the 

analyzer (the simulation engine), and the optimizer (the design engine). The following classes 

are visible to the user: DataFile, GoalData, Model, NPort, NWA and Var. 

Operators APLAC Language recognizes the operators in the table. The last two columns indicate 

whether the operator can be used with real or complex operands. 

Symbol Explanation Real number Complex number 

* multiplication x x 

/ division x x 

+ addition x x 

- subtraction or unary minus x x 

ˆ exponents x x 

= assignment x x 

< less than x 

≤ less than or equal to x 

> greater than x 

≥ greater than or equal to x 

== equal to x 

!= not equal to x 

and logical and x 

or logical or x 

; expression delimiter - - 

An order of precedence for operators is normal (according to C language). Assignments are 

evaluated from right to left and other operations from left to right. The precedence of operators 

doesn’t affect the order of evaluation of functions. Functions are always evaluated in order 

from left to right. 

If one of the operands is complex the whole expression becomes complex. Assignments behave 

as in C, returning the assigned value. 

The logical operators return either 0.0 (false) or 1.0 (true). An expression is considered true if 

its absolute value is greater than 0.5. APLAC also has an operator for separating expressions: 

;. A cascade of expressions separated by ;-operators returns the value of the last expression. 



Real number A normal real number, which may be followed by a scaling factor, e.g., 12.7 G. 

If the syntax of the APLAC Language expects a real number a real function or a real expression 

may be specified. 

Scaling factor The scaling factors depend on the #CaseSensitiveUnits directive. By default, real 

numbers may have the following case insensitive scaling factors: 

PET = 10 15 k = 10 3 u = 10 −6 

T = 10 12 % = 10 −2 n = 10 −9 

G = 10 9 m = 10 −3 p = 10 −12 

MEG = 10 6 mil = 25.4 · 10 −6 f = 10 −15 

If the #CaseSensitiveUnits directive has been specified the scaling factors become case sensitive 

and are listed below: 

E = 10 18 Meg = 10 6 u = 10 −6 

P = 10 15 k = 10 3 n = 10 −9 

Pet = 10 15 % = 10 −2 p = 10 −12 

T = 10 12 m = 10 −3 f = 10 −15 

G = 10 9 mil = 25.4 · 10 −6 a = 10 −18 

M = 10 6 

Note that the case insensitive scaling factors may be followed by units, e.g., 5 nH, 7.2 V and 

127 MEGohm, whereas case sensitive scaling factors must be used alone, e.g., 5 n, 7.2 and 

127 M. However, mm is an exception and thus, e.g., 2.3 mm is allowed in both cases. 

Statement Keywords understood by the programmable APLAC Language are called statements. 

For example, For, If and Declare are statements. 

String Any text is called a string. A string may be closed within double quotes but cannot include a 

double quote. See Name for cases where a string must be enclosed within double quotes. 

String function A function manipulating strings or operating with string variables is called a string 

function. See the example in String variable. 

String variable A variable whose value is a string is called a String variable. String variables may 

be used in file names and input/output operations. 

Example: 

Declare STRING file path name 

Calc 

ReadString(path) 

ReadString(name) 

strcat(file,path) 

strcat(file,"/") 

strcat(file,name) 

EndCalc 

Print STRING "open file:" STRING file LF 

OpenFile R file 

If path and name receive (from stdin) values ”/aplac/examples” and 

”hfet.s2p”, respectively, then the example above yields text 

open file:/aplac/examples/hfet.s2p 

and opens the given file for reading. 



User-defined functions A function defined using the statement Function is called a user-defined 

function. A user-defined function may either be a normal parameterized function returning one 

or more values, or it may be an access function. The only difference between user-defined functions 

and access functions lies in the fact that access functions must include either a Return. . . 

blockor at least one Ret function call. Legal function types include integer, real, complex and 

vector. The parameters of the user-defined function have to be of the type real. User-defined 

functions may be used in expressions. 

If the syntax of the APLAC Language expects a function an expression may also be specified. 

Whenever an expression is used in place of a function, all delimiters must be closed within 

parentheses (see Variable). 

Variable (Var) Var is an extension of the normal concept of a variable. A variable may be almost anything: 

real number, complex number, functional value, vector of real functional values, statistical 

variable, optimization variable or E-series variable. 

An explicit variable definition is made using Var or Declare, or closing the definition either within 

braces or brackets in places where a variable is expected. 

Example: 

Var Cpara=1n MIN=0.1n MAX=10n OPT 

Cap Cshunt 3 0 Cpara 

defines an optimization variable Cpara, which is used by Cap Cshunt. The two definitions 

above could also be replaced by the definition below. 

Example: 

Cap Cshunt 3 0 {Var Cpara=1n MIN=0.1n MAX=10n OPT} 

Variables are created automatically, if an expression is written directly (one-dimensional variable), 

within parentheses (two-dimensional or complex variable), or within brackets (multidimensional 

variable or vector) to the position where a variable is expected. In this case the 

specified expression(s) will define the access function of the internal variable. In the multidimensional 

case the entries are separated by commas. 

Example: 

Function Rdep [ 2*sqr(f)+f+1k ] 

Var RD FUNC=Rdep 

Var Jgen=50 IM=25 

Res R 2 0 RD 

Curr J 0 2 AC=Jgen 

The same example as a shorter version. 

Example: 

Res R 2 0 (2*sqr(f)+f+1k) 

Curr J 0 2 AC=(50,25) 

Whenever an expression is used in place of a variable, all delimiters must be closed within 

parentheses. Thus, for example, the expression of Res above may also be written as 

Example: 

Res R 2 0 2*Sqr(f)+f+1k $ correct 

or alternatively as 

Example: 

Res R 2 0 2*sqr(f)+(f + 1k) $ correct 

whereas 

Example: 

Res R 2 0 2*sqr(f)+f + 1k $ wrong 



is not acceptable because of the delimiter between f and +. 

In its simplest form the automatic creation of a variable is done by introducing only its name in 

braces in appropriate place. 

Example: 

Volt Vbias 3 0 DC {Vbe} 

creates the variable Vbe, which has a default value of 1 and may be used, e.g., as a variable in 

Sweep. 

VCCS VCCS can have several controlling voltages and the output current can be any function of the 

controlling voltages. In APLAC all analog components are internally modeled using VCCSs. 

You can define your own nonlinear models with VCCSs, VCVSs, CCCSs or CCVSs. 

A simple static diode model is given. The model obeys the equation 

Example: 

$ u = CV(0) 

i = 10 −14 (e 40u − 1). 

VCCS D1 n1 n2 1 n1 n2 

+ [10f*(exp(40*CV(0))-1),400f*exp(40*CV(0))] 

Furthermore 

Example: 

Function Rnl [ CV(0)*sqr(CV(1))*CV(2), 

+ sqr(CV(1))*CV(2), 

+ 2*CV(0)*CV(1)*CV(2), 

+ CV(0)*sqr(CV(1)) ] 

Var Vcros FUNC=Rnl 

VCCS Rout Nout GND 3 N1 GND N1 N2 N3 N7 Vcros 

defines a nonlinear voltage-controlled current source having three controlling voltages u0, u1 

and u2 between the node pairs (N1,GND), (N1,N2) and (N3,N7), respectively. Source current i 

flowing from node Nout to GND obeys the equation 

i = u0u 2 1u2. 

CV(0) ... CV(2) refer to the controlling voltages. The access function of the VCCS should return 

the current and its derivatives with respect to each controlling voltage. These derivatives are 

needed for iteration in nonlinear analysis and for linear AC analysis. Without explicit derivatives 

APLAC calculates the derivates numerically, making analysis slower or even leading to a poor 

convergence. 

Vector or Matrix A collection of items is called a vector or a matrix. Vectors may be of the type 

integer, identifier, real or complex. Matrices can only be of the type real or complex. By default 

the vectors and matrices are real. 

If the syntax of the APLAC Language expects a vector or matrix, a vector (matrix) -valued 

function or expression may also be given. If the expression includes delimiters they must be 

closed within parentheses (see Variable). Multidimensional variables may also be used in 

places where a vector is expected. 


LINK Glossary page APP-7.1 

7. LINK Glossary 

AL APLAC Language 

.amd APLAC Mapping Definition file. This file contains the rules for mapping. Also called as the 

”rule definition file”. 

APLAC Editor The schematic diagram editor that self-integrates with the APLAC Simulator. Components 

or blocks, nets (nodes), branches, and model parameters can be manipulated without 

limit on the APLAC Editor drawing sheet, connecting to create complete schematics. The 

APLAC Editor automatically generates an input file for the APLAC Simulator. 

APLAC Simulator The electronic design simulation tool that includes multiple analysis and optimization 

methods as well as a Monte Carlo feature. Analysis methods cover DC and AC currents, 

frequency and time domains, noise, sensitivity, harmonic balance, and optimization with automatic 

statistical support. Pre-defined component models include a variety of bipolar transistors, 

diodes and field effect transistors, as well as a broad selection of macro models, passive components 

and sources. 

AS APLAC Simulator 

LINK APLAC RF IC Design Link, the electronic design integration tool that bridges the gap between 

design frameworks and the industry-strength APLAC Simulator, supporting third-party 

systems such as PowerLogic/PowerPCB. 

.asd APLAC Simulation Definition file. This is the presentation of the APLAC Language file to be 

simulated in LINK-specific format. It is close to .i file, but not readable by APLAC Simulator. 

Attribute In some frameworks, the properties of elements are called attributes. For example, C can 

be an attribute for a capacitor, denoting the capacitance of the element. Also Property. 

CAD Computer Aided Design 

CADE Third-party Computer Aided Design Environment (framework), such as Design Architect or 

PowerLogic/PowerPCB. Using the APLAC RF IC Design Link, designs from a variety of CAD 

frameworks can be imported and used in all types of APLAC Simulation. 

Component A basic building block in a circuit, with defined current/voltage behavior. Each component 

or complex model is specified by a collection of Key/Value pairs in the extracted transition 

netlist. 

Component library The library in a CAD framework containing netlists that describe a selection of 

components for specific design tasks, such as the semiconductor model from a specific vendor. 

Design Viewpoint A Design Architect term. Design Viewpoint governs what is visible from the 

schematic to the outside world, so with Design Architect you define the Viewpoint as the 

schematic name to LINK. 

EDA Electronic Design and Automation (a special branch of CAD that deals with the design of electronic 

equipment. Also measurement devices are sometimes taken as part of EDA) 

JRE Java Runtime Environment, the Java Virtual Machine on which LINK executable runs, enabling 

distribution of LINK to various operating systems. 

Key In an extracted transition netlist, a key is the data type associated with a value. 

Mapping Collection A collection of Mapping Rules associated with a specific CAD framework. 

There is typically one Mapping Collection for each component library at a site. 



Mapping Rule A pre-defined rule used to convert design components from a third-party CAD framework 

to APLAC Simulator input format. 

MG Short for Mentor Graphics 

Net (node) Any single group of wires or connections to component pins, that holds one single voltage 

(potential). 

Property In some frameworks, the attributes of elements are called properties. For example, C can 

be a property for a capacitor, denoting the capacitance of the element. Also Attribute. 

Schematic The design diagram (or schematic/schema) of an electrical device, in which electrical 

components and their connections are represented with symbols, showing only their most important 

specifications or parameters. In schematics, components and connections have no 

specific three-dimensional shape. 

Simulation abstraction Defined parts of a circuit/schematic that do not appear in the final working 

device, such as sources, outputs, or loads. 

.tnl Transition netlist 

Transition netlist A design’s component attributes and connectivity data is extracted from the CAD 

environment to the .tnl. Extracted transition netlist data describes component data as sets of 

Key/Value pairs. The .tnl is mapped to the APLAC netlist. 

.tnl element A line in the Transition Netlist .tnl defining one single CAD framework element. 

Variable Definition Attribute (VDA) A special attribute that causes a certain property be mapped 

automatically as a variable, not with the original (numerical) value. Used especially with those 

frameworks where the notion of variables is not supported internally. 

Wizard A helper utility in LINK for defining simulation tasks. Wizards ensure that all relevant user 

input is collected from the user. 


FLEXlm Glossary page APP-8.1 

8. FLEXlm Glossary 

Feature - any part of APLAC that requires licensing. For example: kernel APLAC, RF option, etc. 

License - your legal right to use a feature. FLEXlm controls licensing by controlling feature usage. 

Client - APLAC is a client for the license server. APLAC client installations request licenses from 

the license server. 

Daemon - the process that serves the clients. Synonymous with the license server and its background 

role. 

Vendor Daemon - the server process that dispenses licenses for requested APLAC software features. 

The APLAC Solutions Corporation vendor daemon is lm aplac or lm aplac.exe. 

lmgrd - the master license server daemon. lmgrd acts as a relay between APLAC software and the 

APLAC Solutions vendor daemon. 

Server Node - a computer system running a license server. 

License File - a file that defines server nodes that can run license daemons, vendor daemons and 

licenses (features) for all supported products. 

License File List - a list of license files on UNIX or Windows. A license file list can be supplied 

wherever at least one license file is used. 

License Key - a 12 to 20 character hexadecimal number authenticating the readable license file text, 

ensuring that the license file has not been modified. 

License Server - lmgrd and vendor daemon processes. License server refers to the processes, not 

the computer hardware (compare Server Node). 

lmtools.exe 


Analysis methods/Common problems page APP-9.1 

9. Complete List of APLAC 8.10 

Examples 

Click any example netlist .n or input .i file to open it for simulation or editing. Circuits and results can 

also be printed in text or graphical formats. 

Examples are documented in .pdf brochures of the same name. 

NOTE: UNIX users may be unable to launch non-.pdf files through .pdf links. After viewing the related 

brochure, please find the desired example file through the APLAC interface. 

9.1 Analysis methods/AC 

APLAC/examples/Analysis methods/AC/ amp1 gain.n 

APLAC/examples/Analysis methods/AC/ amp1 gain.pdf 

APLAC/examples/Analysis methods/AC/ amp1 tailor graphics.n 

APLAC/examples/Analysis methods/AC/ amp1 tailor graphics.pdf 

APLAC/examples/Analysis methods/AC/ amp2 NDF stability.n 

APLAC/examples/Analysis methods/AC/ amp2 NF.n 

APLAC/examples/Analysis methods/AC/ amp2 stability basic.n 

APLAC/examples/Analysis methods/AC/ amp2 stability envelope.n 

APLAC/examples/Analysis methods/AC/ filter4 gdelay sensitivity.n 

APLAC/examples/Analysis methods/AC/ filter4 opt Eseries.n 

APLAC/examples/Analysis methods/AC/ filter4 tuning.n 

APLAC/examples/Analysis methods/AC/ filter5 response.n 

APLAC/examples/Analysis methods/AC/ filter5 variable.n 

APLAC/examples/Analysis methods/AC/ zeropivot ac.n 

9.2 Analysis methods/ANN 

APLAC/examples/Analysis methods/ANN/ ANN procedure.n 

APLAC/examples/Analysis methods/ANN/ ANN procedure.pdf 

9.2.1 Analysis methods/ANN/JFET 

APLAC/examples/Analysis methods/ANN/JFET/ JFET schema.n 

APLAC/examples/Analysis methods/ANN/JFET/ jfet ann.lib 

APLAC/examples/Analysis methods/ANN/JFET/ jfet create ANNmodel.n 

APLAC/examples/Analysis methods/ANN/JFET/ jfet create data.n 


Analysis methods/HB 1-TONE/submodels page APP-9.2 

9.2.2 Analysis methods/ANN/RSB 

APLAC/examples/Analysis methods/ANN/RSB/ rsb as defmodel.lib 

APLAC/examples/Analysis methods/ANN/RSB/ rsb create ANNmodel.n 

APLAC/examples/Analysis methods/ANN/RSB/ rsb schema.n 

9.3 Analysis methods/Common problems 

APLAC/examples/Analysis methods/Common problems/ zeropivot ac.n 

APLAC/examples/Analysis methods/Common problems/ zeropivot dc.n 

9.4 Analysis methods/DC 

APLAC/examples/Analysis methods/DC/ dc basic.n 

APLAC/examples/Analysis methods/DC/ dc basic.pdf 

APLAC/examples/Analysis methods/DC/ dc sensitivity.n 

APLAC/examples/Analysis methods/DC/ dc sensitivity manually.n 

APLAC/examples/Analysis methods/DC/ dc source power.n 

APLAC/examples/Analysis methods/DC/ voltage divider.n 

APLAC/examples/Analysis methods/DC/ zeropivot dc.n 

9.5 Analysis methods/Graphics 

APLAC/examples/Analysis methods/Graphics/ grid3d.n 

APLAC/examples/Analysis methods/Graphics/ m3d.n 

APLAC/examples/Analysis methods/Graphics/ markers lines drawing styles.n 

APLAC/examples/Analysis methods/Graphics/ store eps.n 

9.6 Analysis methods/HB 1-TONE 

APLAC/examples/Analysis methods/HB 1-TONE/ amp1 large signal freq sweep.n 

APLAC/examples/Analysis methods/HB 1-TONE/ amp1 large signal freq sweep.pdf 

APLAC/examples/Analysis methods/HB 1-TONE/ amp1 power sweep.n 

APLAC/examples/Analysis methods/HB 1-TONE/ amp1 power sweep.pdf 

APLAC/examples/Analysis methods/HB 1-TONE/ amp1 spectrum waveform.n 

APLAC/examples/Analysis methods/HB 1-TONE/ amp1 spectrum waveform.pdf 

APLAC/examples/Analysis methods/HB 1-TONE/ amp3 efficiency sweep.n 

APLAC/examples/Analysis methods/HB 1-TONE/ amp3 large signal freq sweep.n 

APLAC/examples/Analysis methods/HB 1-TONE/ amp3 optimize waveform MC.n 


Analysis methods/HB 3-TONE page APP-9.3 

APLAC/examples/Analysis methods/HB 1-TONE/ amp3 power sweep.n 

APLAC/examples/Analysis methods/HB 1-TONE/ amp3 spectrum waveform.n 

APLAC/examples/Analysis methods/HB 1-TONE/ amp4 spectrum waveform distortion.n 

APLAC/examples/Analysis methods/HB 1-TONE/ colpitts oscillator frequency search.n 

APLAC/examples/Analysis methods/HB 1-TONE/ coupler waveform.n 

APLAC/examples/Analysis methods/HB 1-TONE/ diode mixer lsss noise.n 

APLAC/examples/Analysis methods/HB 1-TONE/ diode mixer lsss noise figure temperature.n 

APLAC/examples/Analysis methods/HB 1-TONE/ diode mixer lsss spectrum.n 

APLAC/examples/Analysis methods/HB 1-TONE/ doubler1 spectrum waveform.n 

APLAC/examples/Analysis methods/HB 1-TONE/ doubler2 spectrum waveform.n 

APLAC/examples/Analysis methods/HB 1-TONE/ frequency multiplier spectrum waveform.n 

APLAC/examples/Analysis methods/HB 1-TONE/ rectifier spectrum waveform.n 

APLAC/examples/Analysis methods/HB 1-TONE/ rectifier waveform ripple.n 

9.7 Analysis methods/HB 1-TONE/submodels 

APLAC/examples/Analysis methods/HB 1-TONE/submodels/ reso.i 

APLAC/examples/Analysis methods/HB 1-TONE/submodels/ reso.n 

APLAC/examples/Analysis methods/HB 1-TONE/submodels/ reso.sub 

APLAC/examples/Analysis methods/HB 1-TONE/submodels/ transistor.i 

APLAC/examples/Analysis methods/HB 1-TONE/submodels/ transistor.n 

APLAC/examples/Analysis methods/HB 1-TONE/submodels/ transistor.sub 


APLAC/examples/Analysis methods/HB 2-TONE/ amp3 OIP3.n 

APLAC/examples/Analysis methods/HB 2-TONE/ amp5 OIP3.n 

APLAC/examples/Analysis methods/HB 2-TONE/ balanced mixer.n 

APLAC/examples/Analysis methods/HB 2-TONE/ balanced mixer.pdf 

APLAC/examples/Analysis methods/HB 2-TONE/ diode mixer spectrum.n 

APLAC/examples/Analysis methods/HB 2-TONE/ diode mixer spectrum box.n 

APLAC/examples/Analysis methods/HB 2-TONE/ rx mixer.n 

APLAC/examples/Analysis methods/HB 2-TONE/ rx mixer Zin.n 

9.9 Analysis methods/HB 2-TONE/submodels 

APLAC/examples/Analysis methods/HB 2-TONE/submodels/ diff match.i 

APLAC/examples/Analysis methods/HB 2-TONE/submodels/ diff match.n 

APLAC/examples/Analysis methods/HB 2-TONE/submodels/ diff match.sub 

APLAC/examples/Analysis methods/HB 2-TONE/submodels/ mixer.i 

APLAC/examples/Analysis methods/HB 2-TONE/submodels/ mixer.n 

APLAC/examples/Analysis methods/HB 2-TONE/submodels/ mixer.sub 

APLAC/examples/Analysis methods/HB 2-TONE/submodels/ transistor.i 


Analysis methods/Noise/submodels page APP-9.4 

APLAC/examples/Analysis methods/HB 2-TONE/submodels/ transistor.n 

APLAC/examples/Analysis methods/HB 2-TONE/submodels/ transistor.sub 


APLAC/examples/Analysis methods/HB 3-TONE/ differential mixer.n 

APLAC/examples/Analysis methods/HB 3-TONE/ mixer cell.i 

APLAC/examples/Analysis methods/HB 3-TONE/ mixer cell.n 

APLAC/examples/Analysis methods/HB 3-TONE/ mixer cell.sub 

9.11 Analysis methods/Library creation 

APLAC/examples/Analysis methods/Library creation/ backup.lib 

APLAC/examples/Analysis methods/Library creation/ librarycreation.n 

APLAC/examples/Analysis methods/Library creation/ librarycreation.pdf 

APLAC/examples/Analysis methods/Library creation/ opatest.n 

9.12 Analysis methods/Noise 

APLAC/examples/Analysis methods/Noise/ MMIC amp NF stability.n 

APLAC/examples/Analysis methods/Noise/ MMIC amp NF stability.pdf 

APLAC/examples/Analysis methods/Noise/ amp NF.n 

APLAC/examples/Analysis methods/Noise/ amp noise circles.n 

APLAC/examples/Analysis methods/Noise/ amp nonlin noise density.n 

APLAC/examples/Analysis methods/Noise/ m86563v5.s2p 

APLAC/examples/Analysis methods/Noise/ mixer NF.n 

APLAC/examples/Analysis methods/Noise/ osc phasenoise.n 

APLAC/examples/Analysis methods/Noise/ osc phasenoise.pdf 

APLAC/examples/Analysis methods/Noise/ osc transient phasenoise.n 

APLAC/examples/Analysis methods/Noise/ osc transient phasenoise.pdf 

APLAC/examples/Analysis methods/Noise/ transistor.lib 

9.12.1 Analysis methods/Noise/leesonsub 

APLAC/examples/Analysis methods/Noise/leesonsub/ amplifier.i 

APLAC/examples/Analysis methods/Noise/leesonsub/ amplifier.n 

APLAC/examples/Analysis methods/Noise/leesonsub/ amplifier.sub 

APLAC/examples/Analysis methods/Noise/leesonsub/ reso.i 

APLAC/examples/Analysis methods/Noise/leesonsub/ reso.n 

APLAC/examples/Analysis methods/Noise/leesonsub/ reso.sub 


Analysis methods/Optimization/filtoptind page APP-9.5 

9.12.2 Analysis methods/Noise/submodels 

APLAC/examples/Analysis methods/Noise/submodels/ diff match.i 

APLAC/examples/Analysis methods/Noise/submodels/ diff match.n 

APLAC/examples/Analysis methods/Noise/submodels/ diff match.sub 

APLAC/examples/Analysis methods/Noise/submodels/ mixer.i 

APLAC/examples/Analysis methods/Noise/submodels/ mixer.n 

APLAC/examples/Analysis methods/Noise/submodels/ mixer.sub 

9.13 Analysis methods/Optimization 

APLAC/examples/Analysis methods/Optimization/ amp1 ac tran.n 

APLAC/examples/Analysis methods/Optimization/ amp1 ac tran.pdf 

APLAC/examples/Analysis methods/Optimization/ amp1 gain.n 

APLAC/examples/Analysis methods/Optimization/ amp1 gain.pdf 

APLAC/examples/Analysis methods/Optimization/ amp1 gain E-series.n 

APLAC/examples/Analysis methods/Optimization/ amp1 gain E-series.pdf 

APLAC/examples/Analysis methods/Optimization/ amp1 tuning.n 

APLAC/examples/Analysis methods/Optimization/ amp1 tuning.pdf 

APLAC/examples/Analysis methods/Optimization/ amp flat response.n 

APLAC/examples/Analysis methods/Optimization/ amp flat response.pdf 

APLAC/examples/Analysis methods/Optimization/ bpamp.s2p 

APLAC/examples/Analysis methods/Optimization/ correlationopt1.n 

APLAC/examples/Analysis methods/Optimization/ correlationopt1.pdf 

APLAC/examples/Analysis methods/Optimization/ correlationopt2.n 

APLAC/examples/Analysis methods/Optimization/ correlationopt2.pdf 

APLAC/examples/Analysis methods/Optimization/ file.s2p 

APLAC/examples/Analysis methods/Optimization/ filter1 ac and yield opt.n 

APLAC/examples/Analysis methods/Optimization/ filter1 ac and yield opt.pdf 

APLAC/examples/Analysis methods/Optimization/ filter1 multigoaldata.n 

APLAC/examples/Analysis methods/Optimization/ filter2 fit response.n 

APLAC/examples/Analysis methods/Optimization/ fit circuit to measured.n 

APLAC/examples/Analysis methods/Optimization/ fit polynomial.n 

APLAC/examples/Analysis methods/Optimization/ model opt.n 

APLAC/examples/Analysis methods/Optimization/ mstrip hairpin bpfilter.n 

APLAC/examples/Analysis methods/Optimization/ mstrip hairpin bpfilter.pdf 

APLAC/examples/Analysis methods/Optimization/ mstrip powdiv.n 

APLAC/examples/Analysis methods/Optimization/ mstrip powdiv.pdf 

APLAC/examples/Analysis methods/Optimization/ mstrip stubfilter.n 

APLAC/examples/Analysis methods/Optimization/ mstrip stubfilter.pdf 

APLAC/examples/Analysis methods/Optimization/ signal.txt 

APLAC/examples/Analysis methods/Optimization/ sparam files opt.n 

APLAC/examples/Analysis methods/Optimization/ sparam files opt.pdf 

APLAC/examples/Analysis methods/Optimization/ system circuit opt.n 

APLAC/examples/Analysis methods/Optimization/ system circuit opt.pdf 


Analysis methods/Sensitivity page APP-9.6 

9.13.1 Analysis methods/Optimization/filtoptcap 

APLAC/examples/Analysis methods/Optimization/filtoptcap/ caplist.txt 

APLAC/examples/Analysis methods/Optimization/filtoptcap/ captest1.s2p 





APLAC/examples/Analysis methods/Optimization/filtoptcap/ captest5.s2p 





9.13.2 Analysis methods/Optimization/filtoptind 

APLAC/examples/Analysis methods/Optimization/filtoptind/ indlist.txt 

APLAC/examples/Analysis methods/Optimization/filtoptind/ indtest1.s2p 





APLAC/examples/Analysis methods/Optimization/filtoptind/ indtest5.s2p 





9.14 Analysis methods/S-parameters 

APLAC/examples/Analysis methods/S-parameters/ MMIC amp NF stability.n 

APLAC/examples/Analysis methods/S-parameters/ MMIC amp NF stability.pdf 

APLAC/examples/Analysis methods/S-parameters/ amp.s2p 

APLAC/examples/Analysis methods/S-parameters/ amp spar load.n 

APLAC/examples/Analysis methods/S-parameters/ amp spar store.n 

APLAC/examples/Analysis methods/S-parameters/ bandpass amp opt.n 

APLAC/examples/Analysis methods/S-parameters/ bpamp.s2p 

APLAC/examples/Analysis methods/S-parameters/ branchline hybrid.n 

APLAC/examples/Analysis methods/S-parameters/ branchline hybrid.pdf 

APLAC/examples/Analysis methods/S-parameters/ branchline mc.n 

APLAC/examples/Analysis methods/S-parameters/ branchline mc.pdf 

APLAC/examples/Analysis methods/S-parameters/ m86563v5.s2p 

APLAC/examples/Analysis methods/S-parameters/ mstrip hairpin bpfilter.n 

APLAC/examples/Analysis methods/S-parameters/ mstrip hairpin bpfilter.pdf 

APLAC/examples/Analysis methods/S-parameters/ mstrip powdiv.n 

APLAC/examples/Analysis methods/S-parameters/ mstrip powdiv.pdf 

APLAC/examples/Analysis methods/S-parameters/ mstrip stubfilter.n 

APLAC/examples/Analysis methods/S-parameters/ mstrip stubfilter.pdf 


Analysis methods/Submodels page APP-9.7 

APLAC/examples/Analysis methods/S-parameters/ spar load.n 

APLAC/examples/Analysis methods/S-parameters/ spar load.pdf 

APLAC/examples/Analysis methods/S-parameters/ spar store.n 

APLAC/examples/Analysis methods/S-parameters/ spar store.pdf 

APLAC/examples/Analysis methods/S-parameters/ tres.s2p 

9.15 Analysis methods/Sensitivity 

APLAC/examples/Analysis methods/Sensitivity/ LCfilter synthesis 1200MHz.n 



9.16 Analysis methods/Stability 

APLAC/examples/Analysis methods/Stability/ MMIC amp NF stability.n 

APLAC/examples/Analysis methods/Stability/ MMIC amp NF stability.pdf 

APLAC/examples/Analysis methods/Stability/ amp2 NDF stability.n 

APLAC/examples/Analysis methods/Stability/ amp2 stability basic.n 

APLAC/examples/Analysis methods/Stability/ amp2 stability envelope.n 

APLAC/examples/Analysis methods/Stability/ amp3 stability circles and factor.n 

APLAC/examples/Analysis methods/Stability/ m86563v5.s2p 

9.17 Analysis methods/Statistical MC 

APLAC/examples/Analysis methods/Statistical MC/ MC model build histogram.n 

APLAC/examples/Analysis methods/Statistical MC/ amp1 MC.n 

APLAC/examples/Analysis methods/Statistical MC/ branchline MC.n 

APLAC/examples/Analysis methods/Statistical MC/ branchline MC.pdf 

APLAC/examples/Analysis methods/Statistical MC/ filter1 MC.n 

APLAC/examples/Analysis methods/Statistical MC/ filter1 yield optimize.n 

APLAC/examples/Analysis methods/Statistical MC/ filter2 yield optimize.n 

APLAC/examples/Analysis methods/Statistical MC/ lotdev histogram.n 

APLAC/examples/Analysis methods/Statistical MC/ oscillator MC.n 

APLAC/examples/Analysis methods/Statistical MC/ powdivider YFA.n 

APLAC/examples/Analysis methods/Statistical MC/ pwl distribution histogram.n 

APLAC/examples/Analysis methods/Statistical MC/ voltdivider yield optimize.n 

APLAC/examples/Analysis methods/Statistical MC/ yield optimize illustration.n 

APLAC/examples/Analysis methods/Statistical MC/ yieldsens.i 


Devices/Amplifiers page APP-9.8 

9.17.1 Analysis methods/Statistical MC/libraries 

APLAC/examples/Analysis methods/Statistical MC/libraries/ transistor.lib 

9.18 Analysis methods/Submodels 

APLAC/examples/Analysis methods/Submodels/ GSM test systemsim.n 

APLAC/examples/Analysis methods/Submodels/ top.n 

APLAC/examples/Analysis methods/Submodels/ top.pdf 

9.18.1 Analysis methods/Submodels/submodels 

APLAC/examples/Analysis methods/Submodels/submodels/ amp123.i 

APLAC/examples/Analysis methods/Submodels/submodels/ amp123.n 

APLAC/examples/Analysis methods/Submodels/submodels/ amp123.sub 

APLAC/examples/Analysis methods/Submodels/submodels/ gsm input.i 

APLAC/examples/Analysis methods/Submodels/submodels/ gsm input.n 

APLAC/examples/Analysis methods/Submodels/submodels/ gsm input.sub 

9.19 Analysis methods/TRAN 

APLAC/examples/Analysis methods/TRAN/ HB TRAN SSTD.N 

APLAC/examples/Analysis methods/TRAN/ PCB.n 

APLAC/examples/Analysis methods/TRAN/ PLL.n 

APLAC/examples/Analysis methods/TRAN/ analysis basic.n 

APLAC/examples/Analysis methods/TRAN/ analysis basic.pdf 

APLAC/examples/Analysis methods/TRAN/ analysis basic 2.n 

APLAC/examples/Analysis methods/TRAN/ chuas circuit.n 

APLAC/examples/Analysis methods/TRAN/ colpitts oscillator waveform.n 

APLAC/examples/Analysis methods/TRAN/ coupler waveform.n 

APLAC/examples/Analysis methods/TRAN/ fourier.n 

APLAC/examples/Analysis methods/TRAN/ rectifier large cap waveform.n 

APLAC/examples/Analysis methods/TRAN/ rectifier waveform.n 

APLAC/examples/Analysis methods/TRAN/ transient components.n 

APLAC/examples/Analysis methods/TRAN/ transient components.pdf 

APLAC/examples/Analysis methods/TRAN/ transmission line.n 

9.19.1 Analysis methods/TRAN/submodels 

APLAC/examples/Analysis methods/TRAN/submodels/ transistor.i 

APLAC/examples/Analysis methods/TRAN/submodels/ transistor.n 


Devices/FET characterization page APP-9.9 

APLAC/examples/Analysis methods/TRAN/submodels/ transistor.sub 

9.20 Devices/Amplifiers 

APLAC/examples/Devices/Amplifiers/ MMIC amp NF stability.n 

APLAC/examples/Devices/Amplifiers/ MMIC amp NF stability.pdf 

APLAC/examples/Devices/Amplifiers/ PA class B.n 

APLAC/examples/Devices/Amplifiers/ PA class C.n 

APLAC/examples/Devices/Amplifiers/ PA class E.n 

APLAC/examples/Devices/Amplifiers/ RFIC Miller OTA.n 

APLAC/examples/Devices/Amplifiers/ amp1 gain.n 

APLAC/examples/Devices/Amplifiers/ amp1 gain.pdf 

APLAC/examples/Devices/Amplifiers/ amp1 large signal freq sweep.n 

APLAC/examples/Devices/Amplifiers/ amp1 large signal freq sweep.pdf 

APLAC/examples/Devices/Amplifiers/ amp1 spectrum waveform distortion.n 

APLAC/examples/Devices/Amplifiers/ amp2 stability basic.n 

APLAC/examples/Devices/Amplifiers/ amp3 power sweep.n 

APLAC/examples/Devices/Amplifiers/ amp4 OIP3.n 

APLAC/examples/Devices/Amplifiers/ m86563v5.s2p 

9.20.1 Devices/Amplifiers/RFIC libraries 

APLAC/examples/Devices/Amplifiers/RFIC libraries/ cap.lib 

APLAC/examples/Devices/Amplifiers/RFIC libraries/ mos.lib 

APLAC/examples/Devices/Amplifiers/RFIC libraries/ res.lib 

9.20.2 Devices/Amplifiers/submodels 

APLAC/examples/Devices/Amplifiers/submodels/ transistor.i 

APLAC/examples/Devices/Amplifiers/submodels/ transistor.n 

APLAC/examples/Devices/Amplifiers/submodels/ transistor.sub 

9.21 Devices/BJT characterization 

APLAC/examples/Devices/BJT characterization/ BJT Gummel beta.n 

APLAC/examples/Devices/BJT characterization/ BJT SYZH.n 

APLAC/examples/Devices/BJT characterization/ BJT fT.n 

APLAC/examples/Devices/BJT characterization/ BJT temperature.n 


Devices/Filters/filtoptcap page APP-9.10 

9.21.1 Devices/BJT characterization/libraries 

APLAC/examples/Devices/BJT characterization/libraries/ rf npn bjt.lib 

9.22 Devices/FET characterization 

APLAC/examples/Devices/FET characterization/ mesfet dc curves.n 

APLAC/examples/Devices/FET characterization/ mosfet dc curves.n 

APLAC/examples/Devices/FET characterization/ n fet ft.n 

APLAC/examples/Devices/FET characterization/ p fet ft.n 

9.22.1 Devices/FET characterization/libraries 

APLAC/examples/Devices/FET characterization/libraries/ fet.lib 

APLAC/examples/Devices/FET characterization/libraries/ mosfet.lib 

9.23 Devices/Filters 

APLAC/examples/Devices/Filters/ LCfilter synthesis.n 

APLAC/examples/Devices/Filters/ LCfilter synthesis 1200MHz.n 



APLAC/examples/Devices/Filters/ file.s2p 

APLAC/examples/Devices/Filters/ filter1 MC.n 

APLAC/examples/Devices/Filters/ filter1 ac and yield opt.n 

APLAC/examples/Devices/Filters/ filter1 ac and yield opt.pdf 

APLAC/examples/Devices/Filters/ filter1 active.n 

APLAC/examples/Devices/Filters/ filter1 multigoaldata.n 

APLAC/examples/Devices/Filters/ filter1 yield optimize.n 

APLAC/examples/Devices/Filters/ filter2 fit response.n 

APLAC/examples/Devices/Filters/ filter3 yield optimize.n 

APLAC/examples/Devices/Filters/ filter4 gdelay sensitivity.n 

APLAC/examples/Devices/Filters/ filter4 opt Eseries.n 

APLAC/examples/Devices/Filters/ filter4 tuning.n 

APLAC/examples/Devices/Filters/ filter5 response.n 

APLAC/examples/Devices/Filters/ filter5 variable.n 

APLAC/examples/Devices/Filters/ filter6 sparam files.n 

APLAC/examples/Devices/Filters/ filter6 sparam files.pdf 

APLAC/examples/Devices/Filters/ filter ac and yield opt.pdf 

APLAC/examples/Devices/Filters/ mstrip hairpin bpfilter.n 

APLAC/examples/Devices/Filters/ mstrip hairpin bpfilter.pdf 

APLAC/examples/Devices/Filters/ mstrip stubfilter.n 

APLAC/examples/Devices/Filters/ mstrip stubfilter.pdf 


Devices/MEMS/beamfiltersub page APP-9.11 

9.23.1 Devices/Filters/filtoptcap 

APLAC/examples/Devices/Filters/filtoptcap/ caplist.txt 

APLAC/examples/Devices/Filters/filtoptcap/ captest1.s2p 





APLAC/examples/Devices/Filters/filtoptcap/ captest5.s2p 





9.23.2 Devices/Filters/filtoptind 

APLAC/examples/Devices/Filters/filtoptind/ indlist.txt 

APLAC/examples/Devices/Filters/filtoptind/ indtest1.s2p 





APLAC/examples/Devices/Filters/filtoptind/ indtest5.s2p 





9.24 Devices/MEMS 

APLAC/examples/Devices/MEMS/ ex-01-dc1.n 

APLAC/examples/Devices/MEMS/ ex-01-dc1.pdf 





APLAC/examples/Devices/MEMS/ ex-04-ac1.n 

APLAC/examples/Devices/MEMS/ ex-04-ac1.pdf 

APLAC/examples/Devices/MEMS/ ex-05-ac2.n 

APLAC/examples/Devices/MEMS/ ex-05-ac2.pdf 

APLAC/examples/Devices/MEMS/ ex-06-tran1.n 

APLAC/examples/Devices/MEMS/ ex-06-tran1.pdf 








Devices/MEMS/beamfiltersub page APP-9.12 

APLAC/examples/Devices/MEMS/ ex-10-hb1.n 

APLAC/examples/Devices/MEMS/ ex-10-hb1.pdf 





APLAC/examples/Devices/MEMS/ ex-13-noise1.n 

APLAC/examples/Devices/MEMS/ ex-13-noise1.pdf 

APLAC/examples/Devices/MEMS/ ex-contact-electrical.n 

APLAC/examples/Devices/MEMS/ ex-contact-electrical.pdf 

APLAC/examples/Devices/MEMS/ ex-contact-limiter-tilt.n 

APLAC/examples/Devices/MEMS/ ex-contact-limiter-tilt.pdf 

APLAC/examples/Devices/MEMS/ ex-contact-limiter.n 

APLAC/examples/Devices/MEMS/ ex-contact-limiter.pdf 

APLAC/examples/Devices/MEMS/ ex-damper-accel.n 

APLAC/examples/Devices/MEMS/ ex-damper-accel.pdf 

APLAC/examples/Devices/MEMS/ ex-damper-parallel.n 

APLAC/examples/Devices/MEMS/ ex-damper-parallel.pdf 

APLAC/examples/Devices/MEMS/ ex-damper-perforated.n 

APLAC/examples/Devices/MEMS/ ex-damper-perforated.pdf 

APLAC/examples/Devices/MEMS/ ex-damper-sf-ac.n 

APLAC/examples/Devices/MEMS/ ex-damper-sf-ac.pdf 

APLAC/examples/Devices/MEMS/ ex-damper-sf-tran.n 

APLAC/examples/Devices/MEMS/ ex-damper-sf-tran.pdf 

APLAC/examples/Devices/MEMS/ ex-damper-tuncap.n 

APLAC/examples/Devices/MEMS/ ex-damper-tuncap.pdf 

APLAC/examples/Devices/MEMS/ ex-reso-cf-beam-ac.n 

APLAC/examples/Devices/MEMS/ ex-reso-cf-beam-ac.pdf 

APLAC/examples/Devices/MEMS/ ex-reso-cf-beam-tran.n 

APLAC/examples/Devices/MEMS/ ex-reso-cf-beam-tran.pdf 

APLAC/examples/Devices/MEMS/ ex-reso-coupled.n 

APLAC/examples/Devices/MEMS/ ex-reso-coupled.pdf 

APLAC/examples/Devices/MEMS/ ex-reso-k3.n 

APLAC/examples/Devices/MEMS/ ex-reso-k3.pdf 

APLAC/examples/Devices/MEMS/ ex-reso-linear.n 

APLAC/examples/Devices/MEMS/ ex-reso-linear.pdf 

APLAC/examples/Devices/MEMS/ ex-reso-tilt.n 

APLAC/examples/Devices/MEMS/ ex-reso-tilt.pdf 

APLAC/examples/Devices/MEMS/ ex-sf-damper-ac.n 

APLAC/examples/Devices/MEMS/ ex-sf-damper-ac.pdf 

APLAC/examples/Devices/MEMS/ ex-sf-damper-tran.n 

APLAC/examples/Devices/MEMS/ ex-sf-damper-tran.pdf 

APLAC/examples/Devices/MEMS/ ex-transducer-dc.n 

APLAC/examples/Devices/MEMS/ ex-transducer-dc.pdf 

APLAC/examples/Devices/MEMS/ ex-transducer-general.n 

APLAC/examples/Devices/MEMS/ ex-transducer-general.pdf 

APLAC/examples/Devices/MEMS/ ex-transducer-hb.n 

APLAC/examples/Devices/MEMS/ ex-transducer-hb.pdf 

APLAC/examples/Devices/MEMS/ ex-transducer-parallel.n 

APLAC/examples/Devices/MEMS/ ex-transducer-parallel.pdf 

APLAC/examples/Devices/MEMS/ ex-transducer-tilt-ac.n 

APLAC/examples/Devices/MEMS/ ex-transducer-tilt-ac.pdf 

APLAC/examples/Devices/MEMS/ ex-transducer-tilt-tran.n 

APLAC/examples/Devices/MEMS/ ex-transducer-tilt-tran.pdf 

APLAC/examples/Devices/MEMS/ exbeamfilterac.n 


Devices/MEMS/combdrive page APP-9.13 

APLAC/examples/Devices/MEMS/ exbeamfilterac.pdf 

APLAC/examples/Devices/MEMS/ exbeamfiltercv.n 

APLAC/examples/Devices/MEMS/ exbeamfiltercv.pdf 

APLAC/examples/Devices/MEMS/ exbeamfilterhb.n 

APLAC/examples/Devices/MEMS/ exbeamfilterhb.pdf 

APLAC/examples/Devices/MEMS/ exbeamfilterhbmeas.n 

APLAC/examples/Devices/MEMS/ exbeamfilterhbmeas.pdf 

APLAC/examples/Devices/MEMS/ excapacitiveswitchcv.n 

APLAC/examples/Devices/MEMS/ excapacitiveswitchcv.pdf 

APLAC/examples/Devices/MEMS/ excapacitiveswitchspar.n 

APLAC/examples/Devices/MEMS/ excapacitiveswitchspar.pdf 

APLAC/examples/Devices/MEMS/ excapacitiveswitchtran.n 

APLAC/examples/Devices/MEMS/ excapacitiveswitchtran.pdf 

APLAC/examples/Devices/MEMS/ exlinearaccel.n 

APLAC/examples/Devices/MEMS/ exlinearaccelac.n 

APLAC/examples/Devices/MEMS/ exlinearaccelac.pdf 

APLAC/examples/Devices/MEMS/ exlinearaccelacg.n 

APLAC/examples/Devices/MEMS/ exlinearaccelacg.pdf 

APLAC/examples/Devices/MEMS/ exlinearaccelbias.n 

APLAC/examples/Devices/MEMS/ exlinearaccelbias.pdf 

APLAC/examples/Devices/MEMS/ exlinearaccelcvdc.n 

APLAC/examples/Devices/MEMS/ exlinearaccelcvdc.pdf 

APLAC/examples/Devices/MEMS/ exlinearaccelcvtran.n 

APLAC/examples/Devices/MEMS/ exlinearaccelcvtran.pdf 

APLAC/examples/Devices/MEMS/ exlinearacceltranpulse.n 

APLAC/examples/Devices/MEMS/ exlinearacceltranpulse.pdf 

APLAC/examples/Devices/MEMS/ exnormalcontact.n 

APLAC/examples/Devices/MEMS/ exnormalgasdamper.n 

APLAC/examples/Devices/MEMS/ exnormalgasdamper.pdf 

APLAC/examples/Devices/MEMS/ exnormallimiter.n 

APLAC/examples/Devices/MEMS/ exnormaltransducer.n 

APLAC/examples/Devices/MEMS/ exnormaltransducer.pdf 

APLAC/examples/Devices/MEMS/ exnormaltransducer2.n 

APLAC/examples/Devices/MEMS/ exnormaltransducer2.pdf 

APLAC/examples/Devices/MEMS/ exparallelgasdamper.n 

APLAC/examples/Devices/MEMS/ exparallelgasdamper.pdf 

APLAC/examples/Devices/MEMS/ extiltingcontact.n 

APLAC/examples/Devices/MEMS/ extiltinggasdamper.n 

APLAC/examples/Devices/MEMS/ extiltinggasdamper2.n 

APLAC/examples/Devices/MEMS/ mittaus5.txt 

9.24.1 Devices/MEMS/beamfiltersub 

APLAC/examples/Devices/MEMS/beamfiltersub/ beamfilter0sub.i 

APLAC/examples/Devices/MEMS/beamfiltersub/ beamfilter0sub.n 

APLAC/examples/Devices/MEMS/beamfiltersub/ beamfilter0sub.sub 

APLAC/examples/Devices/MEMS/beamfiltersub/ beamfilter1sub.i 

APLAC/examples/Devices/MEMS/beamfiltersub/ beamfilter1sub.n 

APLAC/examples/Devices/MEMS/beamfiltersub/ beamfilter1sub.sub 

APLAC/examples/Devices/MEMS/beamfiltersub/ beamfiltersub.i 

APLAC/examples/Devices/MEMS/beamfiltersub/ beamfiltersub.n 

APLAC/examples/Devices/MEMS/beamfiltersub/ beamfiltersub.sub 


Devices/Mixers page APP-9.14 

9.24.2 Devices/MEMS/combdrive 

APLAC/examples/Devices/MEMS/combdrive/ combdrive.i 

APLAC/examples/Devices/MEMS/combdrive/ combdrive.n 

APLAC/examples/Devices/MEMS/combdrive/ combdrive.sub 

APLAC/examples/Devices/MEMS/combdrive/ combdrivee.i 

APLAC/examples/Devices/MEMS/combdrive/ combdrivee.n 

APLAC/examples/Devices/MEMS/combdrive/ combdrivee.sub 

9.24.3 Devices/MEMS/ex00reso 

APLAC/examples/Devices/MEMS/ex00reso/ ex-00-reso.i 

APLAC/examples/Devices/MEMS/ex00reso/ ex-00-reso.n 

APLAC/examples/Devices/MEMS/ex00reso/ ex-00-reso.sub 

9.24.4 Devices/MEMS/mechanicalfiltersub 

APLAC/examples/Devices/MEMS/mechanicalfiltersub/ mechanicalfiltersub.i 

APLAC/examples/Devices/MEMS/mechanicalfiltersub/ mechanicalfiltersub.n 

APLAC/examples/Devices/MEMS/mechanicalfiltersub/ mechanicalfiltersub.sub 

9.24.5 Devices/MEMS/reso4sub 

APLAC/examples/Devices/MEMS/reso4sub/ reso4.i 

APLAC/examples/Devices/MEMS/reso4sub/ reso4.n 

APLAC/examples/Devices/MEMS/reso4sub/ reso4.sub 







9.24.6 Devices/MEMS/tiltinggasdampersub 

APLAC/examples/Devices/MEMS/tiltinggasdampersub/ extiltinggasdampersub.i 

APLAC/examples/Devices/MEMS/tiltinggasdampersub/ extiltinggasdampersub.n 

APLAC/examples/Devices/MEMS/tiltinggasdampersub/ extiltinggasdampersub.sub 


Devices/Multipliers/submodels page APP-9.15 

9.25 Devices/Matching 

APLAC/examples/Devices/Matching/ LC matching.n 

APLAC/examples/Devices/Matching/ antennamatching.n 

9.26 Devices/Mixers 

APLAC/examples/Devices/Mixers/ RFIC Rx1 mixer.n 

APLAC/examples/Devices/Mixers/ RFIC Rx1 mixer Zin.n 

APLAC/examples/Devices/Mixers/ RFIC Rx2 mixer.n 

APLAC/examples/Devices/Mixers/ RFIC Tx mixer transient.n 

APLAC/examples/Devices/Mixers/ balanced mixer.n 

APLAC/examples/Devices/Mixers/ balanced mixer.pdf 

APLAC/examples/Devices/Mixers/ diode mixer spectrum.n 

APLAC/examples/Devices/Mixers/ ratrace mixer 40GHz.n 

9.26.1 Devices/Mixers/RFIC libraries 

APLAC/examples/Devices/Mixers/RFIC libraries/ cap.lib 

APLAC/examples/Devices/Mixers/RFIC libraries/ mos.lib 

APLAC/examples/Devices/Mixers/RFIC libraries/ poly phase filter.i 

APLAC/examples/Devices/Mixers/RFIC libraries/ poly phase filter.n 

APLAC/examples/Devices/Mixers/RFIC libraries/ poly phase filter.sub 

APLAC/examples/Devices/Mixers/RFIC libraries/ res.lib 

9.26.2 Devices/Mixers/submodels 

APLAC/examples/Devices/Mixers/submodels/ common submodel.i 

APLAC/examples/Devices/Mixers/submodels/ common submodel.n 

APLAC/examples/Devices/Mixers/submodels/ common submodel.sub 

APLAC/examples/Devices/Mixers/submodels/ diff match.i 

APLAC/examples/Devices/Mixers/submodels/ diff match.n 

APLAC/examples/Devices/Mixers/submodels/ diff match.sub 

APLAC/examples/Devices/Mixers/submodels/ mixer.i 

APLAC/examples/Devices/Mixers/submodels/ mixer.n 

APLAC/examples/Devices/Mixers/submodels/ mixer.sub 

9.27 Devices/Multipliers 

APLAC/examples/Devices/Multipliers/ doubler1 spectrum waveform.n 

APLAC/examples/Devices/Multipliers/ doubler2 spectrum waveform.n 


Measurements/amps page APP-9.16 

9.27.1 Devices/Multipliers/submodels 

APLAC/examples/Devices/Multipliers/submodels/ reso.i 

APLAC/examples/Devices/Multipliers/submodels/ reso.n 

APLAC/examples/Devices/Multipliers/submodels/ reso.sub 

9.28 Devices/Oscillators 

APLAC/examples/Devices/Oscillators/ Colpitts.n 

APLAC/examples/Devices/Oscillators/ RFIC VCO.n 

9.28.1 Devices/Oscillators/VCO libraries 

APLAC/examples/Devices/Oscillators/VCO libraries/ cap.lib 

APLAC/examples/Devices/Oscillators/VCO libraries/ mos.lib 

APLAC/examples/Devices/Oscillators/VCO libraries/ poly phase filter.i 

APLAC/examples/Devices/Oscillators/VCO libraries/ poly phase filter.n 

APLAC/examples/Devices/Oscillators/VCO libraries/ poly phase filter.sub 

APLAC/examples/Devices/Oscillators/VCO libraries/ res.lib 

Devices/Oscillators/VCO libraries/VCO libraries 

APLAC/examples/Devices/Oscillators/VCO libraries/VCO libraries/ cap.lib 

APLAC/examples/Devices/Oscillators/VCO libraries/VCO libraries/ mos.lib 

APLAC/examples/Devices/Oscillators/VCO libraries/VCO libraries/ res.lib 

9.29 Devices/PLL 

APLAC/examples/Devices/PLL/ pll AC testbench.n 

APLAC/examples/Devices/PLL/ pll macromodel AC tran.n 

APLAC/examples/Devices/PLL/ pll step response testbench.n 


Measurements/bias/more page APP-9.17 

9.30 Devices/Switches 

APLAC/examples/Devices/Switches/ insertionloss.n 

APLAC/examples/Devices/Switches/ isolation.n 

APLAC/examples/Devices/Switches/ switchingtime.n 

9.31 Measurements/amps 

APLAC/examples/Measurements/amps/ amplifier.ntf 

9.31.1 Measurements/amps/more 

APLAC/examples/Measurements/amps/more/ 1tone compression.ntf 

APLAC/examples/Measurements/amps/more/ 1tone compression current mode.ntf 

APLAC/examples/Measurements/amps/more/ 1tone distortion.ntf 

APLAC/examples/Measurements/amps/more/ 1tone distortion current.ntf 

APLAC/examples/Measurements/amps/more/ 1tone noise.ntf 

APLAC/examples/Measurements/amps/more/ 1tone noise current.ntf 

APLAC/examples/Measurements/amps/more/ 1tone power.ntf 

APLAC/examples/Measurements/amps/more/ 1tone power current.ntf 

APLAC/examples/Measurements/amps/more/ 1tone waveform spectrum.ntf 

APLAC/examples/Measurements/amps/more/ 2tone compression.ntf 

APLAC/examples/Measurements/amps/more/ 2tone compression current.ntf 

APLAC/examples/Measurements/amps/more/ ac analysis.ntf 

APLAC/examples/Measurements/amps/more/ linear2port gain stability.ntf 

APLAC/examples/Measurements/amps/more/ linear2port noisecirc noisefig optnfz conjz.ntf 

APLAC/examples/Measurements/amps/more/ linear2port sparams conjz grdelay.ntf 

APLAC/examples/Measurements/amps/more/ linear bandwidth.ntf 

APLAC/examples/Measurements/amps/more/ linear psrr.ntf 

Measurements/amps/more/differential 

APLAC/examples/Measurements/amps/more/differential/ 1tone compression diff-current.ntf 

APLAC/examples/Measurements/amps/more/differential/ 1tone compression diff.ntf 

APLAC/examples/Measurements/amps/more/differential/ 1tone distortion diff.ntf 

APLAC/examples/Measurements/amps/more/differential/ 1tone distortion diff current.ntf 

APLAC/examples/Measurements/amps/more/differential/ 1tone noise diff.ntf 

APLAC/examples/Measurements/amps/more/differential/ 1tone noise diff current.ntf 

APLAC/examples/Measurements/amps/more/differential/ 1tone power diff.ntf 

APLAC/examples/Measurements/amps/more/differential/ 1tone power diff current.ntf 

APLAC/examples/Measurements/amps/more/differential/ 2tone compression diff.ntf 

APLAC/examples/Measurements/amps/more/differential/ 2tone compression diff current.ntf 


Measurements/mixers page APP-9.18 

9.32 Measurements/bias 

APLAC/examples/Measurements/bias/ bjt SYZH.ntf 

APLAC/examples/Measurements/bias/ bjt ft.ntf 

APLAC/examples/Measurements/bias/ bjt gummel beta.ntf 

APLAC/examples/Measurements/bias/ bjt temperature.ntf 

APLAC/examples/Measurements/bias/ mesfet dc curves.ntf 

APLAC/examples/Measurements/bias/ mosfet dc curves.ntf 

APLAC/examples/Measurements/bias/ n fet ft.ntf 

APLAC/examples/Measurements/bias/ p fet ft.ntf 

APLAC/examples/Measurements/bias/ transconductance.ntf 

APLAC/examples/Measurements/bias/ transient load line.ntf 

9.32.1 Measurements/bias/more 

APLAC/examples/Measurements/bias/more/ bjt dc curves.ntf 

APLAC/examples/Measurements/bias/more/ gummel plot.ntf 

APLAC/examples/Measurements/bias/more/ npn ft.ntf 

APLAC/examples/Measurements/bias/more/ pnp ft.ntf 

9.33 Measurements/dividers 

APLAC/examples/Measurements/dividers/ coupler.ntf 

APLAC/examples/Measurements/dividers/ divider.ntf 

9.34 Measurements/filters 

APLAC/examples/Measurements/filters/ filter bp.ntf 

APLAC/examples/Measurements/filters/ filter bs.ntf 

APLAC/examples/Measurements/filters/ filter distortion.ntf 

APLAC/examples/Measurements/filters/ filter hp.ntf 

APLAC/examples/Measurements/filters/ filter lp.ntf 

9.35 Measurements/generic 

APLAC/examples/Measurements/generic/ 1-port s-parameters.ntf 



APLAC/examples/Measurements/generic/ AC multi.ntf 


Measurements/mixers/more/singleended page APP-9.19 

APLAC/examples/Measurements/generic/ DC multi.ntf 

APLAC/examples/Measurements/generic/ HB multi.ntf 

APLAC/examples/Measurements/generic/ S-param multi.ntf 

APLAC/examples/Measurements/generic/ ac analysis.ntf 

APLAC/examples/Measurements/generic/ dc analysis.ntf 

APLAC/examples/Measurements/generic/ hb 1-tone.ntf 

APLAC/examples/Measurements/generic/ hb 2-tone-series.ntf 

APLAC/examples/Measurements/generic/ hb 2-tone.ntf 

APLAC/examples/Measurements/generic/ hb 3-tone-parallel.ntf 

APLAC/examples/Measurements/generic/ hb 3-tone-series.ntf 

APLAC/examples/Measurements/generic/ mixed-mode-2 port-s-parameters.ntf 

APLAC/examples/Measurements/generic/ optimize 1-port.ntf 

APLAC/examples/Measurements/generic/ optimize 2-port.ntf 

APLAC/examples/Measurements/generic/ transient.ntf 

APLAC/examples/Measurements/generic/ transient fourier.ntf 

APLAC/examples/Measurements/generic/ transient multi.ntf 

9.36 Measurements/mixers 

APLAC/examples/Measurements/mixers/ mixer.ntf 

APLAC/examples/Measurements/mixers/ mixer fastIMD3.ntf 

9.36.1 Measurements/mixers/more 

Measurements/mixers/more/differential 

9.36.2 Measurements/mixers/more/differential/down 

APLAC/examples/Measurements/mixers/more/differential/down/ diff down compression.ntf 

APLAC/examples/Measurements/mixers/more/differential/down/ diff down conversiongain.ntf 

APLAC/examples/Measurements/mixers/more/differential/down/ diff down ip3.ntf 

APLAC/examples/Measurements/mixers/more/differential/down/ diff down isolation.ntf 

APLAC/examples/Measurements/mixers/more/differential/down/ diff down noise.ntf 

APLAC/examples/Measurements/mixers/more/differential/down/ diff down spectrum.ntf 

APLAC/examples/Measurements/mixers/more/differential/down/ diff down vswr.ntf 

APLAC/examples/Measurements/mixers/more/differential/down/ diff down vswr lo.ntf 

9.36.3 Measurements/mixers/more/differential/up 

APLAC/examples/Measurements/mixers/more/differential/up/ diff up compression.ntf 

APLAC/examples/Measurements/mixers/more/differential/up/ diff up conversiongain.ntf 

APLAC/examples/Measurements/mixers/more/differential/up/ diff up ip3.ntf 

APLAC/examples/Measurements/mixers/more/differential/up/ diff up isolation.ntf 

APLAC/examples/Measurements/mixers/more/differential/up/ diff up noise.ntf 


Measurements/switches page APP-9.20 

APLAC/examples/Measurements/mixers/more/differential/up/ diff up spectrum.ntf 

APLAC/examples/Measurements/mixers/more/differential/up/ diff up vswr.ntf 

APLAC/examples/Measurements/mixers/more/differential/up/ diff up vswr lo.ntf 

Measurements/mixers/more/singleended 

9.36.4 Measurements/mixers/more/singleended/down 

APLAC/examples/Measurements/mixers/more/singleended/down/ se down compression.ntf 

APLAC/examples/Measurements/mixers/more/singleended/down/ se down conversiongain.ntf 

APLAC/examples/Measurements/mixers/more/singleended/down/ se down ip3.ntf 

APLAC/examples/Measurements/mixers/more/singleended/down/ se down isolation.ntf 

APLAC/examples/Measurements/mixers/more/singleended/down/ se down noise.ntf 

APLAC/examples/Measurements/mixers/more/singleended/down/ se down spectrum.ntf 

APLAC/examples/Measurements/mixers/more/singleended/down/ se down vswr.ntf 

APLAC/examples/Measurements/mixers/more/singleended/down/ se down vswr lo.ntf 

9.36.5 Measurements/mixers/more/singleended/up 

APLAC/examples/Measurements/mixers/more/singleended/up/ se up compression.ntf 

APLAC/examples/Measurements/mixers/more/singleended/up/ se up conversiongain.ntf 

APLAC/examples/Measurements/mixers/more/singleended/up/ se up ip3.ntf 

APLAC/examples/Measurements/mixers/more/singleended/up/ se up isolation.ntf 

APLAC/examples/Measurements/mixers/more/singleended/up/ se up noise.ntf 

APLAC/examples/Measurements/mixers/more/singleended/up/ se up spectrum.ntf 

APLAC/examples/Measurements/mixers/more/singleended/up/ se up vswr.ntf 

APLAC/examples/Measurements/mixers/more/singleended/up/ se up vswr lo.ntf 

9.37 Measurements/models 

APLAC/examples/Measurements/models/ pindioderc.ntf 

9.38 Measurements/oscillators 

APLAC/examples/Measurements/oscillators/ oscillator.ntf 

APLAC/examples/Measurements/oscillators/ oscillator vsense.ntf 


System/AM page APP-9.21 

9.38.1 Measurements/oscillators/more 

APLAC/examples/Measurements/oscillators/more/ frequency hb.ntf 

APLAC/examples/Measurements/oscillators/more/ frequency tran.ntf 

APLAC/examples/Measurements/oscillators/more/ oscillator open loop.ntf 

APLAC/examples/Measurements/oscillators/more/ phasenoise hb.ntf 

APLAC/examples/Measurements/oscillators/more/ powerefficiency hb.ntf 

APLAC/examples/Measurements/oscillators/more/ pulling hb.ntf 

APLAC/examples/Measurements/oscillators/more/ pulling tran.ntf 

APLAC/examples/Measurements/oscillators/more/ pushing hb.ntf 

APLAC/examples/Measurements/oscillators/more/ pushing tran.ntf 

APLAC/examples/Measurements/oscillators/more/ vco fo vs itune.ntf 

APLAC/examples/Measurements/oscillators/more/ vco fo vs vtune.ntf 

APLAC/examples/Measurements/oscillators/more/ vco hb itune.ntf 

APLAC/examples/Measurements/oscillators/more/ vco hb vtune.ntf 

APLAC/examples/Measurements/oscillators/more/ vco phase noise.ntf 

APLAC/examples/Measurements/oscillators/more/ vco phase noise itune.ntf 

9.39 Measurements/switches 

APLAC/examples/Measurements/switches/ insertionloss.ntf 

APLAC/examples/Measurements/switches/ isolation.ntf 

APLAC/examples/Measurements/switches/ switchingtime.ntf 

9.40 System/16-QAM 

APLAC/examples/System/16-QAM/ 16QAM1.n 

APLAC/examples/System/16-QAM/ 16QAM1.pdf 

APLAC/examples/System/16-QAM/ 16QAM2.n 

APLAC/examples/System/16-QAM/ 16QAM2.pdf 

9.41 System/32-TCM 

APLAC/examples/System/32-TCM/ 32TCM.N 

9.42 System/64-QAM 

APLAC/examples/System/64-QAM/ 64QAM.n 


System/COSIMULATION page APP-9.22 

9.43 System/AGC 

APLAC/examples/System/AGC/ AGC.n 

APLAC/examples/System/AGC/ gsm input.i 

APLAC/examples/System/AGC/ gsm input.n 

APLAC/examples/System/AGC/ gsm input.sub 

9.44 System/AM 

APLAC/examples/System/AM/ FM AM.n 

APLAC/examples/System/AM/ FM AM.pdf 

9.45 System/BER 

APLAC/examples/System/BER/ BER.n 

APLAC/examples/System/BER/ BER SNR.n 

APLAC/examples/System/BER/ BER SNR.pdf 

APLAC/examples/System/BER/ QAM BER.N 

9.46 System/BLUETOOTH 

APLAC/examples/System/BLUETOOTH/ blt.lib 

APLAC/examples/System/BLUETOOTH/ ex3 1.n 




APLAC/examples/System/BLUETOOTH/ ex3 5.n 

9.47 System/CONSTELLATION 

APLAC/examples/System/CONSTELLATION/ 16QAM1.n 

APLAC/examples/System/CONSTELLATION/ 16QAM1.pdf 

APLAC/examples/System/CONSTELLATION/ 16QAM2.n 

APLAC/examples/System/CONSTELLATION/ 16QAM2.pdf 

APLAC/examples/System/CONSTELLATION/ DQPSK.n 

APLAC/examples/System/CONSTELLATION/ DQPSK.pdf 

APLAC/examples/System/CONSTELLATION/ EDGE.n 

APLAC/examples/System/CONSTELLATION/ EDGE.pdf 


System/FORMULA BASED page APP-9.23 

APLAC/examples/System/CONSTELLATION/ constellation1.n 

APLAC/examples/System/CONSTELLATION/ constellation2.n 

APLAC/examples/System/CONSTELLATION/ edge bits.txt 

APLAC/examples/System/CONSTELLATION/ pa9103.txt 

9.48 System/COSIMULATION 

APLAC/examples/System/COSIMULATION/ PLL1.n 

APLAC/examples/System/COSIMULATION/ PLL1.pdf 

APLAC/examples/System/COSIMULATION/ PLL2.n 

APLAC/examples/System/COSIMULATION/ PLL2.pdf 

APLAC/examples/System/COSIMULATION/ system circuit opt.n 

APLAC/examples/System/COSIMULATION/ system circuit opt.pdf 

9.49 System/DIGITAL 

APLAC/examples/System/DIGITAL/ counter.n 

APLAC/examples/System/DIGITAL/ counter.pdf 

APLAC/examples/System/DIGITAL/ dacjitter.n 

APLAC/examples/System/DIGITAL/ dacjitter.pdf 

APLAC/examples/System/DIGITAL/ deltamodulator.n 

APLAC/examples/System/DIGITAL/ deltamodulator.pdf 

APLAC/examples/System/DIGITAL/ digital filter.n 

APLAC/examples/System/DIGITAL/ digital filter.pdf 

APLAC/examples/System/DIGITAL/ oscillator.n 

APLAC/examples/System/DIGITAL/ oscillator.pdf 

9.50 System/EYE 

APLAC/examples/System/EYE/ QPSK.n 

APLAC/examples/System/EYE/ QPSK.pdf 

APLAC/examples/System/EYE/ eye.n 

9.51 System/FM 

APLAC/examples/System/FM/ FM AM.n 

APLAC/examples/System/FM/ FM AM.pdf 

APLAC/examples/System/FM/ FM receiver1.n 

APLAC/examples/System/FM/ FM receiver1.pdf 


System/IQ page APP-9.24 

APLAC/examples/System/FM/ FM receiver2.n 

APLAC/examples/System/FM/ FM receiver2.pdf 

APLAC/examples/System/FM/ QPSK FM transceiver.n 

APLAC/examples/System/FM/ QPSK FM transceiver.pdf 

APLAC/examples/System/FM/ differentiator.n 

APLAC/examples/System/FM/ differentiator.pdf 

9.52 System/FORMULA BASED 

APLAC/examples/System/FORMULA BASED/ recnf.n 

APLAC/examples/System/FORMULA BASED/ recnf.pdf 

APLAC/examples/System/FORMULA BASED/ systest.n 

APLAC/examples/System/FORMULA BASED/ systest.pdf 

9.53 System/FREQRESPONSE 

APLAC/examples/System/FREQRESPONSE/ freq response bandpass.n 

APLAC/examples/System/FREQRESPONSE/ freq response baseband.n 

APLAC/examples/System/FREQRESPONSE/ impulse response.n 

APLAC/examples/System/FREQRESPONSE/ impulse response.pdf 

9.54 System/FSK 

APLAC/examples/System/FSK/ FSK.n 

9.55 System/GSM 

APLAC/examples/System/GSM/ GSMtrans1.n 

APLAC/examples/System/GSM/ GSMtrans1.pdf 

APLAC/examples/System/GSM/ GSMtrans2.n 

APLAC/examples/System/GSM/ GSMtrans2.pdf 

9.56 System/IMAGE REJECTION 

APLAC/examples/System/IMAGE REJECTION/ SSB mixer system.n 

APLAC/examples/System/IMAGE REJECTION/ image rejection mixer system.n 


System/SYNCHRONIZATION page APP-9.25 

9.57 System/IQ 

APLAC/examples/System/IQ/ IQmod1.n 

APLAC/examples/System/IQ/ IQmod1.pdf 

APLAC/examples/System/IQ/ IQmod2.n 

APLAC/examples/System/IQ/ IQmod2.pdf 

APLAC/examples/System/IQ/ bits.txt 

9.58 System/PSK 

APLAC/examples/System/PSK/ binaryDPSK.n 

APLAC/examples/System/PSK/ binaryDPSK.pdf 

9.59 System/PWM 

APLAC/examples/System/PWM/ PWM.n 

9.60 System/QPSK 

APLAC/examples/System/QPSK/ DQPSK.n 

APLAC/examples/System/QPSK/ DQPSK.pdf 

APLAC/examples/System/QPSK/ QPSK.n 

APLAC/examples/System/QPSK/ QPSK.pdf 

APLAC/examples/System/QPSK/ QPSK FM transceiver.n 

APLAC/examples/System/QPSK/ QPSK FM transceiver.pdf 

9.61 System/SNR 

APLAC/examples/System/SNR/ SNR.n 

APLAC/examples/System/SNR/ SNR.pdf 

9.62 System/SPECTRUM 

APLAC/examples/System/SPECTRUM/ spectrum.n 

APLAC/examples/System/SPECTRUM/ spectrum.pdf 


System/WLANa/WLANSubModels page APP-9.26 

9.63 System/SYNCHRONIZATION 

APLAC/examples/System/SYNCHRONIZATION/ synchronization.n 

9.64 System/VECTOR SIGNALS 

APLAC/examples/System/VECTOR SIGNALS/ busdemo1.n 

APLAC/examples/System/VECTOR SIGNALS/ busdemo1.pdf 

APLAC/examples/System/VECTOR SIGNALS/ busdemo2.n 

APLAC/examples/System/VECTOR SIGNALS/ busdemo2.pdf 

9.65 System/WAVEFORM 

APLAC/examples/System/WAVEFORM/ IQmod2.n 

APLAC/examples/System/WAVEFORM/ IQmod2.pdf 

APLAC/examples/System/WAVEFORM/ bits.txt 

APLAC/examples/System/WAVEFORM/ waveform.n 

APLAC/examples/System/WAVEFORM/ waveform complex.n 

APLAC/examples/System/WAVEFORM/ waveform real.n 

9.66 System/WLANa 

APLAC/examples/System/WLANa/ 80211A TB.n 

APLAC/examples/System/WLANa/ 80211A TB.pdf 

APLAC/examples/System/WLANa/ IdealReceiver.i 

APLAC/examples/System/WLANa/ IdealReceiver.n 

APLAC/examples/System/WLANa/ IdealReceiver.sub 

APLAC/examples/System/WLANa/ MCMsig.txt 

APLAC/examples/System/WLANa/ WLAN80211a TX 1.n 

APLAC/examples/System/WLANa/ WLAN80211a TX 1.pdf 

APLAC/examples/System/WLANa/ WLAN80211a TX 2.n 

APLAC/examples/System/WLANa/ WLAN80211a TX 2.pdf 

APLAC/examples/System/WLANa/ WLAN80211a TX RX 2.n 

APLAC/examples/System/WLANa/ WLAN80211a TX RX 2.pdf 

APLAC/examples/System/WLANa/ WLAN80211a TX RX form.n 

APLAC/examples/System/WLANa/ WLAN80211a TX RX form.pdf 

APLAC/examples/System/WLANa/ WLAN80211a generator.lib 

APLAC/examples/System/WLANa/ WLAN80211a transceiver spex channel.i 

APLAC/examples/System/WLANa/ WLAN80211a transceiver spex channel.n 

APLAC/examples/System/WLANa/ exampledata.txt 

APLAC/examples/System/WLANa/ joy bits.txt 

APLAC/examples/System/WLANa/ mcm im.txt 


System/WLANb/WLANSubModels page APP-9.27 

APLAC/examples/System/WLANa/ mcm re.txt 

9.66.1 System/WLANa/WLANSubModels 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aChannelCoding.i 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aChannelCoding.n 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aChannelCoding.sub 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aChannelCoeffs.i 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aChannelCoeffs.n 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aChannelCoeffs.sub 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aChannelCorr.i 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aChannelCorr.n 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aChannelCorr.sub 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aChannelDeCoding.i 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aChannelDeCoding.n 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aChannelDeCoding.sub 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aMACFramer.i 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aMACFramer.n 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aMACFramer.sub 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aMAC DeFramer.i 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aMAC DeFramer.n 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aMAC DeFramer.sub 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aOFDM.i 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aOFDM.n 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aOFDM.sub 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aPreambleGen.i 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aPreambleGen.n 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aPreambleGen.sub 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aSignallingDecoder.i 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aSignallingDecoder.n 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aSignallingDecoder.sub 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aSignallingSymbolGen.i 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aSignallingSymbolGen.n 

APLAC/examples/System/WLANa/WLANSubModels/ WLAN80211aSignallingSymbolGen.sub 

9.67 System/WLANb 

APLAC/examples/System/WLANb/ WLAN80211b transceiver spex.i 

APLAC/examples/System/WLANb/ WLAN80211b transceiver spex.n 

APLAC/examples/System/WLANb/ WLAN80211b transceiver spex unix.n 

APLAC/examples/System/WLANb/ testdata.txt 

9.67.1 System/WLANb/WLANSubModels 

APLAC/examples/System/WLANb/WLANSubModels/ WLAN80211bDataDecoder.i 

APLAC/examples/System/WLANb/WLANSubModels/ WLAN80211bDataDecoder.n 


System/WLANb/WLANSubModels page APP-9.28 

APLAC/examples/System/WLANb/WLANSubModels/ WLAN80211bDataDecoder.sub 

APLAC/examples/System/WLANb/WLANSubModels/ WLAN80211bDataSource.i 

APLAC/examples/System/WLANb/WLANSubModels/ WLAN80211bDataSource.n 

APLAC/examples/System/WLANb/WLANSubModels/ WLAN80211bDataSource.sub 

APLAC/examples/System/WLANb/WLANSubModels/ WLAN80211bRefReceiver.i 

APLAC/examples/System/WLANb/WLANSubModels/ WLAN80211bRefReceiver.n 

APLAC/examples/System/WLANb/WLANSubModels/ WLAN80211bRefReceiver.sub

5. APLAC Editor Glossary - Niksula

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