Performance and Evaluation of Lisp Systems - Dreamsongs

§ 2.4 LMI Lambda 43
2.4.2 Performance Issues
The Lambda derives much of its performance from its stack cache, a bank
of fast memory acting as a specialized top-of-stack cache. The contents of this
cache are managed by the microcode to contain the contents of the top of the
control stack for the current stack group. The frame of the currently executing
function is always resident in the stack cache, and references to elements of the
frame (arguments, local variables, temporary values, or frame header words) are
made by indexing off a frame pointer held in a special register. The stack level is
checked on function entry and exit and adjusted as necessary by moving words to
or from the stack image in main memory.
2.4.3 Function Calling
The Lambda uses an inverted function-calling sequence that eliminates the
need to copy pieces of stack around during normal execution. A function call starts
with a ‘CALL’ instruction, which builds a frame header, and then the arguments
are pushed. The last argument is pushed to a special destination, which causes
the function to be invoked. This can immediately push any local variables and
temporaries and begin execution. The result of the function is pushed to another
destination, which causes the frame to be popped and the value to be transmitted.
Many Common Lisp functions are implemented in microcode on the LMI
Lambda. Conventional machines implement logically primitive operations such
as ASSQ, ASSOC, MEMQ, MEMBER, property list manipulation, or BIGNUM
arithmetic in macrocode or Lisp. In the Lambda, these functions are implemented
in microcode.
The data/instruction cache in the Lambda speeds up typical Lisp execution
by about 30%. Most of the benefit comes from faster macroinstruction fetching
(the stack cache eliminates most data references to memory). The cache is a
physical-address write-through design and achieves an LMI-estimated 85% hit
rate. Using a two-level mapping scheme, virtual address translation proceeds
in parallel with cache hit detection. There are a number of improvements to
be made in the operation of the cache, including the use of block-mode NuBus
memory cycles for cache updating in regions with high locality of reference; the
benchmark figures do not reflect these enhancements.
The Lisp Machine uses CDR-coding to represent list structure efficiently. Two