z/OS MVS System Initialization Logic - Messmer The Brain House
z/OS MVS System Initialization Logic - Messmer The Brain House
z/OS MVS System Initialization Logic - Messmer The Brain House
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Hardware IPL Overview<br />
�Process is defined by the z/Architecture<br />
�Controlled by hardware<br />
Zürich | 26. Oktober 2004<br />
Hardware IPL<br />
�A single CPU is used for IPL - all other CPUs are placed into a manual (i.e. stopped) state<br />
�A hardware system reset occurs before the process begins<br />
�IPL records are written with ICKDSF<br />
� Cyl 0, Trk 0, R1, R2, IEAIPL00<br />
© 2004 IBM Corporation 10
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