Confenrence Guide - LASCAS 2013

2013 IV IEEE LATIN AMERICAN SYMPOSIUM
ON CIRCUITS AND SYSTEMS (LASCAS)
IBERCHIP XIX WORKSHOP
Conference Guide
February 27 - March 1, 2013
Cusco, Peru

2013 IV IEEE LATIN AMERICAN SYMPOSIUM
ON CIRCUITS AND SYSTEMS (LASCAS)
IBERCHIP XIX WORKSHOP
Conference Guide
February 27 - March 1, 2013
Cusco, Peru

February 27 February 28 March 1
A B C D A B C D A B C D
Session 13 Session 14 Session 15 Session 16 Session 21 Session 22 Session 23 Session 24
8:30 - 8:50
791 354 307 302 738 270 396 280
OPENING CEREMONY
8:50 - 9:10 734 699 652 312 753 471 766 295
9:10- 9:30 355 744 785 779 746 742 315
9:30
10:30
KEYNOTE SPEECH
(Michelli)
INVITED TALK 2
(Maloberti)
INVITED TALK 3
(Sanchez-Sinencio)
10:30-11:00 COFFEE BREAK COFFEE BREAK COFFEE BREAK
Session 1 Session 2 Session 3 Session 4 Session 17 Session 18 Session 19 Session 20 Session 25 Session 26 Session 27 Session 28
11:00 - 11:20 723 358 258 255 526 256 846 901 757 310 293 258
11:20 - 11:40 741 711 331 270 367 257 351 902 427 364 374 265
11:40 - 12:00 754 556 346 273 709 271 697 903 537 369 694 293
12:00 - 12:20 265 780 708 279 714 275 705 904 596 555 748 294
12:20 - 12:40 337 318 321 284 661 597 747 905 759 706 772 303
12:40 - 13:00 716 664 639 296 761 758 770 622 712 813 285
13:00 - 14:20 LUNCH LUNCH LUNCH
14:20
15:20
INVITED TALK 1
(GRIMBLATT)
Session 5 Session 6 Session 7 Session 8
TUTORIAL N°3 (part I)
Angel Rodriguez
TUTORIAL N°1
(Eirea)
INVITED TALK 4
(CASTILLO)
Session 29 Session 30 Session 31 Session 32
15:20 - 15:40 309 582 375 263
TUTORIAL N°3 (part II) TUTORIAL N°2
737 713 784 256
15:40 - 16:00 755 332 319 299
Angel Rodriguez (Ogorzalek /Jeske)
781 786 788 264
16:00 - 16:20 565 330 693 316
16:20 - 16:50 COFFEE BREAK COFFEE BREAK
16:50 - 17:10 Session 9
Program activities LASCAS / IBERCHIP
Session
10
Session
11
Session
12
802 600 735 290
17:10 - 17:30 704 729 794 297
POSTERS
17:30 - 18:00 ISTEC PRESENTATION
20:00 - 23:00 GALA DINNER
CLOSING CEREMONY

SESSION NAMES and PAPERS for ORAL PRESENTATIONS
Session number Session name Papers
1 Image and Video Processing 723,741, 754,265,337 and 716
2 Networks-on-Chip and Reconfigurable Architectures 358,711,556,780,318,664
3 Oscillators and Voltage Reference 258, 331, 346, 708 and 321,639
4 IBERCHIP SESSION:SENSORS and MICROSYSTEMS 255, 270, 273, 279, 284, 296
5 Video Processing Architectures 309,755,565
6 Data converters 330, 332, 582
7 Design techniques and tools I 375,319,693
8 IBERCHIP SESSION: Analog and Mixed-Signal IC Design 263,299,316
9 Fault Tolerance Techniques 802, 704
10 Communication Systems 600, 729
11 Design techniques and tools II 735, 794
12 IBERCHIP SESSION: Applications of High Level Description Languages 290, 297
13 Design Automation Tools and Methods 791,734,355
14 Complex Systems and industrial applications 354, 699, 744
15 Circuits and Systems for Biomedical and others I 307, 652 and 785
16 IBERCHIP SESSION: Programmable Devices and Rapid Prototyping 302, 312
17 Sensors and Voltage Reference 526, 367, 709, 714 and 661,761
18 Digital Filters and IP Blocks 256, 257, 271,275,597,758
19 RF circuits and devices I 846, 351 , 697, 705, 747, 770
20 CAD for Signal and Power Integrity 901, 902, 903, 904, 905
21 Circuits and Systems for Biomedical and others II 738, 779 and 753
22 Digital Filter Techniques 270,471,746
23 Digital Architecture Design Techniques 396,766,742
24 IBERCHIP SESSION: Embedded Systems 280, 295, 315
25 Dedicated Architectures in FPGA 757, 427, 537 ,596, 759, 622
26 Amplifiers and Filters I 310, 364, 369, 555, 706, 712
27 Power Management Circuits 293, 374, 694,748, 772, 813
28 IBERCHIP SESSION:Design Automation Tools and SoC 258, 265, 293, 294, 303, 285
29 Digital design and VLSI Architecture 737, 781
30 Amplifiers and Filters II 713, 786
31 RF circuits and devices II 784, 788
32 IBERCHIP SESSION: Device modelling and Reconfigurable digital desing 264, 256

WELCOME TO IV IEEE LASCAS and IBERCHIP XIX WORKSHOP
It is a privilege to welcome you to the fourth edition of the IEEE Latin American Symposium on Circuits and Systems (IEEE IV
LASCAS) and 19th edition of IBERCHIP WORKSHOP. These two regional events will take place in the city of Cusco, considered
World Heritage Site by UNESCO.
We chose Cusco for its fabulous cultural richness and extraordinary architecture and buildings rests, relevant even in these days.
This city, situated in the Peruvian Andes, was ruled by the Incas. It is somehow interesting to note that most of the impressive
achievements of the Incas and its predecessors was obtained without the exchange of experiences and knowledge with other
cultures. Nevertheless, to discuss this topic more properly, we have an invited talk on Friday afternoon that I recommend you
not to miss it.
Now, let us talk about our program. First, I would like to highlight the extraordinary work done by our LASCAS Program Chairs,
Prof. Sergio Bampi of UFRGS, Brazil and Prof. Eduard Alarcon of the Polytechnic University of Catalunya, Spain. They recommended
and received recommendations for organizing a set of sessions and invited talks in hot-topic themes. Certainly, this will
become a great contribution to the work being done in our laboratories and research groups.
I would also like to highlight the great work realized by IBERCHIP Program Chairs, Prof. Adoration Rueda of University of Seville
and the National Microelectronics Centre of Spain, and Prof. Fernando Silveira from Universidad de la Republica in Uruguay.
They, together with program chairs of LASCAS, in a demostration of coordinated work aiming to a first class event, managed to
consolidate a group of papers, high quality posters and technological contributions, that we will be able to observe these days.
Thank you very much to all of you. A mention special to Lorena Garcia, our Publications chair, from Universidad de Los Andes
for her generous contribution in final version of papers and posters and Ricardo Reis for the noble task of spreading events.
And, at this point, I would like to acknowledge the task realized by the reviewers, who helped evaluate more than 200 papers,
received at both events. Thank you very much to all the volunteers of CAS Section Peru, students of the CAS student branch of
the Universidad Nacional de Ingeniería, colleagues of the Pontificia Universidad Católica del Perú (PUCP) and the Microelectronics
Research Group of PUCP that this year celebrates 21 years old, and of course to the Universidad Nacional San Antonio Abad
of Cusco. I would also like to thank Universidad Ricardo Palma, Universidad Nacional de Ingenieria, Universidad Nacional San
Antonio Abad del Cusco, ISTEC and SYNOPSYS for their generous support, and Municipality of Cusco for giving facilities to the
development of LASCAS and IBERCHIP at this location.
Finally, I wish you a very fruitful participation in the prepared programs, enjoy Cusco, visit one of the new seven wonders of the
World, Machu Picchu, and come back home with more knowledge: scientific and cultural.
CARLOS SILVA CARDENAS
General Chair IV IEEE LASCAS
General co-chair IBERCHIP XIX WORKSHOP

BIENVENIDOS AL XIX WORKSHOP IBERCHIP
En su deambular anual por toda Latinoamérica, el Workshop IBERCHIP regresa a Perú en su XIX edición, casi dos décadas desde
su reunión fundacional. Diecinueve años en los que hemos asistido a grandes cambios; en ellos hemos recorrido un largo
camino en un mundo que se iba haciendo global y confuso a la vez, que ha pasado por momentos positivos y ha girado hacia
una situación pesimista que, seguro, también pasará. Sin embargo, contra viento y marea, la comunidad que se ha formado al
amparo de IBERCHIP resiste los embates, sigue creciendo y ampliándose, continúa incorporando nuevos miembros y reforzando
los lazos entre los que llevamos tanto tiempo trabajando en este proyecto, que ahora se ha consolidado con la incorporación
del IEEE a través de LASCAS.
Durante este periodo, el Workshop IBERCHIP, ha sido punto obligado de encuentro de numerosos grupos de investigación de
América Latina y Europa, ha crecido y se ha enriquecido cultural y temáticamente en su recorrido por el continente. Cartagena
de Indias, Sao Paulo, Lima, Mar del Plata, Ciudad de México, Montevideo, Guadalajara, La Habana, Salvador de Bahía, San José
de Costa Rica, Puebla, Buenos Aires, Iguazú, Bogotá y Playa del Carmen han ido jalonando este camino que, a veces, ha sido
difícil, pero siempre ha tenido la gratificación del trabajo en común, de la tarea y la ilusión compartidas. Nuestra comunidad ha
encontrado en IBERCHIP el ámbito que ha permitido un intercambio franco de experiencias, enmarcado por el calor de pueblos
lejanos en distancia, pero muy cercanos en sus raíces, en su idioma y en su cultura.
Con esta edición en Cusco, en la ciudad que Arguedas convirtió en mágica, en la capital del mundo incaico, se va a continuar una
andadura que espero prosiga sólidamente asentada en los cimientos de la gente joven que va a asistir a este nuevo encuentro,
tal y como los muros de los palacios incas siguen soportando los nuevos edificios. Como cada año, la celebración de este workshop
depende críticamente del trabajo de un comité local, que se encarga de allanar el camino, preparar el programa, buscar
la sede y, en esencia, facilitar la reunión IBERCHIP a todo nuestro colectivo. Este año hay que agradecerlo a las instituciones
peruanas que se han volcado en la organización del evento; a las personas que, lideradas por el profesor Carlos Silva han contribuido
a hacer posible esta edición. Desde aquí quiero reconocer su valioso trabajo y expresarles el reconocimiento de nuestra
comunidad.
Damos, pues, la bienvenida a aquellos que participen en esta XIX edición. Esperamos que la labor resulte productiva y se lleve
a cabo en el ambiente de cordialidad y camaradería que ha sido tradicional en IBERCHIP a lo largo de su historia. Hacemos votos
también por que seamos capaces, entre todos, de mantener y acrecentar esta actividad y de incorporar los activos jóvenes
que, con su ilusión y trabajo, sean garantía de futuro. Gente que en ese futuro continúe cohesionando esfuerzos y pilotando el
workshop, llevándolo con ambición hasta una posición de prestigio y reconocimiento internacional que, sin perder el tono de
amistad que ha caracterizado a IBERCHIP desde su fundación, sea referente en nuestros países y refuerce la comunidad científica
latinoamericana en nuestro ámbito científico y tecnológico.
JOSE LUIS HUERTAS
General Co-chair XIX WORKSHOP IBERCHIP

Foreword
Message from the LASCAS 2013 TPC Chairs
On behalf of the LASCAS 2013 Technical Program Committee, we warmly welcome all the participants of the 4 th IEEE Latin American Symposium
on Circuits and Systems(LASCAS), held from Feb. 27 to March 1, 2013 in Peru. This 4 th edition of the LASCAS Symposium promoted by the
IEEE Circuits and Systems Society in IEEE Region 9 was organized by an extraordinary group of volunteers of the Organizing Committee
chaired by Prof. Carlos Silva-Cardenas (PUCP University), to whom we are all greatly indebted. Since its start in 2010, the IEEE LASCAS
Symposium has been steadily growing as an important international forum for presentation and discussion of significant research results
on leading edge aspects of circuits and systems, in a broad set of themes, such as analog, RF and mixed-signal circuits design, sensors,
systems modeling and design, filter theory and applications, integrated circuits design, MEMs, dedicated and reconfigurable architectures,
CAD tools for CAS, design methods, verification and test methods, image/video processing, neural and fuzzy systems.
The Technical Program of LASCAS 2013 is enriched by a keynote on “Nanosystems: Devices, Circuits, Architectures, and Applications”, by
Giovanni de Micheli, by 3 invited talks by distinguished lecturers F. Maloberti, E. Sanchez-Sinencio, and V. Grimblatt, dealing with circuits
and integrated systems design, one invited talk on technology innovations in the ancient civilizations of pre-Colombian Peru, and 3
world-class tutorials. One special session on Advanced Methods for Power and Signal Integrity was organized by Ram Achar. Besides
an exciting technical program, LASCAS 2013 offers the backdrop of the ancient city of Cuzco, a gateway point to the world heritage of
pre-Colombian Machu Picchu ruins and surroundings.
Putting together LASCAS 2013 was a team effort of highly dedicated volunteers. This year LASCAS received 155 submissions electronically,
coming from 30 countries, including France, United States, Canada, Germany, Spain, Japan, Korea, Turkey, Czech Republic, Portugal,
Brazil, Colombia, Mexico, Uruguay, Argentina and 15 others. A total of 230 reviewers and TPC members assessed the quality of the
papers and selected 93 for oral presentation. A total of 98 papers, including those selected in the Special Session, are spread in 21 regular
Sessions, and 21 papers are to be presented in a Poster Session on February 28. The LASCAS Proceedings in IEEExplore reflect the
clear international participation in the Symposium, as papers from authors from 20 different countries comprise the Proceedings. The
Program Committee and external reviewers worked very hard in reviewing papers and providing suggestions for their improvement,
which were key to the final program quality. We deeply thank them, the keynote and invited talk speakers, the Publications Chairs, and
also the members of the various committees, and session chairs. The volunteers at the Conference Secretariat and the staff and students
deserve our appreciation for their dedication to organizing of LASCAS 2013, as well as IEEE CAS Society and its staff for providing support
also through the DLP Program of the Society.
LASCAS 2013 is co-located with the IBERCHIP Workshop, now in its 19 th Edition. Attendance to all Iberchip Sessions is open to participants, and
the Poster Session has interactions between authors of selected posters for either IBERCHIP or for LASCAS Technical Programs.
We hope you all enjoy the technical and social programs, which were carefully prepared for you. The LASCAS Symposium is a
contribution to those willing to openly share ideas and technical expertise in these exciting fields of Circuits and Systems.
Eduard Alarcon Sergio Bampi
Technical Program Co-Chair Technical Program Co-Chair
Univ. Politecnica Catalunha, Spain UFRGS Federal Univ., Brazil

Iberchip 2013 Program Co-Chairs’ Message
It is a great pleasure for us to contribute to the Iberchip community as Program Chairs of this XIX Iberchip Workshop and
welcome you to Cusco.
This year as a result of the review process we have accepted 24 papers for oral presentation and 8 papers for poster presentation
coming from 8 countries, from a total of 39 submitted papers. We thank the reviewers and the General Chairs for their help in
evaluating the submissiones and organizing the final program.
The topics cover analog, mixed signal and RF IC design and test, sensors and microsystems, device modeling and reliability,
power electronics digital design, embedded systems, programmable devices and systems. In addition to this rich scientific
program, the Iberchip Workshop keeps profiting for the synergy of its co-location with LASCAS and sharing with LASCAS
remarkable invited talks and, in this year, also tutorials embedded during the conference.
Finally, we specially thank the authors who have contributed to the conference and keep participating in the Iberchip
community. We are happy to see that the Iberchip Workshop, that has been one of the key tools for the development of the
microelectronics discipline in Latin America, remains a vital space of exchange of experiences and activities of our scientific
community.
Adoración Rueda Fernando Silveira
IMSE-CNM, España Universidad de la República, Uruguay

27 FEBRUARY
08:30 - 09:30 Opening
09:30 - 10:30 Keynote Speech: “Nanosystems: devices, circuits, architectures and applications “
Professor Giovanni De Micheli, EPFL, Lausanne (SALON OLLANTAYTAMBO)
10:30 - 11:00 Coffee Break
SESSION 1 : Image and Video Processing (SALON OLLANTAYTAMBO)
11:00 - 11:20 723: A Mesh-based Method for Wavelet Video Coding using Edge-Detection in Low Frequency Subband
Miok Kim, Nam Ling, John Ralston, Li Song,
11:20 - 11:40 741: Codebook Improvements for a CMOS Imager with Focal-Plane Vector Quantization
Roberto Estevao Filho, Jose Gabriel Gomes, Antonio Petraglia,
11:40 - 12:00 754: High-level Design and Synthesis of a MPEG-4 AAC IMDCT Module
Renato Sampaio, Pedro Berger, Ricardo Jacobi,
12:00 - 12:20 265: Application-specific Arithmetic Circuit Design for a Particle Tracking Application
Takashi Kambe, Kohsei Takehara, Shuji Tsukiyama,
12:20 - 12:40 337: An Application of The Empirical Mode Decomposition to Brain Magnetic Resonance Images Classif.
Mounir Boukadoum, Salim Lahmiri,
12:40 - 13:00 716: A Low-Power Configurable VLSI Architecture for Sum of Absolute Differences Calculation
Ismael Seidel, Bruno Moraes, José Güntzel,
13:00 - 14:20 Lunch
14:20 - 15:20 Invited Talk 1: Electronic Design Automation at the core of Electronic Design and Manufacturing
Prof. Victor Grimblatt (SALON OLLANTAYTAMBO)
SESSION 5: Video Processing Architectures (SALON OLLANTAYTAMBO)
15:20 - 15:40 309: A Fast Hardware-Friendly Motion Estimation Algorithm and its VLSI Design for Real Time Ultra High
Definition Applications
Gustavo Sanchez, Marcelo Porto, Luciano Agostini,
15:40 - 16:00 755: A Real Time High Definition Architecture for The Variable-Length Reference Frame Decoder
Dieison Silveira, Marcelo Porto, Luciano Agostini,
16:00 - 16:20 565: Low Cost and High Throughput FME Interpolation for the HEVC Emerging Video Coding Standard
Vladimir Afonso, Henrique Maich, Luciano Agostini, Denis Franco,
16:20 - 16:50 Coffee Break
SESSION 9: Fault Tolerance Techniques (SALON TIPON)
16:50 - 17:10 802: Sinusoidal Signal Generation for Mixed-Signal BIST Using a Harmonic-Cancellation Technique
Manuel J. Barragan, Gildas Leger, Diego Vazquez, Adoración Rueda,
17:10 - 17:30 704: Optimization of a self-converging algorithm at assembly level to improve SEU Fault-Tolerance
Greicy Marques-Costa, Wassim Mansour, Fabrice Pancher, Raoul Velazco, Devan Sohier,

27 FEBRUARY
08:30 - 09:30 Opening
09:30 - 10:30 Keynote Speech: “Nanosystems: devices, circuits, architectures and applications “
Professor Giovanni De Micheli, EPFL, Lausanne (SALON OLLANTAYTAMBO)
10:30 - 11:00 Coffee Break
SESSION 2: Networks-on-Chip and Reconfigurable Architectures (SALON SAQSAYHUAMAN)
11:00 - 11:20 358: A Strategy for mapping Reconfigurable Cores in NoCs
Jonas Gomes Filho, Marius Strum, Wang Jiang Chau
11:20 - 11:40 711: ACO approach in Static Routing for Network-on-Chips with 3D Mesh Topology
Luneque Silva Junior, Nadia Nedjah, Luiza de Macedo Mourelle
11:40 - 12:00 556: QoS 3D-HoC Hybrid-on-Chip Communication Structure for Dynamic 3D-MPSoCs
Johanna Sepulveda, Guy Gogniat, Ricardo Pires, Cesar Pedraza, Wang Chau
12:00 - 12:20 780: Long Range Dependence in Intrachip Transaction Level Traffic
Jorge Gonzalez, Gustavo Patino, Wang Jiang Chau, Marius Strum
12:20 - 12:40 318: A Scalable Parallel Reconfigurable Hardware Architecture for DNA Matching
Edgar Garcia, Nadia Nedjah, Luiza Mourelle
12:40 - 13:00 664: Design of Locally-Clocked Asynchronous Finite State Machines Using Synchronous CAD Tools
Duarte Oliveira, Diego Bompean, Tiago Curtinhas, Lester Faria,
13:00 - 14:20 Lunch
14:20 - 15:20 Invited Talk 1: Electronic Design Automation at the core of Electronic Design and Manufacturing
Prof. Victor Grimblatt (SALON OLLANTAYTAMBO)
SESSION 6: Data Converters (SALON TIPON)
15:20 - 15:40 582: A Power Optimized Decimator for Sigma-Delta Data Converters
Dionisio Carvalho, João Navarro
15:40 - 16:00 332: 7-Bit 2.56 GS/s Folding ADC with Nanometric Compatible Architecture by Using a High Dynamic I/O
Folding Amplifier
Luis Antonio Carrillo Martínez, Guillermo Espinosa Flores-Verdad
16:00 - 16:20 330: A System Clock Precision Frequency to Code Converter for Low Power Supply Dependence ROIC
Raul Aragones Ortiz, Joan Oliver Malagelada, Carles Ferrer Ramis
16:20 - 16:50 Coffee Break
SESSION 10: Communication Systems (SALON OLLANTAYTAMBO)
16:50 - 17:10 600: Analysis of a Broadband Beamformer based on Trapezoidal Filters and Nested Arrays
Iman Moazzen, Panajotis Agathoklis,
17:10 - 17:30 729: Non-Stationary Statistical Simulation of Blind-Oversampling CDR Circuits
Zdenek Kolka, Michal Kubicek, Viera Biolkova, Dalibor Biolek,

27 FEBRUARY
08:30 - 09:30 Opening
09:30 - 10:30 Keynote Speech: “Nanosystems: devices, circuits, architectures and applications “
Professor Giovanni De Micheli, EPFL, Lausanne (SALON OLLANTAYTAMBO)
10:30 - 11:00 Coffee Break
SESSION 3: Oscillators and Voltage Reference (SALON TIPON)
11:00 - 11:20 258: Analog Circuits for Modeling and Controlling Neural Synchrony
Andrius Petrovas, Elena Tamaseviciute, Gytis Mykolaitis, Arunas Tamasevicius, Ruedi Stoop,
11:20 - 11:40 331: Analysis and Design of Ultra-Low-Voltage Inductive Ring Oscillators for Energy-Harvesting Appl.
Márcio Bender Machado, Márcio Schneider, Carlos Galup-Montoro,
11:40 - 12:00 346: A Frequency to Voltage Converter based on an Accurate Pulse Width Modulator for Freq.
Locked Loops
Çağrı Gürleyük, Burçin Pak, Devrim Yılmaz Aksın,
12:00 - 12:20 708: Ultra Low Power Pulse Generator Based on a Ring Oscillator with Direct Path Current Avoidance
Francisco Veirano, Pablo Pérez, Sebastián Besio, Pablo Castro, Fernando Silveira,
12:20 - 12:40 321: Voltage reference design using 1 V power supply in 0.13 μm CMOS technology
Dalton Colombo, Gilson Wirth, Sergio Bampi, Purushothaman Srinivasan,
12:40 - 13:00 639: A low voltage CMOS voltage reference based on partial compensation of MOSFET threshold voltage
and mobility using current subtraction
Luis Eduardo Toledo, Pablo A. Petrashin, Walter J. Lancioni, Fortunato C. Dualibe, Luis R. Canali
13:00 - 14:20 Lunch
14:20 - 15:20 Invited Talk 1: Electronic Design Automation at the core of Electronic Design and Manufacturing
Prof. Victor Grimblatt (SALON OLLANTAYTAMBO)
SESSION 7: Design Techniques and tools I (SALON SAQSAYHUAMAN)
15:20 - 15:40 375: Symbolic Nodal Analysis of Fully-Differential Analog Circuits
Carlos Sánchez-López, Rocio Ochoa-Montiel, Adriana Ruiz-Pastor, Brian González-Contreras
15:40 - 16:00 319: Parallel GPU-based Implementation of High Dimension Particle Swarm Optimizations
Rogério Calazan, Nadia Nedjah, Luiza Mourelle,
16:00 - 16:20 693: Transistor-Level Optimization of CMOS Complex Gates
Leomar da Rosa Junior, Vinicius Possani, Felipe Marques, André Reis, Renato Ribas,
16:20 - 16:50 Coffee Break
SESSION 11: Design Techniques and tools II (SALON SAQSAYHUAMAN)
16:50 - 17:10 735: ESD LVTSCR model calibration by differential evolutionary optimization algorithm
Tomas Napravnik, Premysl Ziska, Jiri Jakovenko,
17:10 - 17:30 794: A Configurable Analog Buffer Dedicated to a Wafer- Scale Prototyping Platform of Electronic Systems
Nicolas Laflamme-Mayer, Yves Blaquière, Mohamad Sawan,

27 FEBRUARY
08:30 - 09:30 Opening
09:30 - 10:30 Keynote Speech: “Nanosystems: devices, circuits, architectures and applications “
Professor Giovanni De Micheli, EPFL, Lausanne (SALON OLLANTAYTAMBO)
10:30 - 11:00 Coffee Break
SESSION 4: Sensors and Microsystems (SALON QENQO)
11:00 - 11:20 255: Oscillator for Eddy Current Sensor IC
Daniely Silva, Jose Antonio Ribeiro, Tales Pimenta,
11:20 - 11:40 270: P-type and N-type Quasi-Vertical Thin Film Transistor Based on Low-Temperature Polycrystalline Sili-
con Technology
Peng Zhang, Emmanuel Jacques, Régis Rogel, Olivier Bonnaud,
11:40 - 12:00 273: Characterization of a water activity SAW sensor with nanostructured sensitive film deposited by the
SAW atomizer
Ana V. Ulhano Braga, Sergey M. Balashov, Olga V. Balashova, A. Pavani Filho, Héctor Palácios Cabrera,
12:00 - 12:20 279: Design Considerations for Integrated Antennas used in High Frequency Applications
Luz Karine Sandoval Granados, Roberto S. Murphy Arteaga,
12:20 - 12:40 284: Caracterização Piezoresistiva de Filmes Finos de ZnO depositados por RF Magnetron Sputtering
Guilherme Cardoso, Gabriela Leal, Argemiro Sobrinho, Mariana Fraga, Marcos Massi
12:40 - 13:00 296: Diseño de un Nanosensor Usando Nanotubos de Carbono para Detectar CO2
Ingrid Padilla Espinosa, John Michael Espinosa Duran, Jaime Velasco Medina,
13:00 - 14:20 Lunch
14:20 - 15:20 Invited Talk 1: Electronic Design Automation at the core of Electronic Design and Manufacturing
Prof. Victor Grimblatt SALON OLLANTAYTAMBO)
SESSION 8: Analog and Mixed-Signal IC Design (SALON QENQO)
15:20 - 15:40 263: Diseño y caracterización de una celda de memoria analógica en tecnología CMOS de 0.5um
Jesus Ezequiel Molinar-Solis, Rodolfo Zola Garcia-Lozano, Jose Miguel Rocha-Perez,
15:40 - 16:00 299: Ultra-low-power 2.4 GHz Hartley oscillator
Ronaldo Ponte, Fernando Sousa,
16:00 - 16:20 316: Modelado de un Conversor DC/DC Completamente Integrado con Condensadores Conmutados
Gabriel Eirea, Pablo Castro, Fernando Silveira,
16:20 - 16:50 Coffee Break
SESSION 12: Applications of High Level Description Languages (SALON QENQO)
16:50 - 17:10 290: Projeto Prático de um Processador Assíncrono
Antonio Deromir, Duarte Oliveira, Tiago Curtinhas,
17:10 - 17:30 297: Estudo e Desenvolvimento dos Algoritmos de Busca de Caminhos em Grafos no LabVIEW
Walter Calienes Bartra, Ricardo Reis,

28 FEBRUARY
SESSION13: Design Automation Tools and Methods (SALON OLLANTAYTAMBO)
08:30 - 08:50 791: Fast Floorplanning With Placement Constraints
Shantesh Pinge, Rajeev K Nain, Malgorzata Chrzanowska-Jeske,
08:50 - 09:10 734: A New Delay Distribution Model to Take Long-Term Degradation into Account
Shuji Tsukiyama, Masahiro Fukui, Takashi Kambe,
09:10 - 09:30 355: Design of NCL Gates with the ASCEnD Flow
Matheus Trevisan Moreira, Carlos Oliveira, Ricardo Porto, Ney Calazans,
09:30 - 10:30 Invited Talk 2: “Data Converters for Communications “ (SALON OLLANTAYTAMBO)
Prof. Franco Maloberti
10:30 - 11:00 Coffee Break
SESSION 17: Sensors and Voltage Reference (SALON TIPON)
11:00 - 11:20 526: Sensor Signal Linearization Techniques: A Comparative Analysis
Antonio J. Lopez-Martin, Alfonso Carlosena,
11:20 - 11:40 367: Designing MEMS Pressure Sensors with Integrated Circuitry on Silicon for Miscellaneous Applications
Wolfgang Schreiber-Prillwitz, Reinhart Job,
11:40 - 12:00 709: Capacitance Measurements of an SOI Based CMUT
Jonathan Hernandez, Tugrul Zure, Sazzadur Chowdhury,
12:00 - 12:20 714: A Low-Power, Offset-Corrected Potentiostat For Chemical Imaging Applications
Tucker Kern, Tom Chen,
12:20 - 12:40 661: A Resistorless Switched Bandgap Reference Topology
Hamilton Klimach, Moacir Fernandes Cortinhas Monteiro, Arthur Liraneto Torres, Sergio Bampi,
12:40 - 13:00 761: An Efficient CMOS Configurable Bias Current Generator with Wide Dynamic Range
David Cordova, Eric Fabris, Renato Campana,
13:00 - 14:20 Lunch
14:20 - 16:20 Tutorial N°3 (Part I and II) (SALON SAQSAYHUAMAN)
Smart CMOS Image Sensors for 2-D and 3-D Capture and Processing: Pixels, Circuits,
Architectures and Practical Design Guidelines
Dr. Ángel Rodríguez-Vázquez
16:20 - 16:50 Coffee Break
16:50 - 17:30 POSTERS
17:30 - 18:00 ISTEC PRESENTATION (SALON TIPON)
20:00 - 23:00 GALA DINNER

28 FEBRUARY
SESSION 14: Complex Systems and industrial applications (SALON TIPON)
08:30 - 08:50 354: Development of a Stereo Vision Measurement Architecture for an Underwater Robot
Camilo Sanchez-Ferreira, Jones Y.Mori, Carlos H.Llanos, Eugenio Fortaleza,
08:50 - 09:10 699: Efficient Hardware Architecture for Embedded Radionuclide Identification
Marcos Santana Farias, Nadia Nedjah, Luiza de Macedo Mourelle
09:10 - 09:30 744: Pedestrian Dead Reckoning with Attitude Estimation using a Fuzzy Logic Tuned Adapt. Kalman Filter
Mariana Ibarra-Bonilla, Jorge Escamilla-Ambrosio, Juan Manuel Ramirez-Cortes, Carlos Vianchada,
09:30 - 10:30 Invited Talk 2: “Data Converters for Communications “ (SALON OLLANTAYTAMBO)
Prof. Franco Maloberti
10:30 - 11:00 Coffee Break
SESSION 18 Digital Filters and IP Blocks (SALON QENQO)
11:00 - 11:20 256: Closed Form Design of Nearly Equiripple Low-Pass FIR Filters
Pavel Zahradnik, Boris Simak, Miroslav Vlcek,
11:20 - 11:40 257: Narrow-Band FIR Filter Sets
Pavel Zahradnik, Boris Simak, Miroslav Vlcek,
11:40 - 12:00 271: Realization of 4D Lattice Structured Digital Filters
Minas Kousoulis, George Antoniou,
12:00 - 12:20 275: Efficient Rational Sample Rate Conversion Based on Comb Filter
Arcesio Arbeláez, Gordana Jovanovic,
12:20 - 12:40 597: FPGA Implementation of a Sequential Extended Kalman Filter Algorithm Applied to Mobile Robotics
Localization Problem
Sergio Cruz, Daniel Muñoz, Milton Conde, Carlos Llanos, Geovany Borges,
12:40 - 13:00 758: Hardware design of an eigensolver based on the QR Method
Jorge Guerrero-Ramirez, Jaime Velasco-Medina, Julio Arce-Clavijo,
13:00 - 14:20 Lunch
14:20 - 16:20 Tutorial N°3 (Part I and II) (SALON SAQSAYHUAMAN)
Smart CMOS Image Sensors for 2-D and 3-D Capture and Processing: Pixels, Circuits,
Architectures and Practical Design Guidelines
Dr. Ángel Rodríguez-Vázquez
16:20 - 16:50 Coffee Break
16:50 - 17:30 POSTERS
17:30 - 18:00 ISTEC PRESENTATION (SALON TIPON)
20:00 - 23:00 GALA DINNER

28 FEBRUARY
SESSION 15: Circuits and Systems for Biomedical and others I (SALON SAQSAYHUAMAN)
08:30 - 08:50 307: Low Power Low Noise Bio-Amplifier with Adjustable Gain for Digital Bio-Signals Acquisition Systems
Odilon Dutra, Tales Pimenta,
08:50 - 09:10 652: A Wireless Medical System Prototype for Implantable Applications
Jesus Efrain Gaxiola-Sosa, Kamran Entesari,
09:10 - 09:30 785: DC and AC Electrical Characterization Temperature Dependence of Ag/Porous Silicon/p-Si/Al
Edward Oliveros, Faruk Fhontal, Gilberto Bolaños,
09:30 - 10:30 Invited Talk 2: “Data Converters for Communications “ (SALON OLLANTAYTAMBO)
Prof. Franco Maloberti
10:30 - 11:00 Coffee Break
SESSION 19: RF Circuits and devices I (SALON OLLANTAYTAMBO)
11:00 - 11:20 846: Inductor Characterization in RF LC-VCOs
Ricardo Doldán, Antonio Ginés, Adoración Rueda,
11:20 - 11:40 351: A 60 GHz up-conversion mixer using asymmetric layout with -41.1 dBc LO leakage
Yuki Tsukui, Kenichi Okada, Akira Okada,
11:40 - 12:00 697: A 2.535 GHz Fully Integrated Doherty Power Amplifier in CMOS 65nm with Constant PAE in Backoff
Marcos Carneiro, Nathalie Deltimple, Eric Kerherve, Paulo de Carvalho, Didier Bélot,
12:00 - 12:20 705: Optimization of 65nm CMOS Passive Devices to Design a 16 dBm-Psat 60 GHz Power Amplifier
Sofiane ALOUI, Bernardo LEITE, Nejdat DEMIREL, Robert PLANA, Didier BELOT,
12:20 - 12:40 747: A Motion Detection Pixel System Using an Inductorless UWB Transm using std. 0.35µm/CMOS Tech.
Marcelo Macchi da Silva, Jose Fontebasso Neto, Luiz Carlos Moreira, Jacobus W. Swart,
12:40 - 13:00 770: Analysis of the effects of coupling through substrate and the calculus of the Q factor
Emmanuel Torres , Svetlana C. Sejas García, Luiz C. Moreira, Reydezel Torres, Wilhelmus Van Noije
13:00 - 14:20 Lunch
14:20 - 15:20 Tutorial N°1 (SALON TIPON)
Modelling and Control of DC-DC Converters
Dr. Gabriel Eirea
15:20 - 16:20 Tutorial N°2 (SALON TIPON)
3D Intergrated Circuits - current design concepts and future trends
Dr. Maciej Ogorzalek; Dra. Malgorzata Chrzanowska-Jeske
16:20 - 16:50 Coffee Break
16:50 - 17:30 POSTERS
17:30 - 18:00 ISTEC PRESENTATION (SALON TIPON)
20:00 - 23:00 GALA DINNER

28 FEBRUARY
SESSION 16: Programmable Devices and Rapid Prototyping (SALON QENQO)
08:30 - 08:50 302: Arquitectura de alta frec. de un filtro de escalabilidad para sobremuestreo de imágenes en factor 2
sobre un FPGA
Christian Enrique Cano Salazar, Mario Andrés Raffo Jara,
08:50 - 09:10 312: XML-based Description Language for Heterogeneous and Highly-configurable IP-core Integration
José Ignacio Villar, Jorge Juan, Manuel Jesus Bellido, Julian Viejo,
09:10 - 09:30
09:30 - 10:30 Invited Talk 2: “Data Converters for Communications “ (SALON OLLANTAYTAMBO)
Prof. Franco Maloberti
10:30 - 11:00 Coffee Break
SESSION 20: SPECIAL SESSION: CAD for Signal and Power Integrity (SALON SAQSAYHUAMAN)
11:00 - 11:20 901: Managing Signal and Power Integrity using Power Transm. Lines and Alternate Signaling Schemes
S Telikepalli, Sang Kyu Kim, Sung Joo Park, Madhavan Swaminathan, Youkeun Han
11:20 - 11:40 902: Phase-Locked Loop Simulations Using the Latency Insertion Method
José E. Schutt-Ainé and Patrick K. Goh
11:40 - 12:00 903: Efficient Parallel Scheduler for Circuit Simulation Exploiting
D. Paul, R. Achar, M. S. Nakhla, N. M. Nakhla
12:00 - 12:20 904: Signal Integrity Design of TSV and Interposer in 3D-IC
Jonghyun Cho, Joungho Kim
12:20 - 12:40 905: Systematic configuration of coarsely discretized 3D EM solvers for reliable and fast simulation of high
frequency planar structures.
José E. Rayas-Sánchez, Zabdiel Brito-Brito, Juan C. Cervantes-González, Carlos A. López
13:00 - 14:20 Lunch
14:20 - 15:20 Tutorial N°1 (SALON TIPON)
Modelling and Control of DC-DC Converters
Dr. Gabriel Eirea
15:20 - 16:20 Tutorial N°2 (SALON TIPON)
3D Intergrated Circuits - current design concepts and future trends
Dr. Maciej Ogorzalek; Dr. Malgorzata Chrzanowska-Jeske
16:20 - 16:50 Coffee Break
16:50 - 17:30 POSTERS
17:30 - 18:00 ISTEC PRESENTATION (SALON TIPON)
20:00 - 23:00 GALA DINNER

01 MARCH
SESSION 21: Circuits and Systems for Biomedical and others II (SALON OLLANTAYTAMBO)
08:30 - 08:50 738: A Biopotential Amplifier with Improved Common Mode Gain
Reza Abdullah, Edgar Sanchez-Sinencio,
08:50 - 09:10 753: A Programmable Charge Pump Voltage Converter for Implantable Medical Devices in a HV Technol.
Alfredo Arnaud, Matias Miguez, Joel Gak,
09:10 - 09:30 779: Implementation and Evaluation of an Adaptive Method for Reduce the Respiration Influence on
Heart Rate Variability
Raymundo Cassani, Juan Carlos Sánchez, Raul Martínez,
09:30 - 10:30 Invited Talk 3: Class-D Amplifiers: Fundamentals, Recent Results and Open Problems
Prof. Edgar Sánchez-Sinencio (SALON OLLANTAYTAMBO)
10:30 - 11:00 Coffee Break
SESSION 25: Dedicated Architectures in FPGA (SALON SAQSAYHUAMAN)
11:00 - 11:20 757: Design of a Massively Parallel Computing Architecture for Dense Matrix Multiplication
Wilson José, Ana Silva, Mário Véstias, Horácio Neto,
11:20 - 11:40 427: Specific Processor in FPGA for Blake Algorithm
Victor Ferreira P, Edward D. Moreno, Wanderson R. Azevedo D, Dellano O. Domingo dos Santos
11:40 - 12:00 537: Design of an Elliptic Curve Cryptoprocessor using Optimal Normal Basis over GF(2^233)
Fernando Urbano-Molano, Vladimir Trujillo-Olaya, Jaime Velasco-Medina,
12:00 - 12:20 596: Systolic Architectures to Evaluate Polynomials of Degree n Using the Horner’s Rule
Gianluca Forte, John M. Espinosa-Duran, Jaime Velasco-Medina,
12:20 - 12:40 759: Design of a Multiband Full-Rate Ultra-Wideband Receiver in FPGA
Mário Véstias, Horácio Neto, Helena Sarmento,
12:40 - 13:00 622: Hardware realization of a lightweight 2D cellular automata-based cipher for image encryption
Cesar Torres-Huitzil
13:00 - 14:20 Lunch
14:20 - 15:20 Invited Talk 4: Technological Advances and Innovation among the Civilizations of Ancient Peru
Dr. Luis Jaime Castillo (SALON OLLANTAYTAMBO)
SESSION 29: Digital design and VLSI Architecture (SALON OLLANTAYTAMBO)
15:20 - 15:40 737: ASIC implementation of a modified QR decomposition for tree search based MIMO detection
Christina Gimmler-Dumont, Philipp Schläfer, Norbert Wehn,
15:40 - 16:00 781: VLSI Architectures for Digital Modulation Classification using Support Vector Machines
Edson Sorato, Renan Netto, Pedro Michel, José Luís Güntzel, Adabery Castro,
CLOSING CEREMONY

01 MARCH
SESSION 22: Digital Filter Techniques (SALON SAQSAYHUAMAN)
08:30 - 08:50 270: Efficient Online Estimation of Electromechanical Modes in Large Power Systems
Fernando Javier De Marco, José Antonio Apolinário Jr., Paulo Cesar Pellanda, Nelson Martins
08:50 - 09:10 471: Fixed-Point Adaptive Filter Architecture for the Harmonics Power Line Interference Cancelling
Gustavo Seibel, Fábio Itturriet, Eduardo Costa, Sérgio Almeida
09:10 - 09:30 746: 61 pJ/sample Near-Threshold Notch Filter with Pole-Radius Variation
Leonardo Soares, Kleber Stangherlin, Jorge de Mello, Sergio Bampi,
09:30 - 10:30 Invited Talk 3: Class-D Amplifiers: Fundamentals, Recent Results and Open Problems
Dr. Edgar Sánchez-Sinencio (SALON OLLANTAYTAMBO)
10:30 - 11:00 Coffee Break
SESSION 26: Amplifiers and Filters I (SALON OLLANTAYTAMBO)
11:00 - 11:20 310: Fully-Differential Offset-Cancelling Circuit with Configurable Output Common-Mode Voltage
Enrique Alvarez, Diego Avila, Hernan Campillo, Angel Abusleme
11:20 - 11:40 364: A Robust to PVT Fully-Differential Amplifier in 45nm SOI-CMOS Technology
Andres Amaya, Francisco Villota, Guillermo Espinosa
11:40 - 12:00 369: Enhanced DC Gain Amplifier Using No Miller Capacitor Feedforward Compensation
Hector Ivan Gomez Ortiz
12:00 - 12:20 555: CMOS Current-Mode Integrator for Low Voltage and Low Power Applications
Fathi Farag,
12:20 - 12:40 706: Very-Low-Tranconductance CMOS Amplifier using Multi-Tanh Bulk-Driven Input Stage with Gate-
Controlled Assymetry for Gm-C Applications
Oscar Robles, Fernando Barúqui,
12:40 - 13:00 712: A 0.18μm CMOS Switched-Capacitor Amplifier Using Current-Starving Inverter Based Op-Amp for Low
Power Biosensor Applications
Ryan Selby, Tucker Kern, William Wilson, Tom Chen,
13:00 - 14:20 Lunch
14:20 - 15:20 Invited Talk 4: Technological Advances and Innovation among the Civilizations of Ancient Peru
Dr. Luis Jaime Castillo (SALON OLLANTAYTAMBO)
SESSINN 30: Amplifiers and Filters II (SALON SAQSAYHUAMAN)
15:20 - 15:40 713: A Current-Starved Inverter-Based Differential Amplifier Design for Ultra-Low Power Applications
William Wilson, Ryan Selby, Tom Chen,
15:40 - 16:00 786: A family of memristive transfer functions of negative feedback nullor-based amplifiers
Arturo Sarmiento, Carlos Hernandez, Hector Vazquez-Leal,
CLOSING CEREMONY

01 MARCH
SESSION 23: Digital Architecture Design Techniques (SALON TIPON)
08:30 - 08:50 396: Novel redundant logic design for noisy low voltage scenarios
Lancelot Garcia-Leyva, Antonio Calomarde, Francesc Moll, Antonio Rubio
08:50 - 09:10 766: Design of Synchronous Pipeline Digital Systems Operating in Double–Edge of the Clock
Duarte Oliveira, Tiago Curtinhas, Lester Faria, Leonardo Romano
09:10 - 09:30 742: Reducing the Hamming Distance of Encoded FFT Twiddle Factors Using Improved Heuristic Algorith.
Angelo Luz, Eduardo Costa, Sidinei Ghissoni
09:30 - 10:30 Invited Talk 3: Class-D Amplifiers: Fundamentals, Recent Results and Open Problems
Dr. Edgar Sánchez-Sinencio (SALON OLLANTAYTAMBO)
10:30 - 11:00 Coffee Break
SESSION 27: Power Management Circuits (SALON TIPON)
11:00 - 11:20 293: A Voltage-Mode Boost DC-DC Converter with a Constant-Duty-Cycle Pulse Control
Chin-Long Wey, Chung-Hsien Hsu, Tai-Wei Chang,
11:20 - 11:40 374: Low Power Low Voltage Wide Frequency Resonant Clock and Data Circuits for SoC Power Reductions
Ignatius Bezzam, Tezaswi Raja , Chakravarthy Mathiazhagan, Shoba Krishnan, Franco Maloberti
11:40 - 12:00 694: Electrostatic generators for vibrational energy harvesting
Antonio Queiroz,
12:00 - 12:20 748: Theoretical Investigation of Wireless Power Transfer by Spiral Planar Antennas
Reinaldo Abreu, Francisco Portelinha, Tales Pimenta, Danilo Spadoti,
12:20 - 12:40 772: Fully Integrated Single-Inductor Multiple-Output (SIMO) DC-DC Converter in CMOS 65 nm Technology
Angel J. Soto, Esteban O. Lindstrom, Alejandro R. Oliva, Pablo S. Mandolesi, Fortunato C. Dualibe,
12:40 - 13:00 813: Fully Integrated Boost Converter For Thermoelectric Energy Harvesting
Hugo Hernandez, Sergio Takeo, Wilhelmus Van Noije,
13:00 - 14:20 Lunch
14:20 - 15:20 Invited Talk 4: Technological Advances and Innovation among the Civilizations of Ancient Peru
Dr. Luis Jaime Castillo (SALON OLLANTAYTAMBO)
SESSION 31: RF Circuits and devices II (SALON TIPON)
15:20 - 15:40 784: Inductorless very small 2nd derivative Gaussian IR-UWB transmitter module using n/p-latches as PDs
in CMOS technology
Luiz Carlos Moreira, José Fontebasso Neto, Wilhelmus A. M. Van Noije, Emanuel Torres Rios
15:40 - 16:00 788: A Design Technique for distributed Dual-band bandpass Filters
Thiago Goes, Robson Lima, Luciana Martinez, Fernando Rangel
CLOSING CEREMONY

01 MARCH
SESSION 24: Embedded Systems (SALON QENQO)
08:30 - 08:50 280: Automedida de consumo en dispositivos portables
Julian Oreggioni, Leonardo Steinfeld,
08:50 - 09:10 295: Sistema embebido para la adquisición y el procesamiento de señales EMGdi
Juan Sebastian Rubiano Labrador,
09:10 - 09:30 315: Diseño de un sistema embebido para la medición de área usando procesamiento digital de imágenes
Albert Fabian Torres Monsalve, Jaime Velasco Medina,
09:30 - 10:30 Invited Talk 3: Class-D Amplifiers: Fundamentals, Recent Results and Open Problems
Dr. Edgar Sánchez-Sinencio (SALON OLLANTAYTAMBO)
10:30 - 11:00 Coffee Break
SESSION 28: Design Automation Tools and SoC (SALON QENQO)
11:00 - 11:20 258: Demonstrando o Algoritmo de Busca Quântica de Grover
Marina Miranda, Calebe Conceição, Ricardo Reis
11:20 - 11:40 265: Dimensionamento de Portas e Assinalamento de Vt usando Fanin/Fanout e Simulated Annealing
Tiago Reimann, Gracieli Posser, Guilherme Flach, Marcelo Johann, Ricardo Reis
11:40 - 12:00 293: Contention-Aware Scheduling for Real-Time Wormhole Network-on-Chip
Ronnison Reges Vidal, Karla Darlene Nepomuceno Ramos,
12:00 - 12:20 294: Geração Automática de Processadores Dedicados à Simulação de Algoritmos Quânticos em FPGA
Calebe Conceicao, Ricardo Reis,
12:20 - 12:40 303: Improving Run Time of EDA Algorithms With FPGAs: SAT Solver As Case Study
Jorge Lucio Tonfat Seclen, Tania Ferla, Guilherme Flach, Ricardo Reis
12:40 - 13:00 285: Implementando um mecanismo de arbitragem em Redes em Chip
Eliselma Vieira dos Santos, Karla Darlene Nemopuceno Ramos, Bruno Cruz de Oliveira,
13:00 - 14:20 Lunch
14:20 - 15:20 Invited Talk 4: Technological Advances and Innovation among the Civilizations of Ancient Peru
Dr. Luis Jaime Castillo (SALON OLLANTAYTAMBO)
SESSION 32: Device modelling and Reconfigurable digital design (SALON QENQO)
15:20 - 15:40 256: A Reconfigurable Decimation Filter Design for a Cascade 2-2 Sigma-Delta Analog-to-Digital Converter
Cristian Muller, Cesar A. Prior, Joao B. S. Martins, Paulo C. Comassetto Aguirre, Altamiro Susin,
15:40 - 16:00 264: Estres eléctrico en TFT’s de CdS con HfO2 como dieléctrico de compuerta
Rodolfo Z García-Lozano, J. E. Molinar-Solis, Alejandra Morales R, Israel Mejia, A.L. Salas-Villaseno
CLOSING CEREMONY

Keynote Speech: “Nanosystems: devices, circuits, architectures and applications
Much of our economy and way of living will be affected by nanotechnologies in the decade to
come and beyond. Mastering materials at the molecular level and their interaction with living
matter opens up unforeseeable horizons. This talk deals with how we will conceive, design and
use nanosystems, i.e., integrated systems exploiting nanodevices.Whereas switching circuits and
microelectronics have been the enablers of computer and communication systems, nanosystems
have the potentials to realize innovative computational fabrics whose applications require
broader hardware abstractions, extended software layers and with a much higher complexity level
overall.The abstraction of computation, the nanosystem architecture, the technological feasibility
envelope and the multivariate design optimization problems pose challenging and disruptive
research questions that this talk will address.
Giovanni De Micheli / Giovanni De Micheli is Professor and Director of the Institute of Electrical Engineering and of the Integrated
Systems Centre at EPF Lausanne, Switzerland. He is program leader of the Nano-Tera.ch program. Previously, he was
Professor of Electrical Engineering at Stanford University.He holds a Nuclear Engineer degree (Politecnico di Milano, 1979), a
M.S. and a Ph.D. degree in Electrical Engineering and Computer Science (University of California at Berkeley, 1980 and 1983).
Prof. De Micheli is a Fellow of ACM and IEEE and a member of the Academia Europaea. His research interests include several
aspects of design technologies for integrated circuits and systems, such as synthesis for emerging technologies, networks on
chips and 3D integration.
He is also interested in heterogeneous platform design including electrical components and biosensors, as well as in data processing
of biomedical information. He is author of: Synthesis and Optimization of Digital Circuits, McGraw-Hill, 1994, co-author
and/or co-editor of eight other books and of over 500 technical articles. His citation h-index is 74 according to Google Scholar.
He is member of the Scientific Advisory Board of IMEC and STMicroelectronics.
Prof. De Micheli is the recipient of the 2012 IEEE/CAS Mac Van Valkenburg award for contributions to theory, practice and experimentation
in design methods and tools and of the 2003 IEEE Emanuel Piore Award for contributions to computer-aided
synthesis of digital systems. He received also the Golden Jubilee Medal for outstanding contributions to the IEEE CAS Society in
2000, the D. Pederson Award for the best paper on the IEEE Transactions on CAD/ICAS in 1987, and several Best Paper Awards,
including DAC (1983 and 1993), DATE (2005) and Nanoarch (2010).
He has been serving IEEE in several capacities, namely: Division 1 Director (2008-9), co-founder and President Elect of the IEEE
Council on EDA (2005-7), President of the IEEE CAS Society (2003), Editor in Chief of the IEEE Transactions on CAD/ICAS (1987-
2001). He has been Chair of several conferences, including DATE (2010), pHealth (2006), VLSI SOC (2006), DAC (2000) and ICCD
(1989). He is a founding member of the ALaRI institute at Universita’ della Svizzera Italiana (USI), in Lugano, Switzerland, where
he is currently scientific counselor.

Invited Talk: “Data Converters for Communications”
Data converters are relevant interfaces of RF circuits. It is essential to be aware of architecture,
conversion algorithm and functioning because they influence the overall operation of the RF section
of any communication system. The lecture will focus on key architectures of A/D and D/A
CMOS converters and the performance that they can achieve with state-of-the-art technologies.
Then, recent implementations of data converters fabricated with deep submicron technologies
(65 nm and below) implementing the SAR and the Sigma-Delta algorithms, suitable for RF integrated
system, will be described and analyzed.
Franco Maloberti / Franco Maloberti received the Laurea Degree in Physics (Summa cum Laude) from the University of Parma,
Italy, in 1968 and the Dr. Honoris Causa degree in Electronics from Inaoe, Puebla, Mexico in 1996. He was a Visiting Professor at
ETH-PEL, Zurich in 1993 and at EPFL-LEG, Lausanne in 2004. He was Professor of Microelectronics and Head of the Micro Integrated
Systems Group University of Pavia, Pavia, Italy, TI/J.Kilby Analog Engineering Chair Professor at the Texas A&M University
and the Distinguished Microelectronic Chair Professor at University of Texas at Dallas. Currently he is Professor at the University
of Pavia, Italy and Honorary Professor, University of Macau, China SAR. His professional expertise is in the design, analysis and
characterization of integrated circuits and analogue digital applications, mainly in the areas of switched capacitor circuits, data
converters, interfaces for telecommunication and sensor systems, and portable power management. He has written more than
470 published papers, five books and holds 30 patents. He has been responsible for many research programs including ten
ESPRIT projects and served the European Commission in many European Initiatives. He served the Academy of Finland on the
assessment of electronic research. He served the National Research Council of Portugal for the research activity assessment of
Portuguese Universities. He was a Member of the Advisory Board of INESC-Lisbon, Portugal. He is the Chairman of the Academic
Committee of the Microelectronics Key Lab. Macau, China.
He was VP Region 8 of IEEE CAS (1995-1997), Associate Editor of IEEE-TCAS-II, President of the IEEE Sensor Council (2002-2003),
IEEE CAS BoG member (2003-2005), VP Publications IEEE CAS (2007-2008). He was DL IEEE SSC Society (2009-2010) and presently
is DL IEEE CAS Society. He received the 1999 IEEE CAS Society Meritorious Service Award, the 2000 CAS Society Golden Jubilee
Medal, and the IEEE Millenium Medal. He was co-recipient of the 1996 IEE Fleming Premium, the ESSCIRC 2007 Best Paper Award
and the IEEJ Workshop 2007 and 2010 Best Paper Award. He is IEEE Fellow.

Invited Talk: “Technological Advances and Innovation among the Civilizations of Ancient
Peru
In order to understand the civilizations of ancient Peru it is important to realize that they developed
in isolation from the other cultural centers in the world. This realization implies that whatever
happened in India, China, Egypt, Mesopotamia or the Mediterranean area, had no effect here and
vice versa, and thus, that everything we see as material expressions of the ancient civilizations in
the Americas was independently invented and developed. Monumental architecture, irrigation,
ceramics, metallurgy, domestication of animals and plants, medicine, etc. was invented in parallel
here, and in some cases twice, as little contact existed between the northern and southern part of
the western hemisphere. Everything else, social and political organization, leadership, religion and
ideology, etc. were also independently developed. The world was fortunate that such a parallel development
actually happened, since we profit today not from one, but many cultural traditions.
In this talk we will explore some of the technological advances and innovations that characterize
the ancient societies of coastal Peru, where I conduct my own research. We will focus on metallurgy,
ceramics and irrigation technologies as examples of these processes, and because they have the potential
to further contribute to the development of modern societies.
Dr. Luis Jaime Castillo is a main professor of the Arqueology Section in Humanities Department from Pontificia Universidad Católica
del Perú (PUCP). Dr. Castillo graduated in Archaeology and received a Masters degree in Archaeology from PUCP. He also received a
Masters degree in Archaeology and PhD in Antropology from UCLA with the tesis “San José de Moro y el fin de los Mochicas en el Valle
de Jequetepeque, Costa Norte del Perú”.
In PUCP Dr. Castillo has been coordinator of archaeology, member of many administrative commissions, coordinator of the campus
archaeology, main professor and director of international relations and cooperation between 1994 and 2010.
Dr. Castillo has been director of the archaeology program “San José de Moro” since 1991. His research of the last 20 years has focused in
the Northern Coast of Perú and specifically in the Jequetepeque Valley, where he has studied the evolution of complex societies, relations
of ideology and power, politic and geopolitic organization of the Moche culture, collapse of the Moche, ritual and funeral practices,
etc.
Dr Castillo has been member of the National Commission of Archaeology from the INC, member of the Ethics Committee of the American
Society of American Archaeology and co editor of the magazine “Latin American Antiquity”, also of the SAA.
Dr. Castillo has been Visiting Professor in Universidad Pompeu Fabra and Universidad Autónoma, Barcelona, Spain; Universidad Pablo
de Olavide, Sevilla, Spain; Universitá di Siena, Italiy; Ecole de Hautes Etudes de Sciecnes Sociales, Universite de Paris 3 and Universite de
Bordeaux 3, France; anf Universidad de Lund, Sweden.
Dr. Castillo is author of “Personajes Míticos, Escenas y Narraciones en la Incongrafía Mochica” (Fondo Editorial PUCP, 1999), editor of “Arqueologia
Mochica, Nuevas Aproximaciones” (Fondo Editorial PUCP, 2008, with Helene Bernier, Gregory Lockard and Julio Rucabado);
“De Cupisnique a los Incas, El Arte del Valle de Jequetepeque” (Museo de Arte de Lima, 2009, with Cecilia Pardo); “New Perspective on
Moche Political Organization” (Dumbarton Oaks, 2010, with Jeffrey Quilter), and “San jose de Moro y la Arqueologí del Valle de Jequetepeque”
(Fondo Editorial PUCP 2011) and author or coauthor of more than 90 academic articles.

Invited Talk: “Class-D Amplifiers: Fundamentals, Recent Results And Open Problems”
A brief discussion on what Class- D amplifiers are as well as the different types and applications
are introduced. Then the low power amplifiers suitable for portable equipment are presented. In
particular, Class-D amplifiers based on hysteretic sliding mode controller, which avoids using conventional
triangular carrier signals. In this family we discuss the use of two- and three-level modulated
signal. A recently Class-D published last July which besides having low-power has high PSRR
based on integral sliding mode control is revisited. Final discussions on open problems on Class-D
amplifiers are presented.
Edgar Sánchez-Sinencio (F’92, LF’09) was born in Mexico City, Mexico. He received the degree in communications and electronic
engineering (Professional degree) from the National Polytechnic Institute of Mexico, Mexico City, the M.S.E.E. degree
from Stanford University, Stanford, CA, and the Ph.D. degree from the University of Illinois at Champaign-Urbana, in 1966, 1970,
and 1973, respectively. He has graduated 54 M.Sc. and 39 Ph.D. students, among them 6 Mexican Ph. Ds. He is a co-author of
six books on different topics, such as RF circuits, low-voltage low-power analog circuits, and neural networks. According to the
Google (citations) Scholar he has 7,582 citations, h-index=45 and i10-index =151. He is currently the TI J. Kilby Chair Professor
and Director of the Analog and Mixed-Signal Center at Texas A&M University.
His current interests are in the area of power management, ultra-low power analog circuits, data converters and medical electronics
circuit design. He is a former Editor-in-Chief of IEEE Transactions on Circuits and Systems II and a former IEEE CAS Vice
President–Publications.
In November 1995 he was awarded a Honoris Causa Doctorate by the National Institute for Astrophysics, Optics and Electronics,
Mexico. This degree was the first honorary degree awarded for microelectronic circuit-design contributions. He is a co-recipient
of the 1995 Guillemin-Cauer Award for his work on cellular networks. He received the Texas Senate Proclamation # 373 for Outstanding
Accomplishments in 1996. He was also the co-recipient of the 1997 Darlington Award for his work on high-frequency
filters. He received the IEEE Circuits and Systems Society Golden Jubilee Medal in 1999. He is the recipient of the prestigious IEEE
Circuits and Systems Society 2008 Technical Achievement Award. He was the IEEE Circuits and Systems Society’s Representative
to the IEEE Solid-State Circuits Society during 2000–2002. He was a member of the IEEE Solid-State Circuits Society Fellow Award
Committee from 2002 to 2004. He is currently (2012-2013) a Distinguished Lecturer of the IEEE Circuit and Systems Society.

Invited Talk: “Electronic Design Automation (EDA) at the core of Electronic Design and
Manufacturing”
Electronic systems are part of our life; they are present everywhere and in all activities we perform
during the day. Today we interact with at least 350 electronic systems per day. Electronic systems are
composed by hardware and software. The hardware component of those systems is made with one
or more integrated circuits connected on a board. Those integrated circuits contain hundreds of millions
of transistors, one of the biggest has 1 billion (1,000 millions) of transistors. Another important
factor of current integrated circuits is their speed without compromising the power they dissipate.
Those enormous technological changes have been possible because of Electronic
Design Automation (EDA), software used by designers and manufacturers of integrated
circuits. EDA is the basis of integrated circuits design and manufacturing.
This talk will present how electronic systems and EDA have evolved during the last 50 years and
what are the future challenges of integrated circuits design and manufacturing.
Victor Grimblatt is currently R&D Group Director and General Manager of Synopsys Chile. He opened the Synopsys Chile R&D
Center in 2006. Before joining Synopsys he worked for different Chilean and multinational companies, such as Motorola Semiconductors,
Honeywell Bull, VLSI technology Inc., and Compass Design Automation Inc. He started to work in EDA in 1988 in
VLSI Technology Inc. where he developed synthesis tools being one of the pioneers of this new technology. He also worked in
embedded systems development in Motorola semiconductors. He has published several papers in EDA and embedded systems
development.
Victor Grimblatt is also professor of Electronics and IC Design in Universidad de Chile and Universidad de los Andes. Since 2012
he is chair of the Chilean chapter of the CASS.

LASCAS 2013 Steering Committee
• Antonio Garcia Rozo, Colombia
• Eric Kerhervé, France
• Jose Luis Huertas, Spain
• Carlos Silva Cardenas, Peru
• Pedro Julian, Argentina
• Arturo Sarmiento Reyes, Mexico
• Eduardo A. B. da Silva, Brazil
• Fernando Silveira, Uruguay
• Luis Miguel Silveira, Portugal
• Maciej Ogorzalek, Poland
• Roberto Murphy, Mexico
• Adelmo Ortiz Conde, Venezuela
• Juan Sanchez, Mexico
• Edgar Sanchez Sinencio, USA
• Massimo Alioto, Italy
• Mohamad Sawan, Canada
• Malgorzata Chrzanowska-Jeske, USA
• Lorena Posada, Colombia
• Angel Rodrigues-Vazques, Spain
• Raoul Velazco, France
• Ricardo Reis, Brazil

LASCAS 2013 Committees
General Chair
Carlos Silva-Cárdenas PUCP, PERU
Technical Program Chairs
Sergio Bampi Universidade Federal do Rio Grande do Sul Brasil
Eduard Alarcón Universitat Politecnica de Catalunya Spain
Special Session Chair
Esteban Tlelo Cuautle INAOE, Mexico
Plenary Session
Maciej Ogorzalek Jagiellonian University, Poland
Publications Chairs
Lorena García Universidad de Los Andes Colombia
Ricardo Reis Universidade Federal do Rio Grande do Sul Brasil
Conference Secretary and Finance Chair
Hugo Pratt PUCP, PERU
Edmundo Pozo PUCP, PERU
Local Arrangements
Edilberto Medina Universidad Nacional San Antonio Abad del Cusco, PERU
Communications Chairs
Ricardo Gallegos PUCP, PERU
Pedro Pachas Businesstech, PERU
Arturo Díaz, PUCP, PERU
International Contact Points
Alberto Palacios Toin University, JAPON
Mario Raffo PUCP, PERU and Universidade Federal do Rio Grande do Sul Brasil
Raoul Velazco INPG-FRANCIA
Adoración Rueda IMSE-CNM ESPAÑA
Fernando Silveira Universidad de La Republica URUGUAY
Antonio García Universidad de Los Andes COLOMBIA

Iberchip XIX Committees
General Chairs
José Luis Huertas IMSE-CNM ESPAÑA
Carlos Silva-Cárdenas PUCP, PERU
Technical Program Chairs
Adoración Rueda IMSE-CNM ESPAÑA
Fernando Silveira Universidad de La Republica URUGUAY
Special Session Chair
Esteban Tlelo Cuautle INAOE, Mexico
PlenarySession
Maciej Ogorzalek Jagiellonian University, Poland
Publications Chairs
Lorena García Universidad de Los Andes Colombia
Ricardo Reis Universidade Federal do Rio Grande do Sul Brasil
Conference Secretary and Finance Chair
Hugo Pratt PUCP, PERU
Edmundo Pozo PUCP, PERU
Local Arrangements
Edilberto Medina Universidad Nacional San Antonio Abad del Cusco, PERU
Communications Chairs
Ricardo Gallegos PUCP, PERU
Pedro Pachas Businesstech, PERU
Arturo Díaz, PUCP, PERU
International Contact Points
Alberto Palacios Toin University, JAPON
Mario Raffo PUCP, PERU and Universidade Federal do Rio Grande do Sul Brasil
Raoul Velazco INPG FRANCIA
Adoración Rueda IMSE-CNM ESPAÑA
Fernando Silveira Universidad de La Republica URUGUAY
Antonio García Universidad de Los Andes COLOMBIA

LUNCHS and GALA DINNER: DON ANTONIO RESTAURANT
(Santa Teresa Street 356)

MUNICIPALIDAD DEL CUSCO