TRBnet for CBM - GSI

TRBnet
for the CBM MVD-Prototype
Borislav Milanović
In cooperation with:
J. Michel, M. Deveaux, S. Seddiki, M. Traxler,
S. Youcef, C. Schrader, I. Fröhlich, C. Müntz

Overview 1/22
Overview

TRBnet@HADES 2/22

TRBnet@HADES – Specifications 3/22
HADES Specifications
• 80 000 data channels
• 520 PCBs / 550 FPGAs
• 6 Detector Systems
• Au Au:
20 kHz trigger rate (10 5 collision rate)
200 particles/event
200 MByte/s

TRBnet@HADES – Explanation 4/22
TRBnet ?
• Protocol
HADES and FAIR
DAQ
FPGA + Optical Links
• Network
Unified Bus
Secure Transmission

TRBnet@HADES – Network 5/22
372 x
30 x
6x
9 x
24 x
4 x
12 x
3 x
2 x
2 x
20 × 2 GBit/s
- Jan Michel, „Status of the HADES Upgrade“ -

TRBnet Key Features 6/22

TRBnet Key Features – Architecture 7/22
Architecture
Detector 1
Detector 2
Slow Control
...
Detector n
Optical Network
Data
Processing
Trigger
System

TRBnet Key Features – Dataflow 8/22
Dataflow
Detector 1
Detector 2
Slow Control
...
Detector n
Optical Network
Data
Processing
Trigger
System
Max. 3 µs latency

TRBnet Key Features – Specifications 9/22
TRBnet Specifications
• Layers
• Unique IDs
• CRC checksum
CRC
• Four prioritized virtual
Channels
addr1 addr2 addr3
5x 16bit

TRBnet Key Features – Channels 10/22
TRBnet Specifications
• Channel switching after each data packet
1 Optical Link

TRBnet Key Features – Facts 11/22
TRBnet Facts
• 80 bit/packet, 64 bit payload
Overhead 16 bit!
• Error detection
No inconsistent data through transport
• Secure Transfers
All boards answer each transfer
• Independent on underlying System/Data
• TRBnet reduces net-bandwidth to 63%
E.g. Optical Link 3 Gbit/s 2 Gbit/s

MVD Requirements 12/22

MVD Requirements – Geometry 13/22
MVD
MAPS

MVD Requirements – Station 1 simulation 14/22
Station 1 Simulation
• Au Au @ 25GeV
• 5•10 5 collision rate
• T int = 10 µs
• approx. 7 GByte/s
- Sélim Seddiki, „MVD DAQ Prototype“ -
Data Rate per Sensor [MByte/s]
1 prototype

MVD Requirements – Prototype 15/22
MVD Prototype
MimoSIS-1
• M26 high-res. inspired
• 3 cm 2
× 5
MVD Module:
• 2-sided, 0,37 between sensors: 2 x 50 µm Si, 300 µm CVD-Diam., 2 x 35
µm Glue → 350 µm Si equ , (0.37 % X0), Ø 359 µm Si equ , (0.383 % X0)
• 5 sensors / module
• 500 µm overlap of opposite sensors (pitch: ~ 20 µm)
•9 cm 2
=
=
× 4
- Christian Müntz -

MVD Requirements – Datarate 16/22
Comparison
Trigger
Particles
Datarate
• Main challenge:
40 Gbit/s
Self-Triggering
HADES MVD
20 kHz Nonstop
200 1600
200 MB/s 5GB/s (Prototype)

Evaluation and Future Actions 17/22

Evaluation and Future Actions – Readout 18/22
Scheme
40 Gbit/s
FPG
A
...
FPG
A
MVD-Prototype TRBnet
2 Gbit/s effective*
... ...
=> 25 optical links
*Bandwidth depends on
the FPGA frequency
TRBnet
HUB

Evaluation and Future Actions – Readout 19/22
Scheme
8b10b + twisted pair copper
MVD-Prototype
40 Gbit/s
FPG
ROC A
...
FPG
A
TRBnet
2 Gbit/s effective*
... ...
=> 25 optical links
*Bandwidth depends on
the FPGA frequency
TRBnet
HUB

Evaluation and Future Actions – First steps 20/22
First Steps
• MAPS Addon Board with PEXOR Card
First TRBnet implementation for MAPS
• TRBnet Hubs
Datarate simulation
1 MAPS PC
data

Evaluation and Future Actions – Summary 21/22
Summary
• TRBnet is ideally suited for the first MVD
prototype simulations
▫ Already implemented
▫ Highly modular (written in VHDL)
▫ Various configurations
▫ Low latency (3 µs), decent bandwidth (63 %)
▫ Extensible - new designs, larger data buffers
• Tested on XILINX and Lattice FPGAs @ HADES
▫ up to 100 MHz, 16bit data format
• First steps towards the ROC

References 22/22
References
• J. Michel, „Development of a Realtime Network Protocol for HADES
and FAIR Experiments“
• J. Michel, „Status of the HADES Upgrade“
• I. Fröhlich, „The Readout of the CBM MVD“
• M. Deveaux, „Status of the Micro Vertex Detector of the CBM
Experiment“
• S. Seddiki, „MVD DAQ Prototype“