Accurate and Accurate and Efficient SSN Modeling

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SIwave Extraction PCB Voltage SSource VRM Designer Environment Terminations N N SIwave Extraction SIwave Extraction N N Data Interposer Package N Drivers SIwave Extraction SIwave Extraction NNexxim i EEngine i N Interposer Package N Receivers N
Driver Models � Need to accurately model Signals <strong>and</strong> dPPower � Obtain transistor level models if at all possible � IBIS tends to be pessimistic because current scales linearly with ihiincreased ddi drivers � Verify waveforms for single driver AND during SSO ˃ Spice IBIS Rail Collapse During SSO Lab
Page 1 and 2: Accurate and Efficient SSN Modeling
Page 3 and 4: What is SSN? � Simultaneous Switc
Page 5 and 6: Ground/Power Bounce Ref: BGA Crosst
Page 7: Model Types � Need to include all
Page 11 and 12: PCB Model � Extract individual Si
Page 13 and 14: Modeling Techniques � Kitchen Sin
Page 15 and 16: Nearest Neighbor Tradeoffs � Most
Page 17 and 18: Signal Grouping Tradeoffs � Much
Page 19 and 20: Current Mirroring Tradeoffs � Muc
Page 21 and 22: S-parameter S parameter Handling St
Page 23 and 24: Choose port impedances p that are r
Page 25 and 26: Schematic Setup � Schematic setup
Page 27 and 28: Stand Stand-alone alone GUI to setu
Page 29 and 30: SIwizard in v4.0 SIwave 11. Select
Page 31: Current Mirroring � Place drivers

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